[PATCH] RISC-V: Disassemble x0 based addresses as 0.

[PATCH] RISC-V: Disassemble x0 based addresses as 0.

[Jim Wilson]

This fixes a problem with addresses printed in disassembly when an x0 base
register is used.  Without the patch, for the testcase, it prints the address
as 40.  With the patch, it correctly prints the address as 0, because the x0
register always contains the value 0 no matter what is written to it.

This was tested with riscv{32,64}-{elf,linux} testsuite runs.  There were no
regressions.  It was also tested on a vmlinux binary and a libstdc++.a archive.
There were no changes to disassembly for those files which is the expected
result.  The new testcase works with the patch and fails without the patch.

Committed.

Jim

	gas/
	* testsuite/gas/riscv/auipc-x0.d: New.
	* testsuite/gas/riscv/auipc-x0.s: New.

	opcodes/
	* riscv-dis.c (maybe_print_address): If base_reg is zero,
	then the hi_addr value is zero.
---
 gas/testsuite/gas/riscv/auipc-x0.d | 12 ++++++++++++
 gas/testsuite/gas/riscv/auipc-x0.s |  4 ++++
 opcodes/riscv-dis.c                |  2 +-
 3 files changed, 17 insertions(+), 1 deletion(-)
 create mode 100644 gas/testsuite/gas/riscv/auipc-x0.d
 create mode 100644 gas/testsuite/gas/riscv/auipc-x0.s

diff --git a/gas/testsuite/gas/riscv/auipc-x0.d b/gas/testsuite/gas/riscv/auipc-x0.d
new file mode 100644
index 0000000000..bcf95af057
--- /dev/null
+++ b/gas/testsuite/gas/riscv/auipc-x0.d
@@ -0,0 +1,12 @@
+#as: -march=rv32i
+#objdump: -dr
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+#...
+[ 	]+40:[ 	]+00000017[ 	]+auipc[ 	]+zero,0x0
+[ 	]+44:[ 	]+00002003[ 	]+lw[ 	]+zero,0\(zero\) # 0 .*
diff --git a/gas/testsuite/gas/riscv/auipc-x0.s b/gas/testsuite/gas/riscv/auipc-x0.s
new file mode 100644
index 0000000000..f7b394c67d
--- /dev/null
+++ b/gas/testsuite/gas/riscv/auipc-x0.s
@@ -0,0 +1,4 @@
+target:
+	.skip 64
+	auipc x0, 0
+	lw x0, 0(x0)
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index cc427b4b93..cc642d4ad3 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -101,7 +101,7 @@ maybe_print_address (struct riscv_private_data *pd, int base_reg, int offset)
 {
   if (pd->hi_addr[base_reg] != (bfd_vma)-1)
     {
-      pd->print_addr = pd->hi_addr[base_reg] + offset;
+      pd->print_addr = (base_reg != 0 ? pd->hi_addr[base_reg] : 0) + offset;
       pd->hi_addr[base_reg] = -1;
     }
   else if (base_reg == X_GP && pd->gp != (bfd_vma)-1)
-- 
2.14.1