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From: Andrew Burgess <andrew.burgess@embecosm.com>
To: Stafford Horne <shorne@gmail.com>
Cc: GDB patches <gdb-patches@sourceware.org>,
	GNU Binutils <binutils@sourceware.org>,
	Andrey Bacherov <bandvig@mail.ru>,
	Openrisc <openrisc@lists.librecores.org>
Subject: Re: [PATCH v2 6/6] sim/common: Fix issue with wrong byte order on BE targets
Date: Thu, 11 Apr 2019 22:27:00 -0000	[thread overview]
Message-ID: <20190411222749.GB2737@embecosm.com> (raw)
In-Reply-To: <20190409213925.32699-7-shorne@gmail.com>

* Stafford Horne <shorne@gmail.com> [2019-04-10 06:39:25 +0900]:

> Currently only the OpenRISC sim uses this JOINSIDF() function to compose a
> double float from 2 registers.  The old code doesn't seem to work as the
> work order gets swapped when running on a x86_64 host.  This change
> fixes that, but I am not sure if its the best thing to do.
> 
> On mips they do similar reg pair floating point operations composing
> doubles from 2 32-bit registers in sim/mips/cp1.c value_fpr().
> 
> sim/common/ChangeLog:
> 
> 	* cgen-ops.h (JOINSIDF): Fix big endian check.
> ---
>  sim/common/cgen-ops.h | 8 ++------
>  1 file changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/sim/common/cgen-ops.h b/sim/common/cgen-ops.h
> index 841552066f..d718394723 100644
> --- a/sim/common/cgen-ops.h
> +++ b/sim/common/cgen-ops.h
> @@ -431,12 +431,8 @@ JOINSIDI (SI x0, SI x1)
>  SEMOPS_INLINE DF
>  JOINSIDF (SI x0, SI x1)
>  {
> -  union { SI in[2]; DF out; } x;
> -  if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)

I think this is the problem with the existing code, we're using memory
on the HOST to perform packing / unpacking, and so its the byte
ordering of the HOST that we care about here, not the target.

If I change the above line to instead be:

     if (HOST_BYTE_ORDER == BFD_ENDIAN_BIG)

then everything works fine.

On inspection I believe all of the uses of CURRENT_TARGET_BYTE_ORDER
in this file should be similarly replaced.

I've attached a patch for this change.  If you agree I'll go ahead and
push it.

Thanks,
Andrew


--

[PATCH] sim: Use host not target byte order for merging and splitting values

When using writes to memory through a struct to merge and extract
multi-word value, it is the endianness of the host, not the target
that affects which order the component words need to be written into
the structure.

Of the 5 functions adjusted here 4 of them are unused.  The 5th,
JOINSIDF will soon be used by the or1k target.

For or1k, simulated on x86-64, this change fixes this function so that
the correct bytes are now returned.

sim/common/ChangeLog:

	* cgen-ops.h (SUBWORDXFSI): Compare HOST_BYTE_ORDER not
	CURRENT_TARGET_BYTE_ORDER.
	(SUBWORDTFSI): Likewise.
	(JOINSIDF): Likewise.
	(JOINSIXF): Likewise.
	(JOINSITF): Likewise.
---
 sim/common/ChangeLog  |  9 +++++++++
 sim/common/cgen-ops.h | 10 +++++-----
 2 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/sim/common/cgen-ops.h b/sim/common/cgen-ops.h
index 841552066f4..6fecb862a8a 100644
--- a/sim/common/cgen-ops.h
+++ b/sim/common/cgen-ops.h
@@ -404,7 +404,7 @@ SUBWORDXFSI (XF in, int word)
   /* Note: typedef struct { SI parts[3]; } XF; */
   union { XF in; SI out[3]; } x;
   x.in = in;
-  if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+  if (HOST_BYTE_ORDER == BFD_ENDIAN_BIG)
     return x.out[word];
   else
     return x.out[2 - word];
@@ -416,7 +416,7 @@ SUBWORDTFSI (TF in, int word)
   /* Note: typedef struct { SI parts[4]; } TF; */
   union { TF in; SI out[4]; } x;
   x.in = in;
-  if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+  if (HOST_BYTE_ORDER == BFD_ENDIAN_BIG)
     return x.out[word];
   else
     return x.out[3 - word];
@@ -432,7 +432,7 @@ SEMOPS_INLINE DF
 JOINSIDF (SI x0, SI x1)
 {
   union { SI in[2]; DF out; } x;
-  if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+  if (HOST_BYTE_ORDER == BFD_ENDIAN_BIG)
     x.in[0] = x0, x.in[1] = x1;
   else
     x.in[1] = x0, x.in[0] = x1;
@@ -443,7 +443,7 @@ SEMOPS_INLINE XF
 JOINSIXF (SI x0, SI x1, SI x2)
 {
   union { SI in[3]; XF out; } x;
-  if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+  if (HOST_BYTE_ORDER == BFD_ENDIAN_BIG)
     x.in[0] = x0, x.in[1] = x1, x.in[2] = x2;
   else
     x.in[2] = x0, x.in[1] = x1, x.in[0] = x2;
@@ -454,7 +454,7 @@ SEMOPS_INLINE TF
 JOINSITF (SI x0, SI x1, SI x2, SI x3)
 {
   union { SI in[4]; TF out; } x;
-  if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+  if (HOST_BYTE_ORDER == BFD_ENDIAN_BIG)
     x.in[0] = x0, x.in[1] = x1, x.in[2] = x2, x.in[3] = x3;
   else
     x.in[3] = x0, x.in[2] = x1, x.in[1] = x2, x.in[0] = x3;
-- 
2.14.5

  reply	other threads:[~2019-04-11 22:27 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-09 21:39 [PATCH v2 0/6] OpenRISC orfpx64a32 support Stafford Horne
2019-04-09 21:39 ` [PATCH v2 4/6] sim/common: Wire in df/di conversion Stafford Horne
2019-04-13 21:59   ` Andrew Burgess
2019-04-09 21:39 ` [PATCH v2 1/6] cpu: Add support for orfp64a32 spec Stafford Horne
2019-04-09 21:40 ` [PATCH v2 6/6] sim/common: Fix issue with wrong byte order on BE targets Stafford Horne
2019-04-11 22:27   ` Andrew Burgess [this message]
2019-04-12 20:21     ` Stafford Horne
2019-04-13 21:30       ` Andrew Burgess
2019-04-09 21:40 ` [PATCH v2 2/6] opcodes: Regenerate opcodes for orfp64a32 spec Stafford Horne
2019-04-11  8:45   ` Nick Clifton
2019-04-09 21:40 ` [PATCH v2 5/6] sim/or1k: Add test for 64-bit fpu operations Stafford Horne
2019-04-13 21:36   ` Andrew Burgess
2019-04-09 21:40 ` [PATCH v2 3/6] sim/or1k: Regenerate sim for orfp64a32 spec Stafford Horne
2019-04-13 21:40   ` Andrew Burgess
2019-04-14  6:44     ` Stafford Horne

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