From: Alan Modra <amodra@gmail.com>
To: Andre Simoes Dias Vieira <Andre.SimoesDiasVieira@arm.com>
Cc: "nickc@redhat.com" <nickc@redhat.com>,
"binutils@sourceware.org" <binutils@sourceware.org>,
nd <nd@arm.com>
Subject: Re: [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline
Date: Tue, 16 Apr 2019 12:36:00 -0000 [thread overview]
Message-ID: <20190416123631.GX14424@bubble.grove.modra.org> (raw)
In-Reply-To: <AM6PR08MB3254BC6A212F7E613F78BA1188240@AM6PR08MB3254.eurprd08.prod.outlook.com>
On Tue, Apr 16, 2019 at 11:52:19AM +0000, Andre Simoes Dias Vieira wrote:
> Hi Alan,
>
> Thanks for the heads up. I am on holidays so I don't have much time to look at this right now. But after a quick look I think the arm-pe fails are due to objdump printing the branch targets in a different format. I'll double-check later, but it should be a case of accepting both answers.
>
> The VxWorks failures seem to be related to the relocations. I did a quick search but couldn't determine whether VxWorks uses Elf binary format. Do you reckon VxWorks should support this elf relocation? If so I'll need to look at it a bit further, otherwise I'll skip the relocation tests for VxWorks.
VxWorks uses ELF. The difference is that unlike other ARM targets,
arm-vxworks uses rela style relocations. Very likely your new reloc
processing is broken for rela. ie. You shouldn't just sweep this
under the rug. ;-)
> Cheers,
> Andre
>
> -----Original Message-----
> From: Alan Modra <amodra@gmail.com>
> Sent: 16 April 2019 02:58
> To: Andre Simoes Dias Vieira <Andre.SimoesDiasVieira@arm.com>
> Cc: nickc@redhat.com; binutils@sourceware.org; nd <nd@arm.com>
> Subject: Re: [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline
>
> These failures remain.
> arm-pe +FAIL: Valid Armv8.1-M Mainline BF instruction arm-pe +FAIL: Valid Armv8.1-M Mainline BFCSEL instruction arm-pe +FAIL: Valid Armv8.1-M Mainline BFL instruction arm-pe +FAIL: Valid Armv8.1-M Mainline Low Overhead loop instructions arm-vxworks +FAIL: Valid Armv8.1-M Mainline BF instruction with relocation arm-vxworks +FAIL: Valid Armv8.1-M Mainline BFL instruction with relocation
>
> --
> Alan Modra
> Australia Development Lab, IBM
--
Alan Modra
Australia Development Lab, IBM
next prev parent reply other threads:[~2019-04-16 12:36 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-04 13:24 Andre Vieira (lists)
2019-04-04 13:28 ` [PATCH, binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI Andre Vieira (lists)
2019-04-04 13:28 ` [PATCH, GAS, ARM, 2/16] Add CLI extension support for Armv8.1-M Mainline Andre Vieira (lists)
2019-04-04 13:34 ` [PATCH, binutils, ARM, 4/16] BF insns infrastructure with array of relocs in struct arm_it Andre Vieira (lists)
2019-04-04 13:34 ` [PATCH, binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real for fallback branch Andre Vieira (lists)
2019-04-04 13:36 ` [PATCH, binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM_BF16 Andre Vieira (lists)
2019-04-04 13:37 ` [PATCH, binutils, ARM, 6/16] New BF instruction for Armv8.1-M Mainline Andre Vieira (lists)
2019-04-12 10:41 ` Andre Vieira (lists)
2019-04-04 13:38 ` [PATCH, binutils, ARM, 7/16] New BFX and BFLX " Andre Vieira (lists)
2019-04-04 13:38 ` [PATCH, binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18 Andre Vieira (lists)
2019-04-04 13:39 ` [PATCH, binutils, ARM, 9/16] New BFL instruction for Armv8.1-M Mainline Andre Vieira (lists)
2019-04-12 10:40 ` Andre Vieira (lists)
2019-04-04 13:40 ` [PATCH, binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_BF12 Andre Vieira (lists)
2019-04-04 13:41 ` [PATCH, binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Mainline Andre Vieira (lists)
2019-04-12 10:40 ` Andre Vieira (lists)
2019-04-04 13:41 ` [PATCH, binutils, ARM, 11/16] New BFCSEL instruction " Andre Vieira (lists)
2019-04-12 10:39 ` Andre Vieira (lists)
2019-04-04 13:42 ` [PATCH, binutils, ARM, 13/16] Add support for CLRM Andre Vieira (lists)
2019-04-04 13:43 ` [PATCH, opcodes, ARM, 14/16] Add mode availability to coprocessor table entries Andre Vieira (lists)
2019-04-04 13:44 ` [PATCH, binutils, ARM, 16/16] Add support to VLDR and VSTR of system registers Andre Vieira (lists)
2019-04-04 13:44 ` [PATCH, binutils, ARM, 15/16] Add support for VSCCLRM Andre Vieira (lists)
2019-04-11 10:04 ` [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline Nick Clifton
2019-04-12 10:39 ` Andre Vieira (lists)
2019-04-12 13:51 ` Nick Clifton
2019-04-15 9:41 ` Andre Simoes Dias Vieira
2019-04-16 1:58 ` Alan Modra
2019-04-16 11:52 ` Andre Simoes Dias Vieira
2019-04-16 12:36 ` Alan Modra [this message]
2019-05-01 9:32 ` Andre Vieira (lists)
2019-05-02 1:21 ` Alan Modra
2019-05-15 15:34 ` Andre Vieira (lists)
2019-05-20 10:31 ` Nick Clifton
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