From: Faraz Shahbazker <fshahbazker@wavecomp.com>
To: "binutils@sourceware.org" <binutils@sourceware.org>
Cc: Faraz Shahbazker <fshahbazker@wavecomp.com>,
"paul.hua.gm@gmail.com" <paul.hua.gm@gmail.com>
Subject: [PATCH] [MIPS] Fix M5100 flags test with interAptiv-MR2
Date: Fri, 19 Apr 2019 21:03:00 -0000 [thread overview]
Message-ID: <20190419210422.142060-1-fshahbazker@wavecomp.com> (raw)
From: Matthew Fortune <matthew.fortune@mips.com>
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp: Fix expected ASEs
for M5100.
---
This failure is exposed by a previous assembler fix to apply ASE
information correctly for MIPS processors.
ld/testsuite/ld-mips-elf/mips-elf-flags.exp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
index 89d2a10..58c9b67 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
@@ -314,7 +314,8 @@ good_combination { "-march=interaptiv-mr2 -32" "-mips32r5 -32" } \
good_combination { "-march=interaptiv-mr2 -32" "-march=m5100 -32" } \
{ mips32r2 interaptiv-mr2 } \
MIPS32r5 "Imagination interAptiv MR2" \
- { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+ { "DSP ASE" "Enhanced VA Scheme" \
+ "MCU (MicroController) ASE" "MT ASE" }
good_combination { "-march=gs464 -32" "-march=gs464e -32" } \
{ gs464e o32 } \
--
2.9.5
next reply other threads:[~2019-04-19 21:03 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-19 21:03 Faraz Shahbazker [this message]
2019-04-23 2:08 ` Paul Hua
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