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* [PATCH] [MIPS] Fix M5100 flags test with interAptiv-MR2
@ 2019-04-19 21:03 Faraz Shahbazker
  2019-04-23  2:08 ` Paul Hua
  0 siblings, 1 reply; 2+ messages in thread
From: Faraz Shahbazker @ 2019-04-19 21:03 UTC (permalink / raw)
  To: binutils; +Cc: Faraz Shahbazker, paul.hua.gm

From: Matthew Fortune <matthew.fortune@mips.com>

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Fix expected ASEs
	for M5100.
---
This failure is exposed by a previous assembler fix to apply ASE
information correctly for MIPS processors. 

 ld/testsuite/ld-mips-elf/mips-elf-flags.exp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
index 89d2a10..58c9b67 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
@@ -314,7 +314,8 @@ good_combination { "-march=interaptiv-mr2 -32" "-mips32r5 -32" } \
 good_combination { "-march=interaptiv-mr2 -32" "-march=m5100 -32" } \
 		 { mips32r2 interaptiv-mr2 } \
 		 MIPS32r5 "Imagination interAptiv MR2" \
-		 { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
+		 { "DSP ASE" "Enhanced VA Scheme" \
+		   "MCU (MicroController) ASE" "MT ASE" }
 
 good_combination { "-march=gs464 -32" "-march=gs464e -32" }	\
 		 { gs464e o32 }					\
-- 
2.9.5

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] [MIPS] Fix M5100 flags test with interAptiv-MR2
  2019-04-19 21:03 [PATCH] [MIPS] Fix M5100 flags test with interAptiv-MR2 Faraz Shahbazker
@ 2019-04-23  2:08 ` Paul Hua
  0 siblings, 0 replies; 2+ messages in thread
From: Paul Hua @ 2019-04-23  2:08 UTC (permalink / raw)
  To: Faraz Shahbazker; +Cc: binutils

ok.

On Sat, Apr 20, 2019 at 5:03 AM Faraz Shahbazker
<fshahbazker@wavecomp.com> wrote:
>
> From: Matthew Fortune <matthew.fortune@mips.com>
>
> ld/
>         * testsuite/ld-mips-elf/mips-elf-flags.exp: Fix expected ASEs
>         for M5100.
> ---
> This failure is exposed by a previous assembler fix to apply ASE
> information correctly for MIPS processors.
>
>  ld/testsuite/ld-mips-elf/mips-elf-flags.exp | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
> index 89d2a10..58c9b67 100644
> --- a/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
> +++ b/ld/testsuite/ld-mips-elf/mips-elf-flags.exp
> @@ -314,7 +314,8 @@ good_combination { "-march=interaptiv-mr2 -32" "-mips32r5 -32" } \
>  good_combination { "-march=interaptiv-mr2 -32" "-march=m5100 -32" } \
>                  { mips32r2 interaptiv-mr2 } \
>                  MIPS32r5 "Imagination interAptiv MR2" \
> -                { "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
> +                { "DSP ASE" "Enhanced VA Scheme" \
> +                  "MCU (MicroController) ASE" "MT ASE" }
>
>  good_combination { "-march=gs464 -32" "-march=gs464e -32" }    \
>                  { gs464e o32 }                                 \
> --
> 2.9.5
>

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2019-04-23  2:08 ` Paul Hua

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