From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 73193 invoked by alias); 17 Feb 2020 01:06:37 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Received: (qmail 73185 invoked by uid 89); 17 Feb 2020 01:06:36 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-23.0 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_NUMSUBJECT,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.1 spammy=H*r:sk:static., Australia, australia, Development X-HELO: mail-pj1-f68.google.com Received: from mail-pj1-f68.google.com (HELO mail-pj1-f68.google.com) (209.85.216.68) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 17 Feb 2020 01:06:35 +0000 Received: by mail-pj1-f68.google.com with SMTP id dw13so6389641pjb.4 for ; Sun, 16 Feb 2020 17:06:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=GrFBWaPWZVAxHAZPVKbMEy2nv8dbSWlIo4pF5XnhYGQ=; b=Hz/XMVeXWtKBk65tdS5CYEAymE3bP3QxIhvZvpFUYXkDaO5uPMHBTjKIhgXpweTQ16 Eo8wMZqez3SdAD/lapD6dDJgWMNK57ZOpZWGltrxN7XkCjEVU77jMeAV90nR9GwthryK bJWPLHtxg+EGMjdDAUEeAATmAhVCtC7mi59QYPm70Qr4BbmhwKkuf+a+Z+PVbtdiw1rU WCo5jnepqzROsCqlL62xj3jeDAEzXd0YIzLFoVUpx1BmeUiLtwigNx7J801V6mnstaGQ BqBNABKcs6KXIqsCQYSlQg89Pdqtl95Orv0C1odEC7FTisrEtM18Ma88RFRoeGYDwdVD qRLA== Return-Path: Received: from bubble.grove.modra.org (158.106.96.58.static.exetel.com.au. [58.96.106.158]) by smtp.gmail.com with ESMTPSA id y6sm14759236pgc.10.2020.02.16.17.06.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Feb 2020 17:06:32 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id 0A3B98ACCE; Mon, 17 Feb 2020 11:36:29 +1030 (ACDT) Date: Mon, 17 Feb 2020 01:06:00 -0000 From: Alan Modra To: "H.J. Lu" Cc: Jan Beulich , "binutils@sourceware.org" Subject: Re: [committed, PATCH] x86: Don't disable SSE4a when disabling SSE4 Message-ID: <20200217010628.GA5570@bubble.grove.modra.org> References: <3bc597bb-10f9-80f9-8e00-f28aeb2eea77@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-IsSubscribed: yes X-SW-Source: 2020-02/txt/msg00385.txt.bz2 On Sun, Feb 16, 2020 at 08:47:56AM -0800, H.J. Lu wrote: > commit 7deea9aad8 changed nosse4 to include CpuSSE4a. But AMD SSE4a is > a superset of SSE3 and Intel SSE4 is a superset of SSSE3. Disable Intel > SSE4 shouldn't disable AMD SSE4a. This patch restores nosse4. It also > adds .sse4a and nosse4a. diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 79f4cc9d25..45106bcf6d 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -326,6 +326,8 @@ static initializer cpu_flag_init[] = { "CPU_ANY_SSE2_FLAGS", "CPU_ANY_SSE3_FLAGS|CpuSSE2" }, { "CPU_ANY_SSE3_FLAGS", + { "CPU_ANY_SSE4A_FLAGS", + "CPU_ANY_SSE3_FLAGS|CpuSSE4a" }, "CPU_ANY_SSSE3_FLAGS|CpuSSE3|CpuSSE4a" }, { "CPU_ANY_SSSE3_FLAGS", "CPU_ANY_SSE4_1_FLAGS|CpuSSSE3" }, @@ -333,8 +335,6 @@ static initializer cpu_flag_init[] = "CPU_ANY_SSE4_2_FLAGS|CpuSSE4_1" }, { "CPU_ANY_SSE4_2_FLAGS", "CpuSSE4_2" }, - { "CPU_ANY_SSE4_FLAGS", - "CPU_ANY_SSE4_1_FLAGS|CpuSSE4a" }, { "CPU_ANY_AVX_FLAGS", "CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" }, { "CPU_ANY_AVX2_FLAGS", Merge error? -- Alan Modra Australia Development Lab, IBM