From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 105135 invoked by alias); 17 Feb 2020 01:32:05 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Received: (qmail 105123 invoked by uid 89); 17 Feb 2020 01:32:04 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00,FREEMAIL_FROM,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_NUMSUBJECT,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mail-pf1-f193.google.com Received: from mail-pf1-f193.google.com (HELO mail-pf1-f193.google.com) (209.85.210.193) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 17 Feb 2020 01:32:03 +0000 Received: by mail-pf1-f193.google.com with SMTP id 2so7965197pfg.12 for ; Sun, 16 Feb 2020 17:32:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=1Uruo3j4kl+XYewFI1/mVZp0V5OdEY4tiaEjt8hZtIQ=; b=S4B1xIhxXqZFu91OU2iyM8bfUAO3DYSpCyGzVVsS2RKKLJr6xB/E9yTErER8D9zWtu 2DqPH54gYD2T/6/zEdyh/mAZENPUp9/F5xfO+SAYTLQ8fAhjWBApI61621zgi+upe4sd FgQhRKrX4QnnaojcNRpLLf5AFezEb4dlaRdw2zjm8jtA70nJePqmZkSeZBaZBA+aA/Q4 JXWDUuvbLv0ztpVbxCAG8NZy9cw3dIFQZbnnrgkozbctgkKutgx5Y83Lr85+Urqh1+O6 5rP95ls7Zgg1kZXlxv74KMQQO0J+iu7NJ0nUCXDOASrITuLtcHfTX5aoD0GKS/rX8Og2 2N2w== Return-Path: Received: from bubble.grove.modra.org ([2406:3400:51d:8cc0:24ef:9a44:aed7:68f0]) by smtp.gmail.com with ESMTPSA id e84sm13974629pfh.149.2020.02.16.17.32.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Feb 2020 17:32:01 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id ECC838ACCE; Mon, 17 Feb 2020 12:01:56 +1030 (ACDT) Date: Mon, 17 Feb 2020 01:32:00 -0000 From: Alan Modra To: "H.J. Lu" Cc: Jan Beulich , "binutils@sourceware.org" Subject: Re: [committed, PATCH] x86: Don't disable SSE4a when disabling SSE4 Message-ID: <20200217013156.GB5570@bubble.grove.modra.org> References: <3bc597bb-10f9-80f9-8e00-f28aeb2eea77@suse.com> <20200217010628.GA5570@bubble.grove.modra.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-IsSubscribed: yes X-SW-Source: 2020-02/txt/msg00387.txt.bz2 On Sun, Feb 16, 2020 at 05:19:39PM -0800, H.J. Lu wrote: > On Sun, Feb 16, 2020 at 5:06 PM Alan Modra wrote: > > > > On Sun, Feb 16, 2020 at 08:47:56AM -0800, H.J. Lu wrote: > > > commit 7deea9aad8 changed nosse4 to include CpuSSE4a. But AMD SSE4a is > > > a superset of SSE3 and Intel SSE4 is a superset of SSSE3. Disable Intel > > > SSE4 shouldn't disable AMD SSE4a. This patch restores nosse4. It also > > > adds .sse4a and nosse4a. > > > > diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c > > index 79f4cc9d25..45106bcf6d 100644 > > --- a/opcodes/i386-gen.c > > +++ b/opcodes/i386-gen.c > > @@ -326,6 +326,8 @@ static initializer cpu_flag_init[] = > > { "CPU_ANY_SSE2_FLAGS", > > "CPU_ANY_SSE3_FLAGS|CpuSSE2" }, > > { "CPU_ANY_SSE3_FLAGS", > > + { "CPU_ANY_SSE4A_FLAGS", > > + "CPU_ANY_SSE3_FLAGS|CpuSSE4a" }, > > "CPU_ANY_SSSE3_FLAGS|CpuSSE3|CpuSSE4a" }, > > { "CPU_ANY_SSSE3_FLAGS", > > "CPU_ANY_SSE4_1_FLAGS|CpuSSSE3" }, > > @@ -333,8 +335,6 @@ static initializer cpu_flag_init[] = > > "CPU_ANY_SSE4_2_FLAGS|CpuSSE4_1" }, > > { "CPU_ANY_SSE4_2_FLAGS", > > "CpuSSE4_2" }, > > - { "CPU_ANY_SSE4_FLAGS", > > - "CPU_ANY_SSE4_1_FLAGS|CpuSSE4a" }, > > { "CPU_ANY_AVX_FLAGS", > > "CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" }, > > { "CPU_ANY_AVX2_FLAGS", > > > > Merge error? > > Is there anything wrong? It doesn't compile. The CPU_ANY_SSE4A_FLAGS entry is added inside the CPU_ANY_SSE3_FLAGS entry. Take a look at the diff. -- Alan Modra Australia Development Lab, IBM