From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-f196.google.com (mail-pl1-f196.google.com [209.85.214.196]) by server2.sourceware.org (Postfix) with ESMTPS id 8E61D393880B for ; Sun, 8 Mar 2020 05:46:50 +0000 (GMT) Received: by mail-pl1-f196.google.com with SMTP id j7so2668254plt.1 for ; Sat, 07 Mar 2020 21:46:50 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=CCjBfhHNi8/NFyFRDJhAHYCxfWYseYrbbP82LcUPIro=; b=hA9nYI8hkKTAKx7dLof36i2GXktuti8QbWKFJA2idsT4uxCcdUNGa8ae2RpkH8t/Xj UKLHjEXDIa/68SKmffaPyNfkAI8xoyKwH2r8OGXYaGQP5Bh1aUklrQkRaorC+KkBz3se +VC9Y5nMBR83WYdAOL+W2O8JQ0Q+tHU9MBSFZ6Tyt+4GjpM5XJP+Xz6Os2WW61Pwt99t sOl3XdNa/Nufl0nqLl4Oj2OjuyNhPnR6GXwE/yK0c+bUU0sDbu1sXn4R29fVcOHgYoAZ NrrjmMzIX2mxz5O/cDkn/ODjZm/dO2uVTRGbEHncpKHe/n2JOdaEH1NNYkgiH4bIfVHt f0Jg== X-Gm-Message-State: ANhLgQ1SeE+HwU41jrYmggehVwIhMDJcLSDN2pNW7G4dkNRi9XT6iI3H oeLMDgzO4BaOy1wi57uveGx4uWgh X-Google-Smtp-Source: ADFU+vs9iNyWvKKt055wz/HliUCq9hVr9hfPlR/j4Y8/1Sklq3/YwW8WwF75mTpWzdtdH1b1pE86Rw== X-Received: by 2002:a17:902:8ec6:: with SMTP id x6mr10313682plo.163.1583646409728; Sat, 07 Mar 2020 21:46:49 -0800 (PST) Received: from localhost ([2601:647:4b01:ae80::51fb]) by smtp.gmail.com with ESMTPSA id o71sm14375281pjo.35.2020.03.07.21.46.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Mar 2020 21:46:49 -0800 (PST) Date: Sat, 7 Mar 2020 21:46:48 -0800 From: Fangrui Song To: Nelson Chu Cc: binutils@sourceware.org, jimw@sifive.com, jrtc27@jrtc27.com, kito.cheng@sifive.com, palmerdabbelt@google.com Subject: Re: [PATCH v2 2/2] RISC-V: Support assembler modifier %got_pcrel_hi. Message-ID: <20200308054648.jhwkfpi6lmk5wnit@google.com> References: <1583298485-8506-1-git-send-email-nelson.chu@sifive.com> <1583298485-8506-3-git-send-email-nelson.chu@sifive.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <1583298485-8506-3-git-send-email-nelson.chu@sifive.com> X-Spam-Status: No, score=-26.6 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 08 Mar 2020 05:46:51 -0000 Is "assembler operator" more conventional than "assembler modifier"? On 2020-03-03, Nelson Chu wrote: > gas/ > * config/tc-riscv.c: Support the modifier %got_pcrel_hi. > * doc/c-riscv.texi: Add documentation. > * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new > modifier %got_pcrel_hi. > * testsuite/gas/riscv/no-relax-reloc.s: Likewise. > * testsuite/gas/riscv/relax-reloc.d: Likewise. > * testsuite/gas/riscv/relax-reloc.s: Likewise. >--- > gas/config/tc-riscv.c | 1 + > gas/doc/c-riscv.texi | 17 +++++++++++++++++ > gas/testsuite/gas/riscv/no-relax-reloc.d | 4 +++- > gas/testsuite/gas/riscv/no-relax-reloc.s | 7 +++++-- > gas/testsuite/gas/riscv/relax-reloc.d | 7 +++++-- > gas/testsuite/gas/riscv/relax-reloc.s | 7 +++++-- > 6 files changed, 36 insertions(+), 7 deletions(-) > >diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c >index ddd4d14..168561e 100644 >--- a/gas/config/tc-riscv.c >+++ b/gas/config/tc-riscv.c >@@ -1308,6 +1308,7 @@ static const struct percent_op_match percent_op_utype[] = > { > {"%tprel_hi", BFD_RELOC_RISCV_TPREL_HI20}, > {"%pcrel_hi", BFD_RELOC_RISCV_PCREL_HI20}, >+ {"%got_pcrel_hi", BFD_RELOC_RISCV_GOT_HI20}, > {"%tls_ie_pcrel_hi", BFD_RELOC_RISCV_TLS_GOT_HI20}, > {"%tls_gd_pcrel_hi", BFD_RELOC_RISCV_TLS_GD_HI20}, > {"%hi", BFD_RELOC_RISCV_HI20}, >diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi >index 6e932dc..488cf56 100644 >--- a/gas/doc/c-riscv.texi >+++ b/gas/doc/c-riscv.texi >@@ -257,6 +257,23 @@ Or you can use the pseudo lla/lw/sw/... instruction to do this. > lla a0, @var{symbol} > @end smallexample > >+@item %got_pcrel_hi(@var{symbol}) >+The high 20 bits of relative address between pc and the GOT entry of >+@var{symbol}. This is usually used with the %pcrel_lo modifier to access >+the GOT entry. >+ >+@smallexample >+@var{label}: >+ auipc a0, %got_pcrel_hi(@var{symbol}) // R_RISCV_GOT_HI20 >+ addi a0, a0, %pcrel_lo(@var{label}) // R_RISCV_PCREL_LO12_I >+ >+@var{label}: >+ auipc a0, %got_pcrel_hi(@var{symbol}) // R_RISCV_GOT_HI20 >+ load/store a0, %pcrel_lo(@var{label})(a0) // R_RISCV_PCREL_LO12_I/S >+@end smallexample >+ >+Also, the pseudo la instruction with PIC has similar behavior. >+ > @item %tprel_add(@var{symbol}) > This is used purely to associate the R_RISCV_TPREL_ADD relocation for > TLS relaxation. This one is only valid as the fourth operand to the normally >diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.d b/gas/testsuite/gas/riscv/no-relax-reloc.d >index 62f28e0..c2ca1aa 100644 >--- a/gas/testsuite/gas/riscv/no-relax-reloc.d >+++ b/gas/testsuite/gas/riscv/no-relax-reloc.d >@@ -9,4 +9,6 @@ RELOCATION RECORDS FOR .* > 0+4 R_RISCV_LO12_I.* > 0+8 R_RISCV_PCREL_HI20.* > 0+c R_RISCV_PCREL_LO12_I.* >-0+10 R_RISCV_CALL.* >+0+10 R_RISCV_GOT_HI20.* >+0+14 R_RISCV_PCREL_LO12_I.* >+0+18 R_RISCV_CALL.* >diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.s b/gas/testsuite/gas/riscv/no-relax-reloc.s >index 7f1a484..2aab995 100644 >--- a/gas/testsuite/gas/riscv/no-relax-reloc.s >+++ b/gas/testsuite/gas/riscv/no-relax-reloc.s >@@ -2,7 +2,10 @@ target: > lui a5,%hi(target) > lw a5,%lo(target)(a5) > >- .LA0: auipc a5,%pcrel_hi(bar) >- lw a0,%pcrel_lo(.LA0)(a5) >+ .LA0: auipc a5,%pcrel_hi(symbol1) >+ lw a0,%pcrel_lo(.LA0)(a5) >+ >+ .LA1: auipc a5,%got_pcrel_hi(symbol2) >+ lw a0,%pcrel_lo(.LA1)(a5) > > call target >diff --git a/gas/testsuite/gas/riscv/relax-reloc.d b/gas/testsuite/gas/riscv/relax-reloc.d >index f5f592c..623218e 100644 >--- a/gas/testsuite/gas/riscv/relax-reloc.d >+++ b/gas/testsuite/gas/riscv/relax-reloc.d >@@ -13,5 +13,8 @@ RELOCATION RECORDS FOR .* > 0+8 R_RISCV_RELAX.* > 0+c R_RISCV_PCREL_LO12_I.* > 0+c R_RISCV_RELAX.* >-0+10 R_RISCV_CALL.* >-0+10 R_RISCV_RELAX.* >+0+10 R_RISCV_GOT_HI20.* >+0+14 R_RISCV_PCREL_LO12_I.* >+0+14 R_RISCV_RELAX.* >+0+18 R_RISCV_CALL.* >+0+18 R_RISCV_RELAX.* >diff --git a/gas/testsuite/gas/riscv/relax-reloc.s b/gas/testsuite/gas/riscv/relax-reloc.s >index 7f1a484..2aab995 100644 >--- a/gas/testsuite/gas/riscv/relax-reloc.s >+++ b/gas/testsuite/gas/riscv/relax-reloc.s >@@ -2,7 +2,10 @@ target: > lui a5,%hi(target) > lw a5,%lo(target)(a5) > >- .LA0: auipc a5,%pcrel_hi(bar) >- lw a0,%pcrel_lo(.LA0)(a5) >+ .LA0: auipc a5,%pcrel_hi(symbol1) >+ lw a0,%pcrel_lo(.LA0)(a5) >+ >+ .LA1: auipc a5,%got_pcrel_hi(symbol2) >+ lw a0,%pcrel_lo(.LA1)(a5) > > call target