From: Alan Modra <amodra@gmail.com>
To: "Jose E. Marchesi" <jose.marchesi@oracle.com>
Cc: binutils@sourceware.org
Subject: Re: [PATCH 2/3] opcodes: discriminate endianness and insn-endianness in CGEN ports
Date: Mon, 1 Jun 2020 17:01:20 +0930 [thread overview]
Message-ID: <20200601073120.GL5475@bubble.grove.modra.org> (raw)
In-Reply-To: <20200529170820.3875-3-jose.marchesi@oracle.com>
On Fri, May 29, 2020 at 07:08:19PM +0200, Jose E. Marchesi via Binutils wrote:
> @@ -906,13 +907,15 @@ gas_cgen_md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
> {
> CGEN_INSN_INT insn_value =
> cgen_get_insn_value (cd, (unsigned char *) where,
> - CGEN_INSN_BITSIZE (insn));
> + CGEN_INSN_BITSIZE (insn),
> + cd->endian);
>
> /* ??? 0 is passed for `pc'. */
> errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
> &insn_value, (bfd_vma) 0);
> cgen_put_insn_value (cd, (unsigned char *) where,
> - CGEN_INSN_BITSIZE (insn), insn_value);
> + CGEN_INSN_BITSIZE (insn), insn_value,
> + cd->endian);
> }
> #else
> /* ??? 0 is passed for `pc'. */
The above looks to be a typo. Shouldn't you be using instruction
endianness here when modifying instruction operand fields? The same
question applies for tc-bpf.c and tc-mep changes.
--
Alan Modra
Australia Development Lab, IBM
next prev parent reply other threads:[~2020-06-01 7:31 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-29 17:08 [PATCH 0/3] Improve insn endianness support " Jose E. Marchesi
2020-05-29 17:08 ` [PATCH 1/3] opcodes: support insn endianness in cgen_cpu_open Jose E. Marchesi
2020-06-01 7:19 ` Alan Modra
2020-05-29 17:08 ` [PATCH 2/3] opcodes: discriminate endianness and insn-endianness in CGEN ports Jose E. Marchesi
2020-06-01 7:31 ` Alan Modra [this message]
2020-06-02 12:47 ` Jose E. Marchesi
2020-06-02 13:29 ` Jose E. Marchesi
2020-05-29 17:08 ` [PATCH 3/3] cpu, gas, opcodes: remove no longer needed workaround from the BPF port Jose E. Marchesi
2020-06-01 7:34 ` Alan Modra
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