From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by sourceware.org (Postfix) with ESMTPS id 254EF3857C52 for ; Thu, 24 Sep 2020 22:20:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 254EF3857C52 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=jimw@sifive.com Received: by mail-pf1-x435.google.com with SMTP id d9so947464pfd.3 for ; Thu, 24 Sep 2020 15:20:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id; bh=OAntXDTW6KTx4vqHAcIaiJP6AKXIyYXJDY2dNo7CHOE=; b=BbciDQRgewlPf5nl/O9eldRcw4b4wcu5EhsaGBiquMIlWsivT2YJZJv71/fL8mYaSH lxIJ2M78ju5NnHdfovrgUcCUQdo2tl1710To+TaYxdzjsNdH4tUdNdWeUlp/ZLukB2gf BaC+x0e9NDL4LMbzriz6mEoB6anterBOtBXxTprH3MJ6hbFtKvDCfXH0eBNa+R0Ikkgi HyF3fR5e0TTSEXlhi/C/OzO/ZfJrxO+St3gfwPyH06Kt5WSp7H3lipsWcdHIkpgivix4 KsUinXPbpNXbaoAgJ0A5VKLrUtBtE43yC8oePxBvd8zHWSsP+m4ZZkmN+FIfmlpSPrB7 dheA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=OAntXDTW6KTx4vqHAcIaiJP6AKXIyYXJDY2dNo7CHOE=; b=lsiU9K8FtC05k5DYEEgIFQY+Lob8mi8/7YNVCNT5Badd46NF7WwzB26utCKnuE8xAd rD0S/Uf3OWwLHxtt3AnYXRjrPrf/J1jDxWIyprhJgKyCqo7N1+asYpz2BKeeu0LhrmJe +e+1Gzjg41VThIbOuaUDHlHisHlIGlKBTVwkD03nCMRaSpNMDQQfPl+B9XoPNQLlD6az F+fUKp0keiz00LRrQn4gq4oFt3NEAAPezfUvj93DC43yMrudaNe6Jf0XhXXDeGnmzSmH inbCHHYnIcoreZTWKQC4NLoF9kn6OIrmDbOzN24BMXzTsdLl5m99jHPKg3MIWi03WZsx ZTKA== X-Gm-Message-State: AOAM5334WGLmXFTqfSFpNrAR5E0CmLG1Ibi9M4d0bkJ/VcYXaA80VtIq JFStzAHCLywRMxT2toT+DdNWUqi5f+WhxlXT X-Google-Smtp-Source: ABdhPJwsuSVSxFs5mt8gmxRjLeYA1V2aI0qGs3UQLaS52OBKApURC8acZ/QCGuh8dIiG1UmQIMFrGg== X-Received: by 2002:a17:902:6bc1:b029:d0:cbe1:e76e with SMTP id m1-20020a1709026bc1b02900d0cbe1e76emr1277741plt.21.1600986021339; Thu, 24 Sep 2020 15:20:21 -0700 (PDT) Received: from rohan.hsd1.ca.comcast.net ([2601:646:c180:b150:c90b:f747:9a28:5446]) by smtp.gmail.com with ESMTPSA id s70sm337476pgc.11.2020.09.24.15.20.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Sep 2020 15:20:20 -0700 (PDT) From: Jim Wilson To: binutils@sourceware.org Subject: [PATCH] RISC-V: Error for relaxable branch in absolute section. Date: Thu, 24 Sep 2020 15:20:18 -0700 Message-Id: <20200924222018.29263-1-jimw@sifive.com> X-Mailer: git-send-email 2.17.1 X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Sep 2020 22:20:24 -0000 Emit an error instead of crashing in frag_new, handling this same as the i386 port. Tested with riscv{32,64}-{elf,linux} cross build and test. There were no regressions. The new testcase fails without the patch and works with the patch. Committed. Jim gas/ PR 26400 * config/tc-riscv.c (append_insn): If in absolute section, emit error before add_relaxed_insn call. * testsuite/gas/riscv/absolute-sec.d: New. * testsuite/gas/riscv/absolute-sec.l: New. * testsuite/gas/riscv/absolute-sec.s: New. --- gas/config/tc-riscv.c | 7 +++++++ gas/testsuite/gas/riscv/absolute-sec.d | 3 +++ gas/testsuite/gas/riscv/absolute-sec.l | 2 ++ gas/testsuite/gas/riscv/absolute-sec.s | 2 ++ 4 files changed, 14 insertions(+) create mode 100644 gas/testsuite/gas/riscv/absolute-sec.d create mode 100644 gas/testsuite/gas/riscv/absolute-sec.l create mode 100644 gas/testsuite/gas/riscv/absolute-sec.s diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index eb31e42a2e..7c228430ad 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -1106,6 +1106,13 @@ append_insn (struct riscv_cl_insn *ip, expressionS *address_expr, int j = reloc_type == BFD_RELOC_RISCV_JMP; int best_case = riscv_insn_length (ip->insn_opcode); unsigned worst_case = relaxed_branch_length (NULL, NULL, 0); + + if (now_seg == absolute_section) + { + as_bad (_("relaxable branches not supported in absolute section")); + return; + } + add_relaxed_insn (ip, worst_case, best_case, RELAX_BRANCH_ENCODE (j, best_case == 2, worst_case), address_expr->X_add_symbol, diff --git a/gas/testsuite/gas/riscv/absolute-sec.d b/gas/testsuite/gas/riscv/absolute-sec.d new file mode 100644 index 0000000000..c32e94eed1 --- /dev/null +++ b/gas/testsuite/gas/riscv/absolute-sec.d @@ -0,0 +1,3 @@ +#as: +#source absolute-sec.s +#error_output: absolute-sec.l diff --git a/gas/testsuite/gas/riscv/absolute-sec.l b/gas/testsuite/gas/riscv/absolute-sec.l new file mode 100644 index 0000000000..f5d32c47ac --- /dev/null +++ b/gas/testsuite/gas/riscv/absolute-sec.l @@ -0,0 +1,2 @@ +.*: Assembler messages: +.*: Error: relaxable branches not supported in absolute section diff --git a/gas/testsuite/gas/riscv/absolute-sec.s b/gas/testsuite/gas/riscv/absolute-sec.s new file mode 100644 index 0000000000..d7d67997da --- /dev/null +++ b/gas/testsuite/gas/riscv/absolute-sec.s @@ -0,0 +1,2 @@ + .offset 0 + jal x0, 100 -- 2.17.1