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[135.181.61.214]) by smtp.gmail.com with ESMTPSA id f4sm497651lfd.198.2021.01.06.09.30.56 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Jan 2021 09:30:57 -0800 (PST) From: Philipp Tomsich To: binutils@sourceware.org Cc: Kito Cheng , Nelson Chu , Philipp Tomsich Subject: [PATCH] riscv: add 'pause' hint-instruction Date: Wed, 6 Jan 2021 18:30:52 +0100 Message-Id: <20210106173052.27766-1-philipp.tomsich@vrull.eu> X-Mailer: git-send-email 2.18.4 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 06 Jan 2021 17:31:02 -0000 Add support for the 'pause' hint-instruction, as specified in the "Zihintpause" extension. The 'pause' instruction is encoded as a special form of a memory 'fence' (which is available as part of the base instruction set): the chosen encoding does not mandate any particular memory ordering and therefore is a true hint. --- gas/ChangeLog | 6 ++++++ gas/testsuite/gas/riscv/pause.d | 11 +++++++++++ gas/testsuite/gas/riscv/pause.s | 2 ++ include/opcode/riscv-opc.h | 3 +++ opcodes/ChangeLog | 4 ++++ opcodes/riscv-opc.c | 1 + 6 files changed, 27 insertions(+) create mode 100644 gas/testsuite/gas/riscv/pause.d create mode 100644 gas/testsuite/gas/riscv/pause.s diff --git a/gas/ChangeLog b/gas/ChangeLog index 03ea1a1c9c3..f12cfc6aa6e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2021-01-05 Philipp Tomsich + + * testsuite/gas/riscv/pause.s: New file, adding coverage for + the "pause" hint instruction. + * testsuite/gas/riscv/pause.d: Same. + 2021-01-04 H.J. Lu PR ld/26256 diff --git a/gas/testsuite/gas/riscv/pause.d b/gas/testsuite/gas/riscv/pause.d new file mode 100644 index 00000000000..7ae10ab6db2 --- /dev/null +++ b/gas/testsuite/gas/riscv/pause.d @@ -0,0 +1,11 @@ +#as: -march=rv32ic +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+0:[ ]+0100000f[ ]+pause + diff --git a/gas/testsuite/gas/riscv/pause.s b/gas/testsuite/gas/riscv/pause.s new file mode 100644 index 00000000000..4cdf3577764 --- /dev/null +++ b/gas/testsuite/gas/riscv/pause.s @@ -0,0 +1,2 @@ +target: + pause diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h index cf557531725..7d2dd01fb3c 100644 --- a/include/opcode/riscv-opc.h +++ b/include/opcode/riscv-opc.h @@ -163,6 +163,8 @@ #define MASK_FENCE_I 0x707f #define MATCH_FENCE_TSO 0x8330000f #define MASK_FENCE_TSO 0xfff0707f +#define MATCH_PAUSE 0x0100000f +#define MASK_PAUSE 0xffffffff #define MATCH_MUL 0x2000033 #define MASK_MUL 0xfe00707f #define MATCH_MULH 0x2001033 @@ -912,6 +914,7 @@ DECLARE_INSN(sb, MATCH_SB, MASK_SB) DECLARE_INSN(sh, MATCH_SH, MASK_SH) DECLARE_INSN(sw, MATCH_SW, MASK_SW) DECLARE_INSN(sd, MATCH_SD, MASK_SD) +DECLARE_INSN(pause, MATCH_PAUSE, MASK_PAUSE) DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE) DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I) DECLARE_INSN(mul, MATCH_MUL, MASK_MUL) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 199f89b31b7..4a6d6a44dfc 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2021-01-05 Philipp Tomsich + + * opcodes/riscv-opc.c (riscv_opcodes): Add pause hint instruction. + 2021-01-01 Alan Modra Update year range in copyright notice of all files. diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index cb0ebd3d32e..c702f1b0388 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -347,6 +347,7 @@ const struct riscv_opcode riscv_opcodes[] = {"sw", 0, INSN_CLASS_C, "Ct,Ck(Cs)", MATCH_C_SW, MASK_C_SW, match_opcode, INSN_ALIAS|INSN_DREF|INSN_4_BYTE }, {"sw", 0, INSN_CLASS_I, "t,q(s)", MATCH_SW, MASK_SW, match_opcode, INSN_DREF|INSN_4_BYTE }, {"sw", 0, INSN_CLASS_I, "t,A,s", 0, (int) M_SW, match_never, INSN_MACRO }, +{"pause", 0, INSN_CLASS_I, "", MATCH_PAUSE, MASK_PAUSE, match_opcode, 0 }, {"fence", 0, INSN_CLASS_I, "", MATCH_FENCE | MASK_PRED | MASK_SUCC, MASK_FENCE | MASK_RD | MASK_RS1 | MASK_IMM, match_opcode, INSN_ALIAS }, {"fence", 0, INSN_CLASS_I, "P,Q", MATCH_FENCE, MASK_FENCE | MASK_RD | MASK_RS1 | (MASK_IMM & ~MASK_PRED & ~MASK_SUCC), match_opcode, 0 }, {"fence.i", 0, INSN_CLASS_ZIFENCEI, "", MATCH_FENCE_I, MASK_FENCE | MASK_RD | MASK_RS1 | MASK_IMM, match_opcode, 0 }, -- 2.18.4