From: Richard Earnshaw <rearnsha@arm.com>
To: binutils@sourceware.org
Cc: Richard Earnshaw <rearnsha@arm.com>
Subject: [committed] arm: don't treat XScale features as part of the FPU [PR 28031]
Date: Thu, 1 Jul 2021 11:40:42 +0100 [thread overview]
Message-ID: <20210701104042.3225796-1-rearnsha@arm.com> (raw)
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Although the XScale and its iwMMX extensions are implemented in the
Arm co-processor space, they are not considered to be part of the FPU
specification. In particular, they cannot be enabled or disabled via
a .fpu directive. It's therefore incorrect to strip these properties
when a new .fpu directive is encountered.
Note that the legacy Maverick co-processor is considered to be a FPU
and it is possible to control this via the .fpu directive.
include:
PR gas/28031
* opcode/arm.h (FPU_ANY): Exclude XScale-related features.
---
include/ChangeLog | 5 +++++
include/opcode/arm.h | 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
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[-- Attachment #2: 0001-arm-don-t-treat-XScale-features-as-part-of-the-FPU-P.patch --]
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diff --git a/include/ChangeLog b/include/ChangeLog
index 2a5b16fbea1..06bc4c5d59b 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2021-07-01 Richard Earnshaw <rearnsha@arm.com>
+
+ PR gas/28031
+ * opcode/arm.h (FPU_ANY): Exclude XScale-related features.
+
2021-06-18 H.J. Lu <hongjiu.lu@intel.com>
* elf/common.h (GNU_PROPERTY_UINT32_AND_LO): New.
diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index 03a80712c0a..90c09a70658 100644
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -383,7 +383,7 @@
#define ARM_ARCH_NONE ARM_FEATURE_LOW (0, 0)
#define FPU_NONE ARM_FEATURE_LOW (0, 0)
#define ARM_ANY ARM_FEATURE (-1, -1 & ~ (ARM_EXT2_MVE | ARM_EXT2_MVE_FP), 0) /* Any basic core. */
-#define FPU_ANY ARM_FEATURE_COPROC (-1) /* Any FPU. */
+#define FPU_ANY ARM_FEATURE_COPROC (-1 & ~(ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)) /* Any FPU. */
#define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
/* Extensions containing some Thumb-2 instructions. If any is present, Thumb
ISA is Thumb-2. */
reply other threads:[~2021-07-01 10:41 UTC|newest]
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