From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 5BFC4384F02A for ; Thu, 1 Jul 2021 10:41:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5BFC4384F02A Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B34B5D6E; Thu, 1 Jul 2021 03:41:16 -0700 (PDT) Received: from e126323.arm.com (unknown [10.57.8.94]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 357B63F718; Thu, 1 Jul 2021 03:41:16 -0700 (PDT) From: Richard Earnshaw To: binutils@sourceware.org Cc: Richard Earnshaw Subject: [committed] arm: don't treat XScale features as part of the FPU [PR 28031] Date: Thu, 1 Jul 2021 11:40:42 +0100 Message-Id: <20210701104042.3225796-1-rearnsha@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------2.25.1" Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-14.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Jul 2021 10:41:18 -0000 This is a multi-part message in MIME format. --------------2.25.1 Content-Type: text/plain; charset=UTF-8; format=fixed Content-Transfer-Encoding: 8bit Although the XScale and its iwMMX extensions are implemented in the Arm co-processor space, they are not considered to be part of the FPU specification. In particular, they cannot be enabled or disabled via a .fpu directive. It's therefore incorrect to strip these properties when a new .fpu directive is encountered. Note that the legacy Maverick co-processor is considered to be a FPU and it is possible to control this via the .fpu directive. include: PR gas/28031 * opcode/arm.h (FPU_ANY): Exclude XScale-related features. --- include/ChangeLog | 5 +++++ include/opcode/arm.h | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) --------------2.25.1 Content-Type: text/x-patch; name="0001-arm-don-t-treat-XScale-features-as-part-of-the-FPU-P.patch" Content-Transfer-Encoding: 8bit Content-Disposition: attachment; filename="0001-arm-don-t-treat-XScale-features-as-part-of-the-FPU-P.patch" diff --git a/include/ChangeLog b/include/ChangeLog index 2a5b16fbea1..06bc4c5d59b 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2021-07-01 Richard Earnshaw + + PR gas/28031 + * opcode/arm.h (FPU_ANY): Exclude XScale-related features. + 2021-06-18 H.J. Lu * elf/common.h (GNU_PROPERTY_UINT32_AND_LO): New. diff --git a/include/opcode/arm.h b/include/opcode/arm.h index 03a80712c0a..90c09a70658 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -383,7 +383,7 @@ #define ARM_ARCH_NONE ARM_FEATURE_LOW (0, 0) #define FPU_NONE ARM_FEATURE_LOW (0, 0) #define ARM_ANY ARM_FEATURE (-1, -1 & ~ (ARM_EXT2_MVE | ARM_EXT2_MVE_FP), 0) /* Any basic core. */ -#define FPU_ANY ARM_FEATURE_COPROC (-1) /* Any FPU. */ +#define FPU_ANY ARM_FEATURE_COPROC (-1 & ~(ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)) /* Any FPU. */ #define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK) /* Extensions containing some Thumb-2 instructions. If any is present, Thumb ISA is Thumb-2. */ --------------2.25.1--