public inbox for binutils@sourceware.org
 help / color / mirror / Atom feed
From: Andrea Corallo <andrea.corallo@arm.com>
To: Binutils <binutils@sourceware.org>
Cc: "richard.earnshaw@arm.com" <richard.earnshaw@arm.com>
Subject: PATCH [3/10] arm: add 'aut' instruction for Armv8.1-M pacbti extension
Date: Tue, 20 Jul 2021 17:38:52 +0200	[thread overview]
Message-ID: <gkr5yx5ov03.fsf@arm.com> (raw)
Message-ID: <20210720153852.nDCZaNRApl5JJFkRI1xXABuCZkvyFS6z54N1MMS45mE@z> (raw)

[-- Attachment #1: Type: text/plain, Size: 555 bytes --]

Hi all,

third patch of the series adding support for PACBTI for Cortex-M.

See:
- Armv8.1-M Pointer Authentication and Branch Target Identification Extension [1]
- Armv8-M Architecture Reference Manual [2]

This is to add the 'aut' instruction.

The series was tested and does not introduce regressions.

Regards

  Andrea

[1] <https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension>
[2] <https://developer.arm.com/documentation/ddi0553/latest>


[-- Attachment #2: 0003-PATCH-3-10-arm-add-aut-instruction-for-Armv8.1-M-pac.patch --]
[-- Type: text/plain, Size: 4180 bytes --]

From 3f9648d785b2a710949995ce3b1b84785badcff4 Mon Sep 17 00:00:00 2001
From: Andrea Corallo <andrea.corallo@arm.com>
Date: Wed, 19 May 2021 09:00:14 +0200
Subject: [PATCH 03/10] PATCH [3/10] arm: add 'aut' instruction for Armv8.1-M
 pacbti extension

gas/
2021-06-11  Andrea Corallo  <andrea.corallo@arm.com>

	* config/tc-arm.c (insns): Add 'aut.'
	(T16_32_TAB): Add '_aut'.
	* testsuite/gas/arm/armv8_1-m-pacbti-bad.l: Add 'aut' tests.
	* testsuite/gas/arm/armv8_1-m-pacbti-bad.s: Likewise.
	* testsuite/gas/arm/armv8_1-m-pacbti.d: Likewise.
	* testsuite/gas/arm/armv8_1-m-pacbti.s: Likewise.

opcodes/
2021-06-11  Andrea Corallo  <andrea.corallo@arm.com>

	* arm-dis.c (thumb32_opcodes): Add 'aut'.
---
 gas/config/tc-arm.c                          | 2 ++
 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l | 3 +++
 gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s | 3 +++
 gas/testsuite/gas/arm/armv8_1-m-pacbti.d     | 1 +
 gas/testsuite/gas/arm/armv8_1-m-pacbti.s     | 1 +
 opcodes/arm-dis.c                            | 2 ++
 6 files changed, 12 insertions(+)

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index ed870f01aee..b5d23357fc0 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -11450,6 +11450,7 @@ encode_thumb32_addr_mode (int i, bool is_t, bool is_d)
   X(_ands,  4000, ea100000),			\
   X(_asr,   1000, fa40f000),			\
   X(_asrs,  1000, fa50f000),			\
+  X(_aut,   0000, f3af802d),			\
   X(_b,     e000, f000b000),			\
   X(_bcond, d000, f0008000),			\
   X(_bf,    0000, f040e001),			\
@@ -26326,6 +26327,7 @@ static const struct asm_opcode insns[] =
  /* Armv8.1-M Mainline instructions.  */
 #undef  THUMB_VARIANT
 #define THUMB_VARIANT & arm_ext_v8_1m_main
+ toU("aut",   _aut, 3, (R12, LR, SP), t_pacbti),
  ToU("bti",   f3af800f, 0, (), noargs),
  toU("pacbti", _pacbti, 3, (R12, LR, SP), t_pacbti),
  toU("cinc",  _cinc,  3, (RRnpcsp, RR_ZR, COND),	t_cond),
diff --git a/gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l b/gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l
index a812603d88d..317e62f731b 100644
--- a/gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l
+++ b/gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l
@@ -2,3 +2,6 @@
 .*:6: Error: operand must be r12 -- `pacbti r11,lr,sp'
 .*:7: Error: operand must be LR register -- `pacbti r12,r10,sp'
 .*:8: Error: operand must be SP register -- `pacbti r12,lr,r10'
+.*:9: Error: operand must be r12 -- `aut r11,lr,sp'
+.*:10: Error: operand must be LR register -- `aut r12,r10,sp'
+.*:11: Error: operand must be SP register -- `aut r12,lr,r10'
diff --git a/gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s b/gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s
index 64e71e70c11..c2ad20455c7 100644
--- a/gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s
+++ b/gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s
@@ -6,3 +6,6 @@
 	pacbti	r11, lr, sp
 	pacbti	r12, r10, sp
 	pacbti	r12, lr, r10
+	aut	r11, lr, sp
+	aut	r12, r10, sp
+	aut	r12, lr, r10
diff --git a/gas/testsuite/gas/arm/armv8_1-m-pacbti.d b/gas/testsuite/gas/arm/armv8_1-m-pacbti.d
index 593ac34ed49..fe11d7eb036 100644
--- a/gas/testsuite/gas/arm/armv8_1-m-pacbti.d
+++ b/gas/testsuite/gas/arm/armv8_1-m-pacbti.d
@@ -8,4 +8,5 @@
 Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> f3af 800f 	bti
 0[0-9a-f]+ <[^>]+> f3af 800d 	pacbti	r12, lr, sp
+0[0-9a-f]+ <[^>]+> f3af 802d 	aut	r12, lr, sp
 #...
diff --git a/gas/testsuite/gas/arm/armv8_1-m-pacbti.s b/gas/testsuite/gas/arm/armv8_1-m-pacbti.s
index 39db4542e39..14b0414a59b 100644
--- a/gas/testsuite/gas/arm/armv8_1-m-pacbti.s
+++ b/gas/testsuite/gas/arm/armv8_1-m-pacbti.s
@@ -4,3 +4,4 @@
 .Lstart:
 	bti
 	pacbti	r12, lr, sp
+	aut	r12, lr, sp
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 34b0ace58bc..8eeb303630b 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -4654,6 +4654,8 @@ static const struct opcode32 thumb32_opcodes[] =
 {
   /* Arm v8.1-M Mainline Pointer Authentication and Branch Target
      Identification Extension.  */
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
+   0xf3af802d, 0xffffffff, "aut\tr12, lr, sp"},
   {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
    0xf3af800f, 0xffffffff, "bti"},
   {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
-- 
2.20.1


             reply	other threads:[~2021-07-20 15:42 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-20 15:38 Andrea Corallo [this message]
2021-07-20 15:38 ` PATCH [4/4] arm: Add Tag_PACRET_use build attribute Andrea Corallo
2021-07-20 15:38 ` PATCH [2/4] arm: Add Tag_BTI_extension " Andrea Corallo
2021-07-20 15:38 ` PATCH [3/10] arm: add 'aut' instruction for Armv8.1-M pacbti extension Andrea Corallo
2021-07-20 15:38 ` PATCH [4/10] arm: add 'pac' " Andrea Corallo
2021-07-20 15:38 ` PATCH V2 [2/10] arm: add 'pacbti' " Andrea Corallo
2021-07-20 15:38 ` PATCH [8/10] arm: add 'autg' " Andrea Corallo
2021-07-20 15:38 ` PATCH [7/10] arm: add 'bxaut' " Andrea Corallo
2021-07-20 15:38 ` PATCH [10/10] arm: Alias 'ra_auth_code' to r12 for pacbti Andrea Corallo
2021-07-20 15:38 ` PATCH [6/10] arm: Add -march=armv8.1-m.main+pacbti flag Andrea Corallo
2021-07-20 15:38 ` PATCH [5/10] arm: Extend again arm_feature_set struct to provide more bits Andrea Corallo
2021-07-20 15:38 ` PATCH [9/10] arm: add 'pacg' instruction for Armv8.1-M pacbti extension Andrea Corallo
2021-07-20 15:38 ` PATCH [3/4] arm: Add Tag_BTI_use build attribute Andrea Corallo
2021-07-21 14:31 ` PATCH [1/10] arm: add 'bti' instruction for Armv8.1-M pacbti extension Nick Clifton
2021-07-21 15:12   ` Andrea Corallo
2021-07-26 12:32   ` Andrea Corallo
2021-08-10 15:31 ` PATCH [2/4] arm: Add Tag_BTI_extension build attribute Nick Clifton
2021-08-17 12:59   ` Andrea Corallo
2021-08-10 15:32 ` PATCH [3/4] arm: Add Tag_BTI_use " Nick Clifton
2021-08-10 15:33 ` PATCH [4/4] arm: Add Tag_PACRET_use " Nick Clifton
2021-08-10 15:33 ` PATCH V2 [2/10] arm: add 'pacbti' instruction for Armv8.1-M pacbti extension Nick Clifton

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=gkr5yx5ov03.fsf@arm.com \
    --to=andrea.corallo@arm.com \
    --cc=binutils@sourceware.org \
    --cc=richard.earnshaw@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).