From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cstnet.cn (smtp21.cstnet.cn [159.226.251.21]) by sourceware.org (Postfix) with ESMTP id 6D63D3858C60 for ; Tue, 2 Nov 2021 09:44:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6D63D3858C60 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from localhost.localdomain (unknown [120.77.47.200]) by APP-01 (Coremail) with SMTP id qwCowAC3vgKDCIFh2sFRBg--.46517S4; Tue, 02 Nov 2021 17:44:38 +0800 (CST) From: jiawei To: binutils@sourceware.org Cc: kito.cheng@sifive.com, nelson.chu@sifive.com, jimw@sifive.com, mjos@pqshield.com, ben.marshall@pqshield.com, cmuellner@ventanamicro.com, palmer@dabbelt.com, andrew@sifive.com, lazyparser@gmail.com, siyu@isrc.iscas.ac.cn, jiawei Subject: [PATCH 2/4] RISC-V: Minimal support of scalar crypto extension Date: Tue, 2 Nov 2021 17:44:01 +0800 Message-Id: <20211102094403.1196319-3-jiawei@iscas.ac.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211102094403.1196319-1-jiawei@iscas.ac.cn> References: <20211102094403.1196319-1-jiawei@iscas.ac.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: qwCowAC3vgKDCIFh2sFRBg--.46517S4 X-Coremail-Antispam: 1UD129KBjvJXoWxurWrtryftw4ftw43CFWUtwb_yoWrWr43pa 95Xw4qyry3tF1IqFn3A3Z2grWrXw4kCr47GFWIgwn8Aw48Jrs8Xr9xta4Yvr4rZF4qgw13 uw43WrW3ua15uF7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUBE14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_Jryl82xGYIkIc2 x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr1UM2 8EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AKxVW0oVCq3wAS 0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2 IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0 Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02628vn2kIc2 xKxwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v2 6r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2 Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_ Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMI IF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUHbyAUUUUU = X-Originating-IP: [120.77.47.200] X-CM-SenderInfo: 5mld4v3l6l2u1dvotugofq/1tbiCgcNAFz4kGDLIAAAs- X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Nov 2021 09:44:53 -0000 --- bfd/elfxx-riscv.c | 27 +++++++++++++++++++++++++++ gas/config/tc-riscv.c | 25 +++++++++++++++++++++++++ include/opcode/riscv.h | 11 +++++++++++ 3 files changed, 63 insertions(+) diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 0d8fc755b5c..049c26a42eb 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1075,6 +1075,20 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] = {"q", "d", check_implicit_always}, {"d", "f", check_implicit_always}, {"f", "zicsr", check_implicit_always}, + {"zk", "zkn", check_implicit_always}, + {"zk", "zkr", check_implicit_always}, + {"zk", "zkt", check_implicit_always}, + {"zkn", "zbkb", check_implicit_always}, + {"zkn", "zbkc", check_implicit_always}, + {"zkn", "zbkx", check_implicit_always}, + {"zkn", "zkne", check_implicit_always}, + {"zkn", "zknd", check_implicit_always}, + {"zkn", "zknh", check_implicit_always}, + {"zks", "zbkb", check_implicit_always}, + {"zks", "zbkc", check_implicit_always}, + {"zks", "zbkx", check_implicit_always}, + {"zks", "zksed", check_implicit_always}, + {"zks", "zksh", check_implicit_always}, {NULL, NULL, NULL} }; @@ -1146,6 +1160,19 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = {"zba", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zbc", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zbs", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zbkb", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zbkc", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zbkx", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zk", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zkn", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zknd", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zkne", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zknh", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zkr", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zks", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zksed", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zksh", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zkt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {NULL, 0, 0, 0, 0} }; diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index eb626f8e1d5..4e4dff419eb 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -301,6 +301,31 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class) return riscv_subset_supports ("zbc"); case INSN_CLASS_ZBS: return riscv_subset_supports ("zbs"); + case INSN_CLASS_ZBKB: + return riscv_subset_supports ("zbkb"); + case INSN_CLASS_ZBKC: + return riscv_subset_supports ("zbkc"); + case INSN_CLASS_ZBKX: + return riscv_subset_supports ("zbkx"); + case INSN_CLASS_ZBB_OR_ZBKB: + return (riscv_subset_supports ("zbb") + || riscv_subset_supports ("zbkb")); + case INSN_CLASS_ZBC_OR_ZBKC: + return (riscv_subset_supports ("zbc") + || riscv_subset_supports ("zbkc")); + case INSN_CLASS_ZKND: + return riscv_subset_supports ("zknd"); + case INSN_CLASS_ZKNE: + return riscv_subset_supports ("zkne"); + case INSN_CLASS_ZKNH: + return riscv_subset_supports ("zknh"); + case INSN_CLASS_ZKND_OR_ZKNE: + return (riscv_subset_supports ("zknd") + || riscv_subset_supports ("zkne")); + case INSN_CLASS_ZKSED: + return riscv_subset_supports ("zksed"); + case INSN_CLASS_ZKSH: + return riscv_subset_supports ("zksh"); default: as_fatal ("internal: unreachable"); return false; diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h index afcd41ff1dd..f61004bdf95 100644 --- a/include/opcode/riscv.h +++ b/include/opcode/riscv.h @@ -320,6 +320,17 @@ enum riscv_insn_class INSN_CLASS_ZBB, INSN_CLASS_ZBC, INSN_CLASS_ZBS, + INSN_CLASS_ZBKB, + INSN_CLASS_ZBKC, + INSN_CLASS_ZBKX, + INSN_CLASS_ZKND, + INSN_CLASS_ZKNE, + INSN_CLASS_ZKNH, + INSN_CLASS_ZKSED, + INSN_CLASS_ZKSH, + INSN_CLASS_ZBB_OR_ZBKB, + INSN_CLASS_ZBC_OR_ZBKC, + INSN_CLASS_ZKND_OR_ZKNE, }; /* This structure holds information for a particular instruction. */ -- 2.25.1