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[81.129.87.131]) by smtp.gmail.com with ESMTPSA id b3sm1230616ejl.67.2022.02.12.05.43.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Feb 2022 05:43:26 -0800 (PST) Received: by nz.home (Postfix, from userid 1000) id 89B6C1EE4FE23; Sat, 12 Feb 2022 13:43:25 +0000 (GMT) From: Sergei Trofimovich To: binutils@sourceware.org Cc: gdb-patches@sourceware.org, Sergei Trofimovich Subject: [PATCH] microblaze: fix fsqrt collicion to build on glibc-2.35 Date: Sat, 12 Feb 2022 13:43:19 +0000 Message-Id: <20220212134319.1754457-1-slyich@gmail.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 12 Feb 2022 13:43:29 -0000 From: Sergei Trofimovich 'fsqrt' is is now a part of C2X and is present in glibc-2.35. Notced as a gdb build failure: opcodes/microblaze-opcm.h:45:9: error: 'fsqrt' redeclared as different kind of symbol 45 | fint, fsqrt, glibc-2.35-dev/include/bits/mathcalls-narrow.h:36:20: note: previous declaration of 'fsqrt' with type 'float(double)' opcodes/ * microblaze-opcm.h: Renamed 'fsqrt' to 'microblaze_fsqrt'. * microblaze-opc.h: Follow 'fsqrt' rename. --- opcodes/microblaze-opc.h | 2 +- opcodes/microblaze-opcm.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h index 81bf2e19548..ffb0f08c692 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -268,7 +268,7 @@ const struct op_code_struct {"fcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000200, OPCODE_MASK_H4, fcmp_un, arithmetic_inst }, {"flt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000280, OPCODE_MASK_H4, flt, arithmetic_inst }, {"fint", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000300, OPCODE_MASK_H4, fint, arithmetic_inst }, - {"fsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000380, OPCODE_MASK_H4, fsqrt, arithmetic_inst }, + {"fsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000380, OPCODE_MASK_H4, microblaze_fsqrt, arithmetic_inst }, {"tget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C001000, OPCODE_MASK_H32, tget, anyware_inst }, {"tcget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C003000, OPCODE_MASK_H32, tcget, anyware_inst }, {"tnget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C005000, OPCODE_MASK_H32, tnget, anyware_inst }, diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h index 1b0955c4e0f..be681eb5d29 100644 --- a/opcodes/microblaze-opcm.h +++ b/opcodes/microblaze-opcm.h @@ -42,7 +42,8 @@ enum microblaze_instr shr, sw, swr, swx, lbui, lhui, lwi, sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, - fint, fsqrt, + /* 'fsqrt' is a glibc:math.h symbol */ + fint, microblaze_fsqrt, tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, eget, ecget, neget, necget, eput, ecput, neput, necput, teget, tecget, tneget, tnecget, teput, tecput, tneput, tnecput, -- 2.35.1