From: John Baldwin <jhb@FreeBSD.org>
To: binutils@sourceware.org, gdb-patches@sourceware.org
Subject: [PATCH 04/12] Add an arm-tls feature which includes the tpidruro register from CP15.
Date: Wed, 23 Mar 2022 14:00:43 -0700 [thread overview]
Message-ID: <20220323210048.25525-5-jhb@FreeBSD.org> (raw)
In-Reply-To: <20220323210048.25525-1-jhb@FreeBSD.org>
---
gdb/arch/aarch32.c | 2 ++
gdb/arch/arm.c | 6 +++++-
gdb/arch/arm.h | 7 ++++---
gdb/arm-fbsd-tdep.c | 4 ++--
gdb/arm-linux-nat.c | 6 +++---
gdb/arm-linux-tdep.c | 4 ++--
gdb/arm-netbsd-nat.c | 4 ++--
gdb/arm-tdep.c | 20 +++++++++++++++-----
gdb/arm-tdep.h | 2 +-
gdb/features/Makefile | 1 +
gdb/features/arm/arm-tls.c | 14 ++++++++++++++
gdb/features/arm/arm-tls.xml | 11 +++++++++++
12 files changed, 62 insertions(+), 19 deletions(-)
create mode 100644 gdb/features/arm/arm-tls.c
create mode 100644 gdb/features/arm/arm-tls.xml
diff --git a/gdb/arch/aarch32.c b/gdb/arch/aarch32.c
index 0c544d381f1..4d6ffb44a15 100644
--- a/gdb/arch/aarch32.c
+++ b/gdb/arch/aarch32.c
@@ -19,6 +19,7 @@
#include "aarch32.h"
#include "../features/arm/arm-core.c"
+#include "../features/arm/arm-tls.c"
#include "../features/arm/arm-vfpv3.c"
/* See aarch32.h. */
@@ -38,6 +39,7 @@ aarch32_create_target_description ()
/* Create a vfpv3 feature, then a blank NEON feature. */
regnum = create_feature_arm_arm_vfpv3 (tdesc.get (), regnum);
tdesc_create_feature (tdesc.get (), "org.gnu.gdb.arm.neon");
+ regnum = create_feature_arm_arm_tls (tdesc.get (), regnum);
return tdesc.release ();
}
diff --git a/gdb/arch/arm.c b/gdb/arch/arm.c
index 126e46a950a..15b600e22f4 100644
--- a/gdb/arch/arm.c
+++ b/gdb/arch/arm.c
@@ -22,6 +22,7 @@
#include "arm.h"
#include "../features/arm/arm-core.c"
+#include "../features/arm/arm-tls.c"
#include "../features/arm/arm-vfpv2.c"
#include "../features/arm/arm-vfpv3.c"
#include "../features/arm/xscale-iwmmxt.c"
@@ -373,7 +374,7 @@ shifted_reg_val (struct regcache *regcache, unsigned long inst,
/* See arch/arm.h. */
target_desc *
-arm_create_target_description (arm_fp_type fp_type)
+arm_create_target_description (arm_fp_type fp_type, bool tls)
{
target_desc_up tdesc = allocate_target_description ();
@@ -409,6 +410,9 @@ arm_create_target_description (arm_fp_type fp_type)
error (_("Invalid Arm FP type: %d"), fp_type);
}
+ if (tls)
+ regnum = create_feature_arm_arm_tls (tdesc.get (), regnum);
+
return tdesc.release ();
}
diff --git a/gdb/arch/arm.h b/gdb/arch/arm.h
index f75470e7572..32f29b20d33 100644
--- a/gdb/arch/arm.h
+++ b/gdb/arch/arm.h
@@ -49,6 +49,7 @@ enum gdb_regnum {
ARM_D0_REGNUM, /* VFP double-precision registers. */
ARM_D31_REGNUM = ARM_D0_REGNUM + 31,
ARM_FPSCR_REGNUM,
+ ARM_TPIDRURO_REGNUM,
/* Other useful registers. */
ARM_FP_REGNUM = 11, /* Frame register in ARM code, if used. */
@@ -65,8 +66,8 @@ enum arm_register_counts {
ARM_NUM_ARG_REGS = 4,
/* Number of floating point argument registers. */
ARM_NUM_FP_ARG_REGS = 4,
- /* Number of registers (old, defined as ARM_FPSCR_REGNUM + 1. */
- ARM_NUM_REGS = ARM_FPSCR_REGNUM + 1
+ /* Number of registers (old, defined as ARM_TPIDRURO_REGNUM + 1. */
+ ARM_NUM_REGS = ARM_TPIDRURO_REGNUM + 1
};
/* Enum describing the different kinds of breakpoints. */
@@ -193,7 +194,7 @@ unsigned long shifted_reg_val (struct regcache *regcache,
/* Create an Arm target description with the given FP hardware type. */
-target_desc *arm_create_target_description (arm_fp_type fp_type);
+target_desc *arm_create_target_description (arm_fp_type fp_type, bool tls);
/* Create an Arm M-profile target description with the given hardware type. */
diff --git a/gdb/arm-fbsd-tdep.c b/gdb/arm-fbsd-tdep.c
index bf337b13f98..06745a36186 100644
--- a/gdb/arm-fbsd-tdep.c
+++ b/gdb/arm-fbsd-tdep.c
@@ -188,9 +188,9 @@ arm_fbsd_read_description_auxv (struct target_ops *target)
return aarch32_read_description ();
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPD32))
== (HWCAP_VFPv3 | HWCAP_VFPD32))
- return arm_read_description (ARM_FP_TYPE_VFPV3);
+ return arm_read_description (ARM_FP_TYPE_VFPV3, false);
else
- return arm_read_description (ARM_FP_TYPE_VFPV2);
+ return arm_read_description (ARM_FP_TYPE_VFPV2, false);
}
return nullptr;
diff --git a/gdb/arm-linux-nat.c b/gdb/arm-linux-nat.c
index f0f09acf2f9..2abaf5a675d 100644
--- a/gdb/arm-linux-nat.c
+++ b/gdb/arm-linux-nat.c
@@ -550,7 +550,7 @@ arm_linux_nat_target::read_description ()
}
if (arm_hwcap & HWCAP_IWMMXT)
- return arm_read_description (ARM_FP_TYPE_IWMMXT);
+ return arm_read_description (ARM_FP_TYPE_IWMMXT, false);
if (arm_hwcap & HWCAP_VFP)
{
@@ -567,9 +567,9 @@ arm_linux_nat_target::read_description ()
if (arm_hwcap & HWCAP_NEON)
return aarch32_read_description ();
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
- return arm_read_description (ARM_FP_TYPE_VFPV3);
+ return arm_read_description (ARM_FP_TYPE_VFPV3, false);
- return arm_read_description (ARM_FP_TYPE_VFPV2);
+ return arm_read_description (ARM_FP_TYPE_VFPV2, false);
}
return this->beneath ()->read_description ();
diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c
index 6aac016afb9..805c6ac0459 100644
--- a/gdb/arm-linux-tdep.c
+++ b/gdb/arm-linux-tdep.c
@@ -741,9 +741,9 @@ arm_linux_core_read_description (struct gdbarch *gdbarch,
if (arm_hwcap & HWCAP_NEON)
return aarch32_read_description ();
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
- return arm_read_description (ARM_FP_TYPE_VFPV3);
+ return arm_read_description (ARM_FP_TYPE_VFPV3, false);
- return arm_read_description (ARM_FP_TYPE_VFPV2);
+ return arm_read_description (ARM_FP_TYPE_VFPV2, false);
}
return nullptr;
diff --git a/gdb/arm-netbsd-nat.c b/gdb/arm-netbsd-nat.c
index 591a0ab1d54..764bbe8cd3d 100644
--- a/gdb/arm-netbsd-nat.c
+++ b/gdb/arm-netbsd-nat.c
@@ -346,13 +346,13 @@ arm_netbsd_nat_target::read_description ()
if (sysctlbyname("machdep.fpu_present", &flag, &len, NULL, 0) != 0
|| !flag)
- return arm_read_description (ARM_FP_TYPE_NONE);
+ return arm_read_description (ARM_FP_TYPE_NONE, false);
len = sizeof(flag);
if (sysctlbyname("machdep.neon_present", &flag, &len, NULL, 0) == 0 && flag)
return aarch32_read_description ();
- return arm_read_description (ARM_FP_TYPE_VFPV3);
+ return arm_read_description (ARM_FP_TYPE_VFPV3, false);
}
void _initialize_arm_netbsd_nat ();
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 8e245648f23..194eb1f6aa1 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -239,7 +239,7 @@ static const char **valid_disassembly_styles;
static const char *disassembly_style;
/* All possible arm target descriptors. */
-static struct target_desc *tdesc_arm_list[ARM_FP_TYPE_INVALID];
+static struct target_desc *tdesc_arm_list[ARM_FP_TYPE_INVALID][2];
static struct target_desc *tdesc_arm_mprofile_list[ARM_M_TYPE_INVALID];
/* This is used to keep the bfd arch_info in sync with the disassembly
@@ -9410,6 +9410,16 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
}
}
+ /* Check for the TLS register feature. */
+ feature = tdesc_find_feature (tdesc, "org.gnu.gdb.arm.tls");
+ if (feature != nullptr)
+ {
+ valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
+ ARM_TPIDRURO_REGNUM, "tpidruro");
+ if (!valid_p)
+ return NULL;
+ }
+
/* Check for MVE after all the checks for GPR's, VFP and Neon.
MVE (Helium) is an M-profile extension. */
if (is_m)
@@ -13725,14 +13735,14 @@ arm_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
/* See arm-tdep.h. */
const target_desc *
-arm_read_description (arm_fp_type fp_type)
+arm_read_description (arm_fp_type fp_type, bool tls)
{
- struct target_desc *tdesc = tdesc_arm_list[fp_type];
+ struct target_desc *tdesc = tdesc_arm_list[fp_type][tls];
if (tdesc == nullptr)
{
- tdesc = arm_create_target_description (fp_type);
- tdesc_arm_list[fp_type] = tdesc;
+ tdesc = arm_create_target_description (fp_type, tls);
+ tdesc_arm_list[fp_type][tls] = tdesc;
}
return tdesc;
diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h
index 8a9f618539f..c14ac86a9bd 100644
--- a/gdb/arm-tdep.h
+++ b/gdb/arm-tdep.h
@@ -301,7 +301,7 @@ extern void
const struct regcache *regcache);
/* Get the correct Arm target description with given FP hardware type. */
-const target_desc *arm_read_description (arm_fp_type fp_type);
+const target_desc *arm_read_description (arm_fp_type fp_type, bool tls);
/* Get the correct Arm M-Profile target description with given hardware
type. */
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 68e17d0085d..4b09819389a 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -207,6 +207,7 @@ FEATURE_XMLFILES = aarch64-core.xml \
arm/arm-m-profile.xml \
arm/arm-m-profile-mve.xml \
arm/arm-m-profile-with-fpa.xml \
+ arm/arm-tls.xml \
arm/arm-vfpv2.xml \
arm/arm-vfpv3.xml \
arm/xscale-iwmmxt.xml \
diff --git a/gdb/features/arm/arm-tls.c b/gdb/features/arm/arm-tls.c
new file mode 100644
index 00000000000..d1214dda8ec
--- /dev/null
+++ b/gdb/features/arm/arm-tls.c
@@ -0,0 +1,14 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: arm-tls.xml */
+
+#include "gdbsupport/tdesc.h"
+
+static int
+create_feature_arm_arm_tls (struct target_desc *result, long regnum)
+{
+ struct tdesc_feature *feature;
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.arm.tls");
+ tdesc_create_reg (feature, "tpidruro", regnum++, 1, NULL, 32, "data_ptr");
+ return regnum;
+}
diff --git a/gdb/features/arm/arm-tls.xml b/gdb/features/arm/arm-tls.xml
new file mode 100644
index 00000000000..3cdf73e776f
--- /dev/null
+++ b/gdb/features/arm/arm-tls.xml
@@ -0,0 +1,11 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2022 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.arm.tls">
+ <reg name="tpidruro" bitsize="32" type="data_ptr"/>
+</feature>
--
2.34.1
next prev parent reply other threads:[~2022-03-23 21:00 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-23 21:00 [PATCH 00/12] * Support for Thread Local Storage (TLS) variables on FreeBSD arm and aarch64 architectures John Baldwin
2022-03-23 21:00 ` [PATCH 01/12] Handle another edge case for TLS variable lookups John Baldwin
2022-03-23 23:55 ` John Baldwin
2022-03-23 21:00 ` [PATCH 02/12] fbsd-nat: Add helper routines for register sets using PT_[G]SETREGSET John Baldwin
2022-03-24 8:51 ` Luis Machado
2022-03-24 17:45 ` John Baldwin
2022-03-23 21:00 ` [PATCH 03/12] Create pseudo sections for NT_ARM_TLS notes on FreeBSD John Baldwin
2022-03-23 21:00 ` John Baldwin [this message]
2022-04-04 8:01 ` [PATCH 04/12] Add an arm-tls feature which includes the tpidruro register from CP15 Luis Machado
2022-04-12 23:36 ` John Baldwin
2022-04-14 10:23 ` Luis Machado
2022-04-19 16:18 ` John Baldwin
2022-04-20 6:59 ` Luis Machado
2022-03-23 21:00 ` [PATCH 05/12] Read the tpidruro register from NT_ARM_TLS core dump notes on FreeBSD/arm John Baldwin
2022-03-23 21:00 ` [PATCH 06/12] Support TLS variables " John Baldwin
2022-03-23 21:00 ` [PATCH 07/12] Fetch the NT_ARM_TLS register set for native FreeBSD/arm processes John Baldwin
2022-03-23 21:00 ` [PATCH 08/12] Add an aarch64-tls feature which includes the tpidr register John Baldwin
2022-03-28 10:16 ` Luis Machado
2022-04-01 23:30 ` John Baldwin
2022-04-04 8:06 ` Luis Machado
2022-04-04 12:18 ` Luis Machado
2022-05-03 21:14 ` Luis Machado
2022-03-23 21:00 ` [PATCH 09/12] Read the tpidr register from NT_ARM_TLS core dump notes on FreeBSD/Aarch64 John Baldwin
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