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[188.32.220.156]) by smtp.gmail.com with ESMTPSA id o4-20020ac25e24000000b00479471cda69sm731986lfg.156.2022.06.17.12.09.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jun 2022 12:09:00 -0700 (PDT) Sender: Dmitry Selyutin From: Dmitry Selyutin To: binutils@sourceware.org Cc: amodra@gmail.com, luke.leighton@gmail.com, Dmitry Selyutin Subject: [PATCH 3/5] ppc/svp64: support svstep instructions Date: Fri, 17 Jun 2022 22:08:18 +0300 Message-Id: <20220617190820.452821-4-ghostmansd@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220617190820.452821-1-ghostmansd@gmail.com> References: <20220617190820.452821-1-ghostmansd@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=0.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, UNWANTED_LANGUAGE_BODY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 17 Jun 2022 19:09:04 -0000 --- gas/testsuite/gas/ppc/ppc.exp | 1 + gas/testsuite/gas/ppc/svstep.d | 128 +++++++++++++++++++++++++++++++++ gas/testsuite/gas/ppc/svstep.s | 120 +++++++++++++++++++++++++++++++ opcodes/ppc-opc.c | 3 + 4 files changed, 252 insertions(+) create mode 100644 gas/testsuite/gas/ppc/svstep.d create mode 100644 gas/testsuite/gas/ppc/svstep.s diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index cd4dd658ce..d4d06d587e 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -155,3 +155,4 @@ run_dump_test "pr27676" run_dump_test "raw" run_dump_test "setvl" +run_dump_test "svstep" diff --git a/gas/testsuite/gas/ppc/svstep.d b/gas/testsuite/gas/ppc/svstep.d new file mode 100644 index 0000000000..772d7857e7 --- /dev/null +++ b/gas/testsuite/gas/ppc/svstep.d @@ -0,0 +1,128 @@ +#as: -mlibresoc +#objdump: -dr -Mlibresoc + +.*: file format .* + + +Disassembly of section \.text: +0+ <\.text>: + 0: 26 00 00 58 svstep r0,1,0 + 4: 66 00 00 58 svstep r0,1,1 + 8: 26 28 00 58 svstep r0,21,0 + c: 66 28 00 58 svstep r0,21,1 + 10: 26 52 00 58 svstep r0,42,0 + 14: 66 52 00 58 svstep r0,42,1 + 18: 26 64 00 58 svstep r0,51,0 + 1c: 66 64 00 58 svstep r0,51,1 + 20: 26 7c 00 58 svstep r0,63,0 + 24: 66 7c 00 58 svstep r0,63,1 + 28: 26 3e 00 58 svstep r0,32,0 + 2c: 66 3e 00 58 svstep r0,32,1 + 30: 26 00 40 59 svstep r10,1,0 + 34: 66 00 40 59 svstep r10,1,1 + 38: 26 28 40 59 svstep r10,21,0 + 3c: 66 28 40 59 svstep r10,21,1 + 40: 26 52 40 59 svstep r10,42,0 + 44: 66 52 40 59 svstep r10,42,1 + 48: 26 64 40 59 svstep r10,51,0 + 4c: 66 64 40 59 svstep r10,51,1 + 50: 26 7c 40 59 svstep r10,63,0 + 54: 66 7c 40 59 svstep r10,63,1 + 58: 26 3e 40 59 svstep r10,32,0 + 5c: 66 3e 40 59 svstep r10,32,1 + 60: 26 00 a0 5a svstep r21,1,0 + 64: 66 00 a0 5a svstep r21,1,1 + 68: 26 28 a0 5a svstep r21,21,0 + 6c: 66 28 a0 5a svstep r21,21,1 + 70: 26 52 a0 5a svstep r21,42,0 + 74: 66 52 a0 5a svstep r21,42,1 + 78: 26 64 a0 5a svstep r21,51,0 + 7c: 66 64 a0 5a svstep r21,51,1 + 80: 26 7c a0 5a svstep r21,63,0 + 84: 66 7c a0 5a svstep r21,63,1 + 88: 26 3e a0 5a svstep r21,32,0 + 8c: 66 3e a0 5a svstep r21,32,1 + 90: 26 00 60 5b svstep r27,1,0 + 94: 66 00 60 5b svstep r27,1,1 + 98: 26 28 60 5b svstep r27,21,0 + 9c: 66 28 60 5b svstep r27,21,1 + a0: 26 52 60 5b svstep r27,42,0 + a4: 66 52 60 5b svstep r27,42,1 + a8: 26 64 60 5b svstep r27,51,0 + ac: 66 64 60 5b svstep r27,51,1 + b0: 26 7c 60 5b svstep r27,63,0 + b4: 66 7c 60 5b svstep r27,63,1 + b8: 26 3e 60 5b svstep r27,32,0 + bc: 66 3e 60 5b svstep r27,32,1 + c0: 26 00 e0 5b svstep r31,1,0 + c4: 66 00 e0 5b svstep r31,1,1 + c8: 26 28 e0 5b svstep r31,21,0 + cc: 66 28 e0 5b svstep r31,21,1 + d0: 26 52 e0 5b svstep r31,42,0 + d4: 66 52 e0 5b svstep r31,42,1 + d8: 26 64 e0 5b svstep r31,51,0 + dc: 66 64 e0 5b svstep r31,51,1 + e0: 26 7c e0 5b svstep r31,63,0 + e4: 66 7c e0 5b svstep r31,63,1 + e8: 26 3e e0 5b svstep r31,32,0 + ec: 66 3e e0 5b svstep r31,32,1 + f0: 27 00 00 58 svstep\. r0,1,0 + f4: 67 00 00 58 svstep\. r0,1,1 + f8: 27 28 00 58 svstep\. r0,21,0 + fc: 67 28 00 58 svstep\. r0,21,1 + 100: 27 52 00 58 svstep\. r0,42,0 + 104: 67 52 00 58 svstep\. r0,42,1 + 108: 27 64 00 58 svstep\. r0,51,0 + 10c: 67 64 00 58 svstep\. r0,51,1 + 110: 27 7c 00 58 svstep\. r0,63,0 + 114: 67 7c 00 58 svstep\. r0,63,1 + 118: 27 3e 00 58 svstep\. r0,32,0 + 11c: 67 3e 00 58 svstep\. r0,32,1 + 120: 27 00 40 59 svstep\. r10,1,0 + 124: 67 00 40 59 svstep\. r10,1,1 + 128: 27 28 40 59 svstep\. r10,21,0 + 12c: 67 28 40 59 svstep\. r10,21,1 + 130: 27 52 40 59 svstep\. r10,42,0 + 134: 67 52 40 59 svstep\. r10,42,1 + 138: 27 64 40 59 svstep\. r10,51,0 + 13c: 67 64 40 59 svstep\. r10,51,1 + 140: 27 7c 40 59 svstep\. r10,63,0 + 144: 67 7c 40 59 svstep\. r10,63,1 + 148: 27 3e 40 59 svstep\. r10,32,0 + 14c: 67 3e 40 59 svstep\. r10,32,1 + 150: 27 00 a0 5a svstep\. r21,1,0 + 154: 67 00 a0 5a svstep\. r21,1,1 + 158: 27 28 a0 5a svstep\. r21,21,0 + 15c: 67 28 a0 5a svstep\. r21,21,1 + 160: 27 52 a0 5a svstep\. r21,42,0 + 164: 67 52 a0 5a svstep\. r21,42,1 + 168: 27 64 a0 5a svstep\. r21,51,0 + 16c: 67 64 a0 5a svstep\. r21,51,1 + 170: 27 7c a0 5a svstep\. r21,63,0 + 174: 67 7c a0 5a svstep\. r21,63,1 + 178: 27 3e a0 5a svstep\. r21,32,0 + 17c: 67 3e a0 5a svstep\. r21,32,1 + 180: 27 00 60 5b svstep\. r27,1,0 + 184: 67 00 60 5b svstep\. r27,1,1 + 188: 27 28 60 5b svstep\. r27,21,0 + 18c: 67 28 60 5b svstep\. r27,21,1 + 190: 27 52 60 5b svstep\. r27,42,0 + 194: 67 52 60 5b svstep\. r27,42,1 + 198: 27 64 60 5b svstep\. r27,51,0 + 19c: 67 64 60 5b svstep\. r27,51,1 + 1a0: 27 7c 60 5b svstep\. r27,63,0 + 1a4: 67 7c 60 5b svstep\. r27,63,1 + 1a8: 27 3e 60 5b svstep\. r27,32,0 + 1ac: 67 3e 60 5b svstep\. r27,32,1 + 1b0: 27 00 e0 5b svstep\. r31,1,0 + 1b4: 67 00 e0 5b svstep\. r31,1,1 + 1b8: 27 28 e0 5b svstep\. r31,21,0 + 1bc: 67 28 e0 5b svstep\. r31,21,1 + 1c0: 27 52 e0 5b svstep\. r31,42,0 + 1c4: 67 52 e0 5b svstep\. r31,42,1 + 1c8: 27 64 e0 5b svstep\. r31,51,0 + 1cc: 67 64 e0 5b svstep\. r31,51,1 + 1d0: 27 7c e0 5b svstep\. r31,63,0 + 1d4: 67 7c e0 5b svstep\. r31,63,1 + 1d8: 27 3e e0 5b svstep\. r31,32,0 + 1dc: 67 3e e0 5b svstep\. r31,32,1 diff --git a/gas/testsuite/gas/ppc/svstep.s b/gas/testsuite/gas/ppc/svstep.s new file mode 100644 index 0000000000..f41547ad63 --- /dev/null +++ b/gas/testsuite/gas/ppc/svstep.s @@ -0,0 +1,120 @@ +svstep 0,1,0 +svstep 0,1,1 +svstep 0,21,0 +svstep 0,21,1 +svstep 0,42,0 +svstep 0,42,1 +svstep 0,51,0 +svstep 0,51,1 +svstep 0,63,0 +svstep 0,63,1 +svstep 0,32,0 +svstep 0,32,1 +svstep 10,1,0 +svstep 10,1,1 +svstep 10,21,0 +svstep 10,21,1 +svstep 10,42,0 +svstep 10,42,1 +svstep 10,51,0 +svstep 10,51,1 +svstep 10,63,0 +svstep 10,63,1 +svstep 10,32,0 +svstep 10,32,1 +svstep 21,1,0 +svstep 21,1,1 +svstep 21,21,0 +svstep 21,21,1 +svstep 21,42,0 +svstep 21,42,1 +svstep 21,51,0 +svstep 21,51,1 +svstep 21,63,0 +svstep 21,63,1 +svstep 21,32,0 +svstep 21,32,1 +svstep 27,1,0 +svstep 27,1,1 +svstep 27,21,0 +svstep 27,21,1 +svstep 27,42,0 +svstep 27,42,1 +svstep 27,51,0 +svstep 27,51,1 +svstep 27,63,0 +svstep 27,63,1 +svstep 27,32,0 +svstep 27,32,1 +svstep 31,1,0 +svstep 31,1,1 +svstep 31,21,0 +svstep 31,21,1 +svstep 31,42,0 +svstep 31,42,1 +svstep 31,51,0 +svstep 31,51,1 +svstep 31,63,0 +svstep 31,63,1 +svstep 31,32,0 +svstep 31,32,1 +svstep. 0,1,0 +svstep. 0,1,1 +svstep. 0,21,0 +svstep. 0,21,1 +svstep. 0,42,0 +svstep. 0,42,1 +svstep. 0,51,0 +svstep. 0,51,1 +svstep. 0,63,0 +svstep. 0,63,1 +svstep. 0,32,0 +svstep. 0,32,1 +svstep. 10,1,0 +svstep. 10,1,1 +svstep. 10,21,0 +svstep. 10,21,1 +svstep. 10,42,0 +svstep. 10,42,1 +svstep. 10,51,0 +svstep. 10,51,1 +svstep. 10,63,0 +svstep. 10,63,1 +svstep. 10,32,0 +svstep. 10,32,1 +svstep. 21,1,0 +svstep. 21,1,1 +svstep. 21,21,0 +svstep. 21,21,1 +svstep. 21,42,0 +svstep. 21,42,1 +svstep. 21,51,0 +svstep. 21,51,1 +svstep. 21,63,0 +svstep. 21,63,1 +svstep. 21,32,0 +svstep. 21,32,1 +svstep. 27,1,0 +svstep. 27,1,1 +svstep. 27,21,0 +svstep. 27,21,1 +svstep. 27,42,0 +svstep. 27,42,1 +svstep. 27,51,0 +svstep. 27,51,1 +svstep. 27,63,0 +svstep. 27,63,1 +svstep. 27,32,0 +svstep. 27,32,1 +svstep. 31,1,0 +svstep. 31,1,1 +svstep. 31,21,0 +svstep. 31,21,1 +svstep. 31,42,0 +svstep. 31,42,1 +svstep. 31,51,0 +svstep. 31,51,1 +svstep. 31,63,0 +svstep. 31,63,1 +svstep. 31,32,0 +svstep. 31,32,1 diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 0a34417820..b053a15125 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -6802,6 +6802,9 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"rlmi", M(22,0), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}}, {"rlmi.", M(22,1), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}}, +{"svstep", SVL(22,19,0), SVL_MASK, SVP64, PPCVLE, {RT, SVi, vf}}, +{"svstep.", SVL(22,19,1), SVL_MASK, SVP64, PPCVLE, {RT, SVi, vf}}, + {"setvl", SVL(22,27,0), SVL_MASK, SVP64, PPCVLE, {RT, RA, SVi, vf, vs, ms}}, {"setvl.", SVL(22,27,1), SVL_MASK, SVP64, PPCVLE, {RT, RA, SVi, vf, vs, ms}}, -- 2.36.1