From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by sourceware.org (Postfix) with ESMTPS id D2E5C3857BA3 for ; Sun, 26 Jun 2022 19:00:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D2E5C3857BA3 Received: by mail-lj1-x22e.google.com with SMTP id o23so8555891ljg.13 for ; Sun, 26 Jun 2022 12:00:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=kHh5qufD8fmML6e2tV8HmUvdhwg42GNAVDohGxIK5Xw=; b=ThTYmrgOROyRajEwa/iW2XF5O/7V3rCRC8WFVhY7QldxN2n91PVeaX9IFUUcJ8ereM 5PQSjwZRU5E8QslPqN3syNLEjHLZIe6ry2Z8hMelJs/iVmM3E3PFKwFoho1cby+EDLcB RjEm1EpY1iAShppveMgCbb9ujgXeudjhkOM4XG5DQtOoxG88S85EHTm4GnEffJVX/pOD eLMKkTk0JE+7tkvE/YaQ6M7t2qalYHb7KW8w26J0K7zAxf+/09FTSMDzt0LcHp1pVfyd gHznCbqD1QyRguwiFM7Uh25LANXDE51dZ2IBEjHJ6+Nvb9GTpR/r9zX6/ry2iFk69otm 1A+Q== X-Gm-Message-State: AJIora+4ILEFvLaHurck4rAGt0tc7BA6Le05Wvhei4WFmMNiqoZxb/D6 YRGxtiTCupLmL2/4ZPR8ljGy0pphpD4= X-Google-Smtp-Source: AGRyM1txXRWi5uo2C+Us9B/VsVkeJfcTMHvjUtGwV/UgjI7OElkGPXOE0PJsWZ4kFYCNvPJpXFqo1g== X-Received: by 2002:a2e:8552:0:b0:25a:99bd:5f9e with SMTP id u18-20020a2e8552000000b0025a99bd5f9emr5104467ljj.519.1656270028233; Sun, 26 Jun 2022 12:00:28 -0700 (PDT) Received: from localhost.localdomain (broadband-188-32-220-156.ip.moscow.rt.ru. [188.32.220.156]) by smtp.gmail.com with ESMTPSA id g1-20020a0565123b8100b0047255d21179sm1453952lfv.168.2022.06.26.12.00.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Jun 2022 12:00:27 -0700 (PDT) Sender: Dmitry Selyutin From: Dmitry Selyutin To: binutils@sourceware.org Cc: Alan Modra , Luke Leighton , Jan Beulich , Nick Alcock , Richard Earnshaw , Andreas Schwab , Dmitry Selyutin Subject: [PATCH v5 1/7] ppc/svp64: support LibreSOC architecture Date: Sun, 26 Jun 2022 21:59:59 +0300 Message-Id: <20220626190005.7727-2-ghostmansd@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220626190005.7727-1-ghostmansd@gmail.com> References: <20220623200838.1247734-1-ghostmansd@gmail.com> <20220626190005.7727-1-ghostmansd@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 26 Jun 2022 19:00:31 -0000 This patch adds support for LibreSOC machine and SVP64 extension flag for PowerPC architecture. SV (Simple-V) is a strict RISC-paradigm Scalable Vector Extension for the Power ISA. SVP64 is the 64-bit Prefixed instruction format implementing SV. Funded by NLnet through EU Grants No: 825310 and 825322, SV is in DRAFT form and is to be publicly submitted via the OpenPOWER Foundation ISA Working Group via the newly-created External RFC Process. For more details, visit https://libre-soc.org. --- gas/config/tc-ppc.c | 2 ++ include/opcode/ppc.h | 3 +++ opcodes/ppc-dis.c | 5 +++++ opcodes/ppc-opc.c | 1 + 4 files changed, 11 insertions(+) diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 4d789fd16a..76bdfb2e35 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -1384,6 +1384,8 @@ PowerPC options:\n")); fprintf (stream, _("\ -mpower10, -mpwr10 generate code for Power10 architecture\n")); fprintf (stream, _("\ +-mlibresoc generate code for Libre-SOC architecture\n")); + fprintf (stream, _("\ -mcell generate code for Cell Broadband Engine architecture\n")); fprintf (stream, _("\ -mcom generate code for Power/PowerPC common instructions\n")); diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h index 7bc6ee216e..d5752a42e6 100644 --- a/include/opcode/ppc.h +++ b/include/opcode/ppc.h @@ -237,6 +237,9 @@ extern const unsigned int spe2_num_opcodes; /* Opcode is only supported by power10 architecture. */ #define PPC_OPCODE_POWER10 0x400000000000ull +/* Opcode is only supported by SVP64 extensions (LibreSOC architecture). */ +#define PPC_OPCODE_SVP64 0x800000000000ull + /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c index 45e8faeef5..f61e6518f1 100644 --- a/opcodes/ppc-dis.c +++ b/opcodes/ppc-dis.c @@ -200,6 +200,11 @@ struct ppc_mopt ppc_opts[] = { | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), 0 }, + { "libresoc", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 + | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 + | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 + | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX | PPC_OPCODE_SVP64), + 0 }, { "future", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index f5bd6dac50..fe2fcaeb1d 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -4826,6 +4826,7 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands) #define PPCHTM PPC_OPCODE_POWER8 #define E200Z4 PPC_OPCODE_E200Z4 #define PPCLSP PPC_OPCODE_LSP +#define SVP64 PPC_OPCODE_SVP64 /* Used to mark extended mnemonic in deprecated field so that -Mraw won't use this variant in disassembly. */ #define EXT PPC_OPCODE_RAW -- 2.36.1