From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-eopbgr70057.outbound.protection.outlook.com [40.107.7.57]) by sourceware.org (Postfix) with ESMTPS id 6314738515F3 for ; Fri, 26 Aug 2022 10:30:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6314738515F3 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=kFI13XA/LFndxA/YOPCH0yV5CPfHyYImO7bkvcxjWdlr2r0DX9g26IkaFcCOxq+UgReHJmOPuoGWhrfvCm2VuX+Yx28FqUnis7SeHi+Fza7Qt3dYXTpSvnm8tmJzM/v3ovS2wvUv/WxWlQsVdAMnBIOR/dxWW/Q3ysHvVF9O3rbraiEmNKsjHt3jsETGRL9UDyEX+01C0tL7qnmCDzONrxmumEqqF2HHEnujSLsrqhzXlPaB/osjzEPjOy6NemjM0/yT0qy56F4bJN3VBuEYQ5+EyAWGixxf1lXjWdXXHSFV6oOsnlHB+azuW4b0vc+vgf13gZuREQ2oMvQ88nOuew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Qxb4XEDzdaaA4CCfg8rLkRd0NRi9aBOACA8wvHMouuI=; b=PcrVq9kGRSyUN+uiV42faKxwHijBwzF626aqMYZ3WCBimgebr4zUIsLpkK8NS6BOo/A0gfSk8hrEdOh6TK6C5cDE4vWRyRu/gyGPE+I1q2Ao0PbvwwVa87qJJc+50i4xJ9oFCQyHeF6P8RGuJGShIdupuyvvooXgxWZssKh2hCkjcQtgLolJduVPszsEhHJ2bLNwJUPrOgIpSqkTObH/Mevg2NNpXCK9b7+6dZ+O/kk3K2C6hLiwwuwIas/O88os1h1Z678qvU4uwSkjIRdjn1Ol4iwghyoAOLZi6nrNB+e9+Dy497RSr1B3kDFp05tCcJWWwV3K4mCuEFGdA6iaig== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none Received: from VE1PR04MB6560.eurprd04.prod.outlook.com (2603:10a6:803:122::25) by PR3PR04MB7436.eurprd04.prod.outlook.com (2603:10a6:102:87::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5566.16; Fri, 26 Aug 2022 10:30:55 +0000 Received: from VE1PR04MB6560.eurprd04.prod.outlook.com ([fe80::2d5d:bae0:430f:70ad]) by VE1PR04MB6560.eurprd04.prod.outlook.com ([fe80::2d5d:bae0:430f:70ad%4]) with mapi id 15.20.5566.015; Fri, 26 Aug 2022 10:30:54 +0000 Message-ID: <0db72b1f-4026-abc8-3091-0d952044bfee@suse.com> Date: Fri, 26 Aug 2022 12:30:52 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: [PATCH v2 2/7] x86: improve match_template()'s diagnostics Content-Language: en-US To: Binutils References: <4a27fbde-d2b2-e293-d09e-9709bc5b9792@suse.com> From: Jan Beulich In-Reply-To: <4a27fbde-d2b2-e293-d09e-9709bc5b9792@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-ClientProxiedBy: FR3P281CA0002.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:1d::12) To VE1PR04MB6560.eurprd04.prod.outlook.com (2603:10a6:803:122::25) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3962beda-ebfc-4090-816c-08da874e0e94 X-MS-TrafficTypeDiagnostic: PR3PR04MB7436:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Oebt2NIomJeOfGgTPjA2kUvrS52L3KU7Vdbqn73P0so9uMQ0gk7j0j98AahjCVqkTfWk0lNk3CIqGof83QVL3uJz4O5SmGUvzt3JZLKOf0xtGk/Wlp7eS1CdemftSvSQfSQ8pfYTMKDHA4iUE7BHaKt5Rrl3k7BJCfXm06WP+p2rIHZneHS5P9lhx0VOCTKyagNk0VlGf8AMnwaPWjKN+4XStrGjbINFfdSRTv5pcR2QwXWC2JNk4BDI0k2fgiGUT2F6WFvvJKIIvHjue1mZs/+M69FHZQKOCIPL1nza/HhO35fdiFEbvqaqiycCx3QKVQAPquRUeKJ+dLW2GUQVuRIi09WOjX9Xo9ifbvMbEzjW2YOYfrcxk8zbqST8EkOgcNv0iUtKfYd32Vk3KBnvzULd3xTJrEneq+1U5RsO5B355hGLACzTFp0TJO2owXtz+wNevuYrjwK3NUh2KToAEk8ACt+7GPtiI8Xo4ZdcK2k1WbvESq9EcQQwXKBIRBf2sm2n9RAa7k5SinQvbIP5ajzUZxEO7hUVK5+fkHXN3ctyeAyZyc2YqXRyTwyOHF9LGwIc3efTz8MddY8jaJ+ZHzw2wHwNZfFL01PNsWPyLCMNMt39zkuzMrDN8ve2sz85z3bRDTwDdcaGxf+q/XqcT9JVZqCLD5OsHNwcYa/7xjAxUfHcn5N5AVuLxoDKcv9cx3zb4F2hCgJfdWWyy5bnoi7/V0JOcKaqALF8ag/LUFiMcjTRfE7SnfT6e6mk0B2croFlGRlayaRSzGxuSPF+cBojwCwwErqPJqZlxjMXmSI= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VE1PR04MB6560.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230016)(396003)(136003)(39860400002)(346002)(376002)(366004)(30864003)(2906002)(41300700001)(316002)(8936002)(86362001)(38100700002)(5660300002)(31696002)(6916009)(6506007)(31686004)(36756003)(6512007)(478600001)(6486002)(26005)(186003)(66476007)(83380400001)(66946007)(8676002)(4326008)(66556008)(2616005)(43740500002)(45980500001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?N04vdzJRSjRNRm01Ny9uVWU1NW9ocFlMbzgrdmdRRlgwd0RTZ2ozbllzd2Mr?= =?utf-8?B?UjBtNlM2R0dWeExaZUg2aEZNOW9vZUdhTFRaanBlSFh4Q2FBeHB0SjRrMXR4?= =?utf-8?B?emwyVnBiMng5RzRsbXUvSlNzbjkwVzUyWVh2SnlBK2ExUDJxNGNxOEhRMjJW?= =?utf-8?B?YzVRWVY3WGZaNFdtMVg4dkJ2RElBb29GRmMzYmpBY21YQ0oyT2JNVC94RUxh?= =?utf-8?B?RHFuWFRmSmtDcElaRmJWRkZESWU0dVcyenBkZ0YyT1NaOHNlY3R4cXdhdGNi?= =?utf-8?B?WVU4aTVWMkpkOVZGYVFnS2s4QjFJc0llaWtPaVZnRnZJL1h4ZFBQODVMTHVa?= =?utf-8?B?bzRkOCtrVklwRmdXNTlqcWM2MmFxOWUxamVKeUV3QndUT3I1UmZQOVhBSzZz?= =?utf-8?B?RHg1QWlDVEpMTFNsNHNqamI3VUQvVlFwSjB0Vm9kTG1zRFhxbm9JZEZYbXlj?= =?utf-8?B?WXdsNmhPQnlTeTZlVTV4WDI1Z2RaaHVGMk4zUlFzb3FqRUhKTVVTNVZBTmpo?= =?utf-8?B?L2N0OXYwQTdpMHNFRmJCaEJEa25RY0prTVVac2NoYTJGNjE5Rk5aSHYwMFY1?= =?utf-8?B?cklYMDNudW9DTkFCdFlWUEdzdlZEMHhXM2RuSFJQMXJWd1NSU0Q1dUlzMStn?= =?utf-8?B?d3JTdzAzdk42bnNPUzIvdnBjbXlybTY4eFhIL1R4Rkw3ME1zd0pjM0VCYSsv?= =?utf-8?B?M01wOTBjV2RKdk4zSis0d2cxNFNaNjI4WlBrWVpOdHFadXVGSzVZOE9VQTZp?= =?utf-8?B?M0xaRnB0NkhLdWhPaEVESGllb1gvWk0rSXRlTjJubmNjeVYrcmhIT3hCUzBw?= =?utf-8?B?YUN5SUVxQVNTM3ppTlI5UGszSkdLWWc5bmY4ZTNydVVWT3lkYVl3MkVhVEk5?= =?utf-8?B?eldPS2d5V2NVZzdZdlZFNmVwR1I5aGtLWnpwTVljSTF5OTFPb1N5WTY2bThx?= =?utf-8?B?VDdkSDI1UG84TCtiL0dwRmRESzFJanRIQ1RzVElScEZMdmRldTV2eHNIaFJp?= =?utf-8?B?VnExSUt0dkhWbUd0czRXVktOMHhmazdDWFZBY1UxRytSendETTFrOXBFaFNS?= =?utf-8?B?emJTRlJGMGFOVytDNHY0ZW9COVIzMzZlbG5JSUhFR1pVZ0RyOU1FT0h0ZlpL?= =?utf-8?B?UGFzcDVCcHZDV2VRQyt1S2VmZjE0bEp5UjBmWldNSlhkYXRDZGx0cjQyd0Yr?= =?utf-8?B?eEUvTURWbUVJd0g0MlBwT1Jlbnh1dm9yL3BoY3o4U0hEdUtaMzRzcERkNjVO?= =?utf-8?B?VUhJSndPaEdidGpGWTAxcUlpUnFXMFQvQnU5TDJrNjFaZHU4OVR5UlM0bGFu?= =?utf-8?B?WHNnWnB4N1dpWU9IUlVtQTFHU3hRTGx6bEhzQW4vR05UUWJqVGJ6L0Qzck1F?= =?utf-8?B?VWFSV1NHSHUyMkphdzQxM1BxL0JRMEV4TEpKUkhZZ3JhYW9OK2NhV24vb0Jx?= =?utf-8?B?UUwyYmZmU0wrdjQzL3lJL1FKaFYxby84eTZISkY2N3VHbEJZYWZiUW1zdGhL?= =?utf-8?B?Mi8xcStVbDBhZGhBQnp6ZWE0SENwci9hMjhrVFRkZjNOdWllS3RuRkhJT3gy?= =?utf-8?B?TVRnb3JNRmFqZkhsdTQ2OVd1NTY3K0FQSHVSOUs2aUR0N3o3ZmpaWUM3VG1s?= =?utf-8?B?NlgzZDRzOHB0S00rcldzc2ZFYTE2ZGxoWDR3cHFQcmxUcHpVU2MwSFJmcmRG?= =?utf-8?B?Qy81RTZHUXZsaW45L1I0ZnczZ3FkbnF5S1d6cFRzS1dQZ3F1Q093RU5jY1By?= =?utf-8?B?b0NoT29vbG4xTE90QW5NVnhxVEpLdjNUSWpocHN5elp2OXhpTUV3cVZiY1Zh?= =?utf-8?B?djBjZmlITGhtMGRMTENOUUhndEd2b0JrVlkvcXpVMHJaWHJNZzZtM1kzVEZZ?= =?utf-8?B?SVd3UlJGaGRmQ0xERGlwMWx2Tm85REdKQ2d4VWdPTWpYemhiN0dEa1o3N04w?= =?utf-8?B?b0R1UzlrK2gwWi9mYU1SUFozNjM3VERIODFLV0o2TXlaUThkcDAzZ2Q0M0hm?= =?utf-8?B?TWxpWXJIS2RSQ0cwT0tPbjFXTVY5djUyQWloU1BaNTdwUDNlZU9GWGx4L1o5?= =?utf-8?B?MEZHUmdqOWJiczdIWTVGUTkzTVNXWHNzYVlNUXMyYmh5bzRjejlvblRDdW16?= =?utf-8?Q?TbbCGQexXfYNLtyl2EgPWMhEu?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3962beda-ebfc-4090-816c-08da874e0e94 X-MS-Exchange-CrossTenant-AuthSource: VE1PR04MB6560.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Aug 2022 10:30:54.8940 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dyuSDHE0aKJAzy6WSVDJKtJnlziD+V9cmKUTDfTmCmhjLqy43MlptNKgXYjiWdgZr3/NuaWbssO/IH5fmHOddg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PR3PR04MB7436 X-Spam-Status: No, score=-3030.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Aug 2022 10:31:02 -0000 Message-ID: <20220826103052.dR6o4SJkiZxSQWpfiPYF6JAxYthvoc2p4viPBJTW-w8@z> At the example of extractps $0, %xmm0, %xmm0 insertps $0, %xmm0, %eax (both having respectively the same mistake of using the wrong kind of destination register) it is easy to see that current behavior is far from ideal: The former results in "unsupported instruction" for 32-bit code simply because the 2nd template we have is a Cpu64 one. Instead we should aim at emitting the "best" possible error, which will typically be the one where we passed the largest number of checks. Generalize the original "specific_error" approach by making it apply to the entire matching loop, utilizing that line numbers increase as we pass further checks. --- v2: Style correction. --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2083,12 +2083,7 @@ operand_size_match (const insn_template } if (!t->opcode_modifier.d) - { - mismatch: - if (!match) - i.error = operand_size_mismatch; - return match; - } + return match; /* Check reverse. */ gas_assert ((i.operands >= 2 && i.operands <= 3) @@ -2105,19 +2100,19 @@ operand_size_match (const insn_template if (t->operand_types[j].bitfield.class == Reg && !match_operand_size (t, j, given)) - goto mismatch; + return match; if (t->operand_types[j].bitfield.class == RegSIMD && !match_simd_size (t, j, given)) - goto mismatch; + return match; if (t->operand_types[j].bitfield.instance == Accum && (!match_operand_size (t, j, given) || !match_simd_size (t, j, given))) - goto mismatch; + return match; if ((i.flags[given] & Operand_Mem) && !match_mem_size (t, j, given)) - goto mismatch; + return match; } return match | MATCH_REVERSE; @@ -6386,6 +6381,17 @@ VEX_check_encoding (const insn_template return 0; } +/* Helper function for the progress() macro in match_template(). */ +static INLINE enum i386_error progress (enum i386_error new, + enum i386_error last, + unsigned int line, unsigned int *line_p) +{ + if (line <= *line_p) + return last; + *line_p = line; + return new; +} + static const insn_template * match_template (char mnem_suffix) { @@ -6397,8 +6403,9 @@ match_template (char mnem_suffix) i386_opcode_modifier suffix_check; i386_operand_type operand_types [MAX_OPERANDS]; int addr_prefix_disp; - unsigned int j, size_match, check_register; - enum i386_error specific_error = 0; + unsigned int j, size_match, check_register, errline = __LINE__; + enum i386_error specific_error = number_of_operands_mismatch; +#define progress(err) progress (err, specific_error, __LINE__, &errline) #if MAX_OPERANDS != 5 # error "MAX_OPERANDS must be 5." @@ -6436,36 +6443,33 @@ match_template (char mnem_suffix) suffix_check.no_ldsuf = 1; } - /* Must have right number of operands. */ - i.error = number_of_operands_mismatch; - for (t = current_templates->start; t < current_templates->end; t++) { addr_prefix_disp = -1; found_reverse_match = 0; + /* Must have right number of operands. */ if (i.operands != t->operands) continue; /* Check processor support. */ - i.error = unsupported; + specific_error = progress (unsupported); if (cpu_flags_match (t) != CPU_FLAGS_PERFECT_MATCH) continue; /* Check Pseudo Prefix. */ - i.error = unsupported; if (t->opcode_modifier.pseudovexprefix && !(i.vec_encoding == vex_encoding_vex || i.vec_encoding == vex_encoding_vex3)) continue; /* Check AT&T mnemonic. */ - i.error = unsupported_with_intel_mnemonic; + specific_error = progress (unsupported_with_intel_mnemonic); if (intel_mnemonic && t->opcode_modifier.attmnemonic) continue; /* Check AT&T/Intel syntax. */ - i.error = unsupported_syntax; + specific_error = progress (unsupported_syntax); if ((intel_syntax && t->opcode_modifier.attsyntax) || (!intel_syntax && t->opcode_modifier.intelsyntax)) continue; @@ -6491,7 +6495,7 @@ match_template (char mnem_suffix) } /* Check the suffix. */ - i.error = invalid_instruction_suffix; + specific_error = progress (invalid_instruction_suffix); if ((t->opcode_modifier.no_bsuf && suffix_check.no_bsuf) || (t->opcode_modifier.no_wsuf && suffix_check.no_wsuf) || (t->opcode_modifier.no_lsuf && suffix_check.no_lsuf) @@ -6500,6 +6504,7 @@ match_template (char mnem_suffix) || (t->opcode_modifier.no_ldsuf && suffix_check.no_ldsuf)) continue; + specific_error = progress (operand_size_mismatch); size_match = operand_size_match (t); if (!size_match) continue; @@ -6510,11 +6515,9 @@ match_template (char mnem_suffix) as the case of a missing * on the operand is accepted (perhaps with a warning, issued further down). */ + specific_error = progress (operand_type_mismatch); if (i.jumpabsolute && t->opcode_modifier.jump != JUMP_ABSOLUTE) - { - i.error = operand_type_mismatch; - continue; - } + continue; for (j = 0; j < MAX_OPERANDS; j++) operand_types[j] = t->operand_types[j]; @@ -6522,6 +6525,8 @@ match_template (char mnem_suffix) /* In general, don't allow - 64-bit operands outside of 64-bit mode, - 32-bit operands on pre-386. */ + specific_error = progress (mnem_suffix ? invalid_instruction_suffix + : operand_size_mismatch); j = i.imm_operands + (t->operands > i.imm_operands + 1); if (((i.suffix == QWORD_MNEM_SUFFIX && flag_code != CODE_64BIT @@ -6550,7 +6555,7 @@ match_template (char mnem_suffix) { if (VEX_check_encoding (t)) { - specific_error = i.error; + specific_error = progress (i.error); continue; } @@ -6711,6 +6716,8 @@ match_template (char mnem_suffix) i.types[1], operand_types[1]))) { + specific_error = progress (i.error); + /* Check if other direction is valid ... */ if (!t->opcode_modifier.d) continue; @@ -6735,6 +6742,7 @@ match_template (char mnem_suffix) operand_types[0]))) { /* Does not match either direction. */ + specific_error = progress (i.error); continue; } /* found_reverse_match holds which of D or FloatR @@ -6773,7 +6781,10 @@ match_template (char mnem_suffix) operand_types[3], i.types[4], operand_types[4])) - continue; + { + specific_error = progress (i.error); + continue; + } /* Fall through. */ case 4: overlap3 = operand_type_and (i.types[3], operand_types[3]); @@ -6788,7 +6799,10 @@ match_template (char mnem_suffix) operand_types[2], i.types[3], operand_types[3]))) - continue; + { + specific_error = progress (i.error); + continue; + } /* Fall through. */ case 3: overlap2 = operand_type_and (i.types[2], operand_types[2]); @@ -6803,7 +6817,10 @@ match_template (char mnem_suffix) operand_types[1], i.types[2], operand_types[2]))) - continue; + { + specific_error = progress (i.error); + continue; + } break; } } @@ -6814,14 +6831,14 @@ match_template (char mnem_suffix) /* Check if vector operands are valid. */ if (check_VecOperands (t)) { - specific_error = i.error; + specific_error = progress (i.error); continue; } /* Check if VEX/EVEX encoding requirements can be satisfied. */ if (VEX_check_encoding (t)) { - specific_error = i.error; + specific_error = progress (i.error); continue; } @@ -6829,11 +6846,13 @@ match_template (char mnem_suffix) break; } +#undef progress + if (t == current_templates->end) { /* We found no match. */ const char *err_msg; - switch (specific_error ? specific_error : i.error) + switch (specific_error) { default: abort (); --- a/gas/testsuite/gas/i386/inval-tls.l +++ b/gas/testsuite/gas/i386/inval-tls.l @@ -1,3 +1,3 @@ .*: Assembler messages: -.*:3: Error: operand size mismatch for `kmovd' -.*:4: Error: operand size mismatch for `kmovd' +.*:3: Error: .* `kmovd' +.*:4: Error: .* `kmovd' --- a/gas/testsuite/gas/i386/noavx512-1.l +++ b/gas/testsuite/gas/i386/noavx512-1.l @@ -1,14 +1,14 @@ .*: Assembler messages: -.*:25: Error: .*unsupported instruction.* +.*:25: Error: .*operand size mismatch.* .*:26: Error: .*unsupported masking.* .*:27: Error: .*unsupported masking.* -.*:47: Error: .*unsupported instruction.* +.*:47: Error: .*operand size mismatch.* .*:48: Error: .*unsupported masking.* .*:49: Error: .*unsupported masking.* .*:50: Error: .*not supported.* .*:51: Error: .*not supported.* .*:52: Error: .*not supported.* -.*:69: Error: .*unsupported instruction.* +.*:69: Error: .*operand size mismatch.* .*:70: Error: .*unsupported masking.* .*:71: Error: .*unsupported masking.* .*:72: Error: .*not supported.* @@ -17,7 +17,7 @@ .*:75: Error: .*not supported.* .*:76: Error: .*not supported.* .*:77: Error: .*not supported.* -.*:91: Error: .*unsupported instruction.* +.*:91: Error: .*operand size mismatch.* .*:92: Error: .*unsupported masking.* .*:93: Error: .*unsupported masking.* .*:94: Error: .*not supported.* @@ -27,7 +27,7 @@ .*:98: Error: .*not supported.* .*:99: Error: .*not supported.* .*:100: Error: .*not supported.* -.*:113: Error: .*unsupported instruction.* +.*:113: Error: .*operand size mismatch.* .*:114: Error: .*unsupported masking.* .*:115: Error: .*unsupported masking.* .*:116: Error: .*not supported.* @@ -40,7 +40,7 @@ .*:126: Error: .*not supported.* .*:127: Error: .*not supported.* .*:128: Error: .*not supported.* -.*:135: Error: .*unsupported instruction.* +.*:135: Error: .*operand size mismatch.* .*:136: Error: .*unsupported masking.* .*:137: Error: .*unsupported masking.* .*:138: Error: .*not supported.* @@ -54,7 +54,7 @@ .*:149: Error: .*not supported.* .*:150: Error: .*not supported.* .*:151: Error: .*not supported.* -.*:157: Error: .*unsupported instruction.* +.*:157: Error: .*operand size mismatch.* .*:158: Error: .*unsupported masking.* .*:159: Error: .*unsupported masking.* .*:160: Error: .*not supported.* --- a/gas/testsuite/gas/i386/noavx512-2.l +++ b/gas/testsuite/gas/i386/noavx512-2.l @@ -1,12 +1,12 @@ .*: Assembler messages: -.*:26: Error: .*unsupported instruction.* -.*:27: Error: .*unsupported instruction.* +.*:26: Error: .*unsupported masking.* +.*:27: Error: .*unsupported masking.* .*:29: Error: .*unsupported instruction.* .*:30: Error: .*unsupported instruction.* .*:32: Error: .*unsupported instruction.* .*:33: Error: .*unsupported instruction.* -.*:36: Error: .*unsupported instruction.* -.*:37: Error: .*unsupported instruction.* +.*:36: Error: .*unsupported masking.* +.*:37: Error: .*unsupported masking.* .*:39: Error: .*unsupported instruction.* .*:40: Error: .*unsupported instruction.* .*:43: Error: .*unsupported instruction.* --- a/gas/testsuite/gas/i386/x86-64-branch-4.l +++ b/gas/testsuite/gas/i386/x86-64-branch-4.l @@ -1,19 +1,19 @@ .*: Assembler messages: .*:2: Error: invalid instruction suffix for `call' .*:3: Error: invalid instruction suffix for `call' -.*:4: Error: operand type mismatch for `jmp' +.*:4: Error: operand (size|type) mismatch for `jmp' .*:5: Error: invalid instruction suffix for `jmp' .*:6: Error: invalid instruction suffix for `jmp' .*:7: Error: invalid instruction suffix for `ret' .*:8: Error: invalid instruction suffix for `ret' -.*:11: Error: operand type mismatch for `call' +.*:11: Error: operand (size|type) mismatch for `call' .*:12: Error: invalid instruction suffix for `call' .*:13: Error: invalid instruction suffix for `call' -.*:14: Error: operand size mismatch for `call' -.*:15: Error: operand type mismatch for `jmp' +.*:14: Error: operand (size|type) mismatch for `call' +.*:15: Error: operand (size|type) mismatch for `jmp' .*:16: Error: invalid instruction suffix for `jmp' .*:17: Error: invalid instruction suffix for `jmp' -.*:18: Error: operand size mismatch for `jmp' +.*:18: Error: operand (size|type) mismatch for `jmp' .*:19: Error: invalid instruction suffix for `ret' .*:20: Error: invalid instruction suffix for `ret' GAS LISTING .* --- a/gas/testsuite/gas/i386/x86-64-branch-5.l +++ b/gas/testsuite/gas/i386/x86-64-branch-5.l @@ -1,19 +1,19 @@ .*: Assembler messages: -.*:2: Error: unsupported syntax for `lcall' -.*:3: Error: unsupported syntax for `lfs' -.*:4: Error: unsupported syntax for `lfs' -.*:5: Error: unsupported syntax for `lgs' -.*:6: Error: unsupported syntax for `lgs' -.*:7: Error: unsupported syntax for `ljmp' -.*:8: Error: unsupported syntax for `lss' -.*:9: Error: unsupported syntax for `lss' -.*:12: Error: unsupported syntax for `call' -.*:13: Error: unsupported syntax for `lfs' -.*:14: Error: unsupported syntax for `lfs' -.*:15: Error: unsupported syntax for `lgs' -.*:16: Error: unsupported syntax for `lgs' -.*:17: Error: unsupported syntax for `jmp' -.*:18: Error: unsupported syntax for `lss' -.*:19: Error: unsupported syntax for `lss' +.*:2: Error: invalid instruction suffix for `lcall' +.*:3: Error: operand size mismatch for `lfs' +.*:4: Error: invalid instruction suffix for `lfs' +.*:5: Error: operand size mismatch for `lgs' +.*:6: Error: invalid instruction suffix for `lgs' +.*:7: Error: invalid instruction suffix for `ljmp' +.*:8: Error: operand size mismatch for `lss' +.*:9: Error: invalid instruction suffix for `lss' +.*:12: Error: operand (size|type) mismatch for `call' +.*:13: Error: operand size mismatch for `lfs' +.*:14: Error: operand size mismatch for `lfs' +.*:15: Error: operand size mismatch for `lgs' +.*:16: Error: operand size mismatch for `lgs' +.*:17: Error: operand (size|type) mismatch for `jmp' +.*:18: Error: operand size mismatch for `lss' +.*:19: Error: operand size mismatch for `lss' GAS LISTING .* #pass --- a/gas/testsuite/gas/i386/x86-64-inval-tls.l +++ b/gas/testsuite/gas/i386/x86-64-inval-tls.l @@ -1,3 +1,3 @@ .*: Assembler messages: -.*:3: Error: operand size mismatch for `kmovq' -.*:4: Error: operand size mismatch for `kmovq' +.*:3: Error: .* `kmovq' +.*:4: Error: .* `kmovq'