From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by sourceware.org (Postfix) with ESMTPS id 6F7763836D2C for ; Wed, 14 Dec 2022 05:52:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6F7763836D2C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=xen0n.name Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=xen0n.name DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1670997128; bh=2y73lG8nUu+ExFgs2RLrNpMOV4Cjkf4kYtVQ+f7mfHU=; h=From:To:Cc:Subject:Date:From; b=SQDX8b/BySZuW6TeSm1OMVYkA07wMwH9941FvX1m9LsXfNAKmlF+BYdKKztf/Wq1P TCvBun/LGAxFKhTigf5CEIxq9VwerDUQpVP2ABqSShe0buhokwGe/4KQlgGUQeHAme 5klOMYrXntaY2B9gRaXZ/Y2iTWg9YhJ1mKhe/jvI= Received: from ld50.lan (unknown [101.88.134.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 2C51D6008C; Wed, 14 Dec 2022 13:52:08 +0800 (CST) From: WANG Xuerui To: binutils@sourceware.org Cc: Chenghua Xu , Zhensong Liu , Qinggang Meng , Xi Ruoyao , WANG Xuerui Subject: [PATCH v3 RESEND 0/6] LoongArch: colored disassembly and readability tweaks Date: Wed, 14 Dec 2022 13:51:58 +0800 Message-Id: <20221214055204.2890795-1-i.swmail@xen0n.name> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-3.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_BARRACUDACENTRAL,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: WANG Xuerui Hi, [Sorry but I've mistakenly written "branch insns" in patch 4's commit message, instead of the correct "memory access insns", hence resending.] This series implements colored output for LoongArch disassembly, and some minor tweaks to the output so there is less clutter. The previous version was sent in August but there was no reply, so I've rebased and added the tweaks mentioned before, for consideration of inclusion into binutils 2.40. Changes from v2: - Fixed test cases - Added the fixed "LoongArch: support disassembling certain pseudo- instructions" patch into this series - Fixed ".insn" in the last patch to say ".word" instead (MIPS muscle memory strikes back hard) - Fixed some commit messages - Added mengqinggang to Cc list WANG Xuerui (6): LoongArch: support disassembling certain pseudo-instructions opcodes/loongarch: remove unused code opcodes/loongarch: implement style support in the disassembler opcodes/loongarch: style disassembled address offsets as such opcodes/loongarch: do not print hex notation for signed immediates opcodes/loongarch: print unrecognized insn words with the .word directive gas/config/tc-loongarch.c | 3 +- gas/testsuite/gas/loongarch/imm_ins.d | 84 ++++++------- gas/testsuite/gas/loongarch/imm_ins_32.d | 54 ++++----- gas/testsuite/gas/loongarch/imm_op.d | 44 +++---- gas/testsuite/gas/loongarch/jmp_op.d | 44 +++---- gas/testsuite/gas/loongarch/li.d | 8 +- gas/testsuite/gas/loongarch/load_store_op.d | 80 ++++++------- gas/testsuite/gas/loongarch/macro_op.d | 4 +- gas/testsuite/gas/loongarch/macro_op_32.d | 4 +- .../gas/loongarch/macro_op_large_abs.d | 14 +-- .../gas/loongarch/macro_op_large_pc.d | 14 +-- gas/testsuite/gas/loongarch/nop.d | 2 +- gas/testsuite/gas/loongarch/privilege_op.d | 8 +- gas/testsuite/gas/loongarch/raw-insn.d | 11 ++ gas/testsuite/gas/loongarch/raw-insn.s | 7 ++ gas/testsuite/gas/loongarch/reloc.d | 2 +- include/opcode/loongarch.h | 7 +- opcodes/disassemble.c | 5 + opcodes/loongarch-dis.c | 112 ++++++++---------- opcodes/loongarch-opc.c | 73 +++++++----- 20 files changed, 302 insertions(+), 278 deletions(-) create mode 100644 gas/testsuite/gas/loongarch/raw-insn.d create mode 100644 gas/testsuite/gas/loongarch/raw-insn.s -- 2.38.1