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From: Mark Harmstone <mark@harmstone.com>
To: binutils@sourceware.org, wej22007@outlook.com, zac.walker@linaro.org
Cc: Mark Harmstone <mark@harmstone.com>
Subject: [PATCH 4/5] Add .secrel32 for pe-aarch64
Date: Fri, 16 Dec 2022 02:13:59 +0000	[thread overview]
Message-ID: <20221216021400.22309-4-mark@harmstone.com> (raw)
In-Reply-To: <20221216021400.22309-1-mark@harmstone.com>

Adds the .secrel32 pseudo-directive and its corresponding relocation.

---
 bfd/coff-aarch64.c        | 47 +++++++++++++++++++++++-
 gas/config/tc-aarch64.c   | 75 +++++++++++++++++++++++++++++----------
 gas/config/tc-aarch64.h   |  4 +++
 ld/testsuite/ld-pe/pe.exp |  2 ++
 4 files changed, 108 insertions(+), 20 deletions(-)

diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c
index e181ce66aa0..a9351deadff 100644
--- a/bfd/coff-aarch64.c
+++ b/bfd/coff-aarch64.c
@@ -253,6 +253,20 @@ coff_aarch64_addr32nb_reloc (bfd *abfd ATTRIBUTE_UNUSED,
   return bfd_reloc_ok;
 }
 
+static bfd_reloc_status_type
+coff_aarch64_secrel_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+			   arelent *reloc_entry,
+			   asymbol *symbol ATTRIBUTE_UNUSED,
+			   void *data,
+			   asection *input_section ATTRIBUTE_UNUSED,
+			   bfd *output_bfd ATTRIBUTE_UNUSED,
+			   char **error_message ATTRIBUTE_UNUSED)
+{
+  bfd_putl32 (reloc_entry->addend, data + reloc_entry->address);
+
+  return bfd_reloc_ok;
+}
+
 /* In case we're on a 32-bit machine, construct a 64-bit "-1" value.  */
 #define MINUS_ONE (~ (bfd_vma) 0)
 
@@ -316,6 +330,11 @@ static const reloc_howto_type arm64_reloc_howto_32nb = HOWTO (IMAGE_REL_ARM64_AD
 	 coff_aarch64_addr32nb_reloc, "IMAGE_REL_ARM64_ADDR32NB",
 	 false, 0xffffffff, 0xffffffff, false);
 
+static const reloc_howto_type arm64_reloc_howto_secrel = HOWTO (IMAGE_REL_ARM64_SECREL, 0, 4, 32, false, 0,
+	 complain_overflow_bitfield,
+	 coff_aarch64_secrel_reloc, "IMAGE_REL_ARM64_SECREL",
+	 false, 0xffffffff, 0xffffffff, false);
+
 static const reloc_howto_type* const arm64_howto_table[] = {
      &arm64_reloc_howto_abs,
      &arm64_reloc_howto_64,
@@ -328,7 +347,8 @@ static const reloc_howto_type* const arm64_howto_table[] = {
      &arm64_reloc_howto_branch19,
      &arm64_reloc_howto_branch14,
      &arm64_reloc_howto_pgoff12a,
-     &arm64_reloc_howto_32nb
+     &arm64_reloc_howto_32nb,
+     &arm64_reloc_howto_secrel
 };
 
 #ifndef NUM_ELEM
@@ -372,6 +392,8 @@ coff_aarch64_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, bfd_reloc_code_real
     return &arm64_reloc_howto_branch19;
   case BFD_RELOC_RVA:
     return &arm64_reloc_howto_32nb;
+  case BFD_RELOC_32_SECREL:
+    return &arm64_reloc_howto_secrel;
   default:
     BFD_FAIL ();
     return NULL;
@@ -426,6 +448,8 @@ coff_aarch64_rtype_lookup (unsigned int code)
       return &arm64_reloc_howto_pgoff12a;
     case IMAGE_REL_ARM64_ADDR32NB:
       return &arm64_reloc_howto_32nb;
+    case IMAGE_REL_ARM64_SECREL:
+      return &arm64_reloc_howto_secrel;
     default:
       BFD_FAIL ();
       return NULL;
@@ -788,6 +812,27 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 	    break;
 	  }
 
+	case IMAGE_REL_ARM64_SECREL:
+	  {
+	    uint64_t val;
+	    int32_t addend;
+
+	    addend = bfd_getl32 (contents + rel->r_vaddr);
+
+	    val = sec->output_offset + sym_value + addend;
+
+	    if (val > 0xffffffff)
+	      (*info->callbacks->reloc_overflow)
+		(info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+		"IMAGE_REL_ARM64_SECREL", addend, input_bfd,
+		input_section, rel->r_vaddr - input_section->vma);
+
+	    bfd_putl32 (val, contents + rel->r_vaddr);
+	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+	    break;
+	  }
+
 	default:
 	  info->callbacks->einfo (_("%F%P: Unhandled relocation type %u\n"),
 				  rel->r_type);
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index a50cdb019e6..a72b96ffca7 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2097,6 +2097,27 @@ s_tlsdescldr (int ignored ATTRIBUTE_UNUSED)
 }
 #endif	/* OBJ_ELF */
 
+#ifdef TE_PE
+static void
+s_secrel (int dummy ATTRIBUTE_UNUSED)
+{
+  expressionS exp;
+
+  do
+    {
+      expression (&exp);
+      if (exp.X_op == O_symbol)
+	exp.X_op = O_secrel;
+
+      emit_expr (&exp, 4);
+    }
+  while (*input_line_pointer++ == ',');
+
+  input_line_pointer--;
+  demand_empty_rest_of_line ();
+}
+#endif	/* TE_PE */
+
 static void s_aarch64_arch (int);
 static void s_aarch64_cpu (int);
 static void s_aarch64_arch_extension (int);
@@ -2131,6 +2152,9 @@ const pseudo_typeS md_pseudo_table[] = {
   {"long", s_aarch64_cons, 4},
   {"xword", s_aarch64_cons, 8},
   {"dword", s_aarch64_cons, 8},
+#endif
+#ifdef TE_PE
+  {"secrel32", s_secrel, 0},
 #endif
   {"float16", float_cons, 'h'},
   {"bfloat16", float_cons, 'b'},
@@ -9268,6 +9292,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
       break;
 
     case BFD_RELOC_RVA:
+    case BFD_RELOC_32_SECREL:
       break;
 
     default:
@@ -9353,27 +9378,39 @@ cons_fix_new_aarch64 (fragS * frag, int where, int size, expressionS * exp)
   bfd_reloc_code_real_type type;
   int pcrel = 0;
 
-  /* Pick a reloc.
-     FIXME: @@ Should look at CPU word size.  */
-  switch (size)
+#ifdef TE_PE
+  if (exp->X_op == O_secrel)
     {
-    case 1:
-      type = BFD_RELOC_8;
-      break;
-    case 2:
-      type = BFD_RELOC_16;
-      break;
-    case 4:
-      type = BFD_RELOC_32;
-      break;
-    case 8:
-      type = BFD_RELOC_64;
-      break;
-    default:
-      as_bad (_("cannot do %u-byte relocation"), size);
-      type = BFD_RELOC_UNUSED;
-      break;
+      exp->X_op = O_symbol;
+      type = BFD_RELOC_32_SECREL;
     }
+  else
+    {
+#endif
+    /* Pick a reloc.
+       FIXME: @@ Should look at CPU word size.  */
+    switch (size)
+      {
+      case 1:
+	type = BFD_RELOC_8;
+	break;
+      case 2:
+	type = BFD_RELOC_16;
+	break;
+      case 4:
+	type = BFD_RELOC_32;
+	break;
+      case 8:
+	type = BFD_RELOC_64;
+	break;
+      default:
+	as_bad (_("cannot do %u-byte relocation"), size);
+	type = BFD_RELOC_UNUSED;
+	break;
+      }
+#ifdef TE_PE
+    }
+#endif
 
   fix_new_exp (frag, where, (int) size, exp, pcrel, type);
 }
diff --git a/gas/config/tc-aarch64.h b/gas/config/tc-aarch64.h
index 7a9a4e77bff..5f82dd23824 100644
--- a/gas/config/tc-aarch64.h
+++ b/gas/config/tc-aarch64.h
@@ -314,4 +314,8 @@ extern void aarch64_handle_align (struct frag *);
 extern int tc_aarch64_regname_to_dw2regnum (char *regname);
 extern void tc_aarch64_frame_initial_instructions (void);
 
+#ifdef TE_PE
+#define O_secrel O_md1
+#endif /* TE_PE */
+
 #endif /* TC_AARCH64 */
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index 80019a48778..83b20d0da45 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -84,6 +84,8 @@ if {[istarget "aarch64-*-pe*"]} {
     set pe_tests {
       {"aarch64" "--image-base 0x1000" "" "" {aarch64a.s aarch64b.s}
 	{{objdump -dr aarch64.d}} "aarch64.x"}
+      {".secrel32" "--disable-reloc-section" "" "" {secrel1.s secrel2.s}
+	{{objdump -s secrel_64.d}} "secrel.x"}
     }
 
     run_ld_link_tests $pe_tests
-- 
2.37.4


  parent reply	other threads:[~2022-12-16  2:14 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-16  2:13 [PATCH 1/5] Fix size of external_reloc " Mark Harmstone
2022-12-16  2:13 ` [PATCH 2/5] Skip ELF-specific tests when targeting pe-aarch64 Mark Harmstone
2022-12-16  7:07   ` Jan Beulich
2022-12-21 20:19     ` Mark Harmstone
2022-12-22  7:38       ` Jan Beulich
2022-12-16  2:13 ` [PATCH 3/5] Add pe-aarch64 relocations Mark Harmstone
2022-12-16  2:13 ` Mark Harmstone [this message]
2022-12-16  2:14 ` [PATCH 5/5] Add aarch64-w64-mingw32 target Mark Harmstone
2022-12-16  7:28   ` Jan Beulich
2022-12-18 22:44     ` Martin Storsjö
2022-12-20 13:18       ` Mark Harmstone
2022-12-16  7:03 ` [PATCH 1/5] Fix size of external_reloc for pe-aarch64 Jan Beulich
2022-12-16 10:47   ` Tamar Christina
2022-12-20 12:59     ` Mark Harmstone
2022-12-20 13:10       ` Jan Beulich
2022-12-20 13:38         ` Tamar Christina

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