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From: Dimitar Dimitrov <dimitar@dinux.eu>
To: binutils@sourceware.org
Cc: Dimitar Dimitrov <dimitar@dinux.eu>
Subject: [PATCH 2/2] ld: pru: Add optional section alignments
Date: Sun, 29 Jan 2023 17:38:20 +0200	[thread overview]
Message-ID: <20230129153820.944711-1-dimitar@dinux.eu> (raw)
In-Reply-To: <20230129153207.944175-1-dimitar@dinux.eu>

The Texas Instruments SoCs with AARCH64 host processors have stricter
alignment requirements than ones with ARM32 host processors.  It's not
only the requirement for resource_table to be aligned to 8.  But also
any loadable segment size must be a multiple of 4 [1].

The current PRU default linker script may output a segment size not
aligned to 4, which would cause firmware load failure on AARCH64 hosts.

Fix this by using COMMONPAGESIZE and MAXPAGESIZE to signify respectively
the section memory size requirement and the resource table section's
start address alignment.  This would avoid penalizing the ARM32 hosts,
for which the default values (1 and 1) are sufficient.

For AARCH64 hosts, the alignments would be overwritten from GCC spec
files using the linker command line, e.g.:
  -z common-page-size=4 -z max-page-size=8

Ok for master?

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/remoteproc/pru_rproc.c?h=v6.1#n555

ld/ChangeLog:

	* scripttempl/pru.sc (_data_end): Remove the alignment.
	(.data): Align output section size to COMMONPAGESIZE.
	(.resource_table): Ditto.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
---
 ld/scripttempl/pru.sc | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/ld/scripttempl/pru.sc b/ld/scripttempl/pru.sc
index 7cb80694641..4229bed99bb 100644
--- a/ld/scripttempl/pru.sc
+++ b/ld/scripttempl/pru.sc
@@ -147,7 +147,6 @@ SECTIONS
     ${RELOCATING+ *(.rodata:*)}
     ${RELOCATING+*(.gnu.linkonce.d*)}
     ${RELOCATING+*(.gnu.linkonce.r*)}
-    ${RELOCATING+. = ALIGN(4);}
     ${RELOCATING+ PROVIDE (_data_end = .) ; }
 
     ${RELOCATING+/* Merge the bss input sections into the output
@@ -164,13 +163,22 @@ SECTIONS
     ${RELOCATING+*(COMMON)}
     ${RELOCATING+ PROVIDE (_bss_end = .) ; }
 
+    ${RELOCATING+/* In case this is the last input section, align to
+      keep the loadable segment size a multiple of the common page size.
+      Some SoCs have stricter memory size requirements than others.  */
+    . = ALIGN (CONSTANT (COMMONPAGESIZE));}
   } ${RELOCATING+ > dmem}
 
   /* Linux remoteproc loader requires the resource_table section
-     start address to be aligned to 8 bytes.  */
-  .resource_table ${RELOCATING-0} ${RELOCATING+ ALIGN (8)} :
+     start address to be aligned to 8 bytes for SoCs with AARCH64
+     host processors.  */
+  .resource_table ${RELOCATING-0} ${RELOCATING+ ALIGN (CONSTANT (MAXPAGESIZE))} :
   {
     KEEP (*(.resource_table))
+    ${RELOCATING+/* In case this is the last input section, align to
+      keep the loadable segment size a multiple of the common page size.
+      Some SoCs have stricter memory size requirements than others.  */
+    . = ALIGN (CONSTANT (COMMONPAGESIZE));}
   } ${RELOCATING+ > dmem}
 
   /* Global data not cleared after reset.  */
-- 
2.39.1


  reply	other threads:[~2023-01-29 15:38 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-29 15:32 [PATCH 1/2] ld: pru: Merge the bss input sections into data Dimitar Dimitrov
2023-01-29 15:38 ` Dimitar Dimitrov [this message]
2023-02-01  9:43   ` [PATCH 2/2] ld: pru: Add optional section alignments Nick Clifton
2023-02-01  9:43 ` [PATCH 1/2] ld: pru: Merge the bss input sections into data Nick Clifton

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