[RFC PATCH v3 8/8] RISC-V: Add Zvks ISA extension support

[Christoph Muellner <christoph.muellner@vrull.eu>]

From: Christoph Müllner <christoph.muellner@vrull.eu>

This commit adds support for the Zvks ISA extension,
which is part of the vector crypto extensions.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
---
 bfd/elfxx-riscv.c              |  3 +++
 gas/testsuite/gas/riscv/zvks.d | 10 ++++++++++
 gas/testsuite/gas/riscv/zvks.s |  2 ++
 3 files changed, 15 insertions(+)
 create mode 100644 gas/testsuite/gas/riscv/zvks.d
 create mode 100644 gas/testsuite/gas/riscv/zvks.s

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index f333c26189a..09ce4b15a3e 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1104,6 +1104,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"zvkn", "zvkned",	check_implicit_always},
   {"zvkn", "zvknha",	check_implicit_always},
   {"zvkn", "zvknhb",	check_implicit_always},
+  {"zvks", "zvksed",	check_implicit_always},
+  {"zvks", "zvksh",	check_implicit_always},
   {"smaia", "ssaia",		check_implicit_always},
   {"smstateen", "ssstateen",	check_implicit_always},
   {"smepmp", "zicsr",		check_implicit_always},
@@ -1216,6 +1218,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
   {"zvknhb",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zvksed",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zvksh",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zvks",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zvl32b",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zvl64b",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zvl128b",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
diff --git a/gas/testsuite/gas/riscv/zvks.d b/gas/testsuite/gas/riscv/zvks.d
new file mode 100644
index 00000000000..013e9880b06
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zvks.d
@@ -0,0 +1,10 @@
+#as: -march=rv64gc_zvks
+#objdump: -dr
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+0+000 <.text>:
+[ 	]+[0-9a-f]+:[ 	]+86802277[ 	]+vsm4k.vi[ 	]+v4,v8,0
+[ 	]+[0-9a-f]+:[ 	]+ae802277[ 	]+vsm3c.vi[ 	]+v4,v8,0
diff --git a/gas/testsuite/gas/riscv/zvks.s b/gas/testsuite/gas/riscv/zvks.s
new file mode 100644
index 00000000000..454e701d9d6
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zvks.s
@@ -0,0 +1,2 @@
+	vsm4k.vi v4, v8, 0
+	vsm3c.vi v4, v8, 0
-- 
2.39.1