From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 10D473858281 for ; Thu, 30 Mar 2023 10:24:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 10D473858281 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3F76B2F4; Thu, 30 Mar 2023 03:25:03 -0700 (PDT) Received: from e121540-lin.manchester.arm.com (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 769963F663; Thu, 30 Mar 2023 03:24:18 -0700 (PDT) From: Richard Sandiford To: binutils@sourceware.org Cc: Richard Sandiford Subject: [PATCH 06/43] aarch64: Rename REG_TYPE_ZA* to REG_TYPE_ZAT* Date: Thu, 30 Mar 2023 11:23:22 +0100 Message-Id: <20230330102359.3327695-7-richard.sandiford@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230330102359.3327695-1-richard.sandiford@arm.com> References: <20230330102359.3327695-1-richard.sandiford@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-33.4 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: The ZA tile registers were called REG_TYPE_ZA, REG_TYPE_ZAH and REG_TYPE_ZAV. However, a later patch wants to make plain "za" a register type too, and REG_TYPE_ZA is the obvious name for that. This patch therefore adds "T" (tile) to the existing names. --- gas/config/tc-aarch64.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 4e75946c684..c8b4129202c 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -283,9 +283,9 @@ struct reloc_entry BASIC_REG_TYPE(VN) /* v[0-31] */ \ BASIC_REG_TYPE(ZN) /* z[0-31] */ \ BASIC_REG_TYPE(PN) /* p[0-15] */ \ - BASIC_REG_TYPE(ZA) /* za[0-15] */ \ - BASIC_REG_TYPE(ZAH) /* za[0-15]h */ \ - BASIC_REG_TYPE(ZAV) /* za[0-15]v */ \ + BASIC_REG_TYPE(ZAT) /* za[0-15] (ZA tile) */ \ + BASIC_REG_TYPE(ZATH) /* za[0-15]h (ZA tile horizontal slice) */ \ + BASIC_REG_TYPE(ZATV) /* za[0-15]v (ZA tile vertical slice) */ \ /* Typecheck: any 64-bit int reg (inc SP exc XZR). */ \ MULTI_REG_TYPE(R64_SP, REG_TYPE(R_64) | REG_TYPE(SP_64)) \ /* Typecheck: same, plus SVE registers. */ \ @@ -4297,7 +4297,7 @@ static int parse_sme_zada_operand (char **str, aarch64_opnd_qualifier_t *qualifier) { int regno; - const reg_entry *reg = parse_reg_with_qual (str, REG_TYPE_ZA, qualifier); + const reg_entry *reg = parse_reg_with_qual (str, REG_TYPE_ZAT, qualifier); if (reg == NULL) return PARSE_FAIL; @@ -4448,12 +4448,12 @@ parse_sme_za_hv_tiles_operand (char **str, const reg_entry *reg; qh = qv = *str; - if ((reg = parse_reg_with_qual (&qh, REG_TYPE_ZAH, qualifier)) != NULL) + if ((reg = parse_reg_with_qual (&qh, REG_TYPE_ZATH, qualifier)) != NULL) { *slice_indicator = HV_horizontal; *str = qh; } - else if ((reg = parse_reg_with_qual (&qv, REG_TYPE_ZAV, qualifier)) != NULL) + else if ((reg = parse_reg_with_qual (&qv, REG_TYPE_ZATV, qualifier)) != NULL) { *slice_indicator = HV_vertical; *str = qv; @@ -4566,7 +4566,8 @@ parse_sme_zero_mask(char **str) q = *str; do { - const reg_entry *reg = parse_reg_with_qual (&q, REG_TYPE_ZA, &qualifier); + const reg_entry *reg = parse_reg_with_qual (&q, REG_TYPE_ZAT, + &qualifier); if (reg) { int regno = reg->number; @@ -8266,13 +8267,13 @@ static const reg_entry reg_names[] = { REGSET16 (p, PN), REGSET16 (P, PN), /* SME ZA tile registers. */ - REGSET16 (za, ZA), REGSET16 (ZA, ZA), + REGSET16 (za, ZAT), REGSET16 (ZA, ZAT), /* SME ZA tile registers (horizontal slice). */ - REGSET16S (za, h, ZAH), REGSET16S (ZA, H, ZAH), + REGSET16S (za, h, ZATH), REGSET16S (ZA, H, ZATH), /* SME ZA tile registers (vertical slice). */ - REGSET16S (za, v, ZAV), REGSET16S (ZA, V, ZAV) + REGSET16S (za, v, ZATV), REGSET16S (ZA, V, ZATV) }; #undef REGDEF -- 2.25.1