From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-00069f02.pphosted.com (mx0b-00069f02.pphosted.com [205.220.177.32]) by sourceware.org (Postfix) with ESMTPS id E67723857735 for ; Thu, 11 May 2023 14:14:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E67723857735 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=oracle.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=oracle.com Received: from pps.filterd (m0246630.ppops.net [127.0.0.1]) by mx0b-00069f02.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34BDwk0u014337 for ; Thu, 11 May 2023 14:14:04 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : subject : date : message-id : in-reply-to : references : content-transfer-encoding : content-type : mime-version; s=corp-2023-03-30; bh=v1dTyp99SwGG7TMMlZfWjO791Co3U3+OI+RGrQrEFiU=; b=leHwgxeNHG5I29GHNs0veyYmFlcHj7e1udiX3PISUjT7ZgC+kYdBMo6ghsZvvoP8H8hX qyx9J0dHIJ17MUbxTbAQRhDOAtUOWNwcVtAUa++uThFQ2GSPT+ErFnTMD6TFavG26PoF BbPt6e91brddYLo0zO5ZryiQI1894YQQZNMHiOdyDc/8HVtXb311eVRbFtEFlhbjgwSt fLyNhLF6vvaRM8pKh3ChDGLYy8lF3JPlbUQLD8PetjDMqLV25OSt0t2/SKuWXLN9U64O KP3Gv8nr2tDsPpm7+CihPLG2jfJPr9QEhrPmO6qypfZT/MM9O49lUqrY9fi0xoIKrEnr Ug== Received: from iadpaimrmta03.imrmtpd1.prodappiadaev1.oraclevcn.com (iadpaimrmta03.appoci.oracle.com [130.35.103.27]) by mx0b-00069f02.pphosted.com (PPS) with ESMTPS id 3qf776q52r-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Thu, 11 May 2023 14:14:04 +0000 Received: from pps.filterd (iadpaimrmta03.imrmtpd1.prodappiadaev1.oraclevcn.com [127.0.0.1]) by iadpaimrmta03.imrmtpd1.prodappiadaev1.oraclevcn.com (8.17.1.19/8.17.1.19) with ESMTP id 34BDXWiD024177 for ; Thu, 11 May 2023 14:14:03 GMT Received: from nam12-bn8-obe.outbound.protection.outlook.com (mail-bn8nam12lp2170.outbound.protection.outlook.com [104.47.55.170]) by iadpaimrmta03.imrmtpd1.prodappiadaev1.oraclevcn.com (PPS) with ESMTPS id 3qf7y6sbny-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Thu, 11 May 2023 14:14:03 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=QyEGzxCPWOgIoHpWn/K017t5RTs+A17zAPf+PpDbcYl0E9NMwoPgvXoOX+kZjIik3qpexWTtf8E6e/GA9n3BuC3qwyKBDrKrkc/lod/BCbu5RneSNiY/vvVxsxROnlDFFwFrEDWfplCC0d/77hJjYw2tn1JN4cdvdrURwp0+AYjKFTwbg8cJg6gMQFmXkj3pAtsHbQuCEAXXSVUzDj/9SKtnOaHIxJWUbro9JmmPPfZX3fiGU0RHsWVaYW+LQDrxfxHt5fe97wmequi16T5D1FzKBAsHGwGjvXedozQ1/aj/WUODu8N6moVHdE5/YzFl3OPD+r1MPagB7N9KGUL/cQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=v1dTyp99SwGG7TMMlZfWjO791Co3U3+OI+RGrQrEFiU=; b=hJQE4CgQ3niVXZXKEMd0SPy3h+rR7scsvD0WizT34dfFg9cR4YvuuV6AeE9fxVCTtCTycM3xEWKBB3UtSfvpVvhwX+bWFTlKJLzWaR8vp1ZSOohV+Syii4hwxaupD9Urd95lFNabS414BNIWa8WnbjkHHWxnNuEW37DWQI14ashJPCNwXBzNRsdHEzGh72Bt6Y+QlVBy2saJjjMJ6RNbixHZYKzHHljP9iIMfIj6CMDzaaul80DUnrT3sYFaNva83ijIjRfpTyi6ETfxVmuc3k1GoF+EuK43lmfLlbuvy2S4j0XhPKY1GDgsEF+HGl1F4TTi2JAVegYtZX+tWN9B4Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oracle.com; dmarc=pass action=none header.from=oracle.com; dkim=pass header.d=oracle.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.onmicrosoft.com; s=selector2-oracle-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=v1dTyp99SwGG7TMMlZfWjO791Co3U3+OI+RGrQrEFiU=; b=MWP/xQJF1xk0sCW2ExGn7OUZh7n+ZX7luvadP/F2u/Z3yBm6oW/XjpOhUvedOIYcut41vup1qcAr7xXrWyj4Z4LBXd544Yko9TnqZpyEpyHfwxFF5MfU566V6yxbaaREZleFFO91l+IyKOoWMNI3r1gfvXrxqYPlqRZmCSofp1o= Received: from BYAPR10MB2888.namprd10.prod.outlook.com (2603:10b6:a03:88::32) by SA1PR10MB6341.namprd10.prod.outlook.com (2603:10b6:806:254::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.32; Thu, 11 May 2023 14:14:00 +0000 Received: from BYAPR10MB2888.namprd10.prod.outlook.com ([fe80::d8ec:1377:664:f516]) by BYAPR10MB2888.namprd10.prod.outlook.com ([fe80::d8ec:1377:664:f516%7]) with mapi id 15.20.6363.033; Thu, 11 May 2023 14:13:59 +0000 From: "Jose E. Marchesi" To: binutils@sourceware.org Subject: [PATCH 1/4] opcodes: use CGEN_INSN_LGUINT for base instructions Date: Thu, 11 May 2023 16:13:48 +0200 Message-Id: <20230511141351.18886-2-jose.marchesi@oracle.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230511141351.18886-1-jose.marchesi@oracle.com> References: <20230511141351.18886-1-jose.marchesi@oracle.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SN4PR0501CA0060.namprd05.prod.outlook.com (2603:10b6:803:41::37) To BYAPR10MB2888.namprd10.prod.outlook.com (2603:10b6:a03:88::32) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BYAPR10MB2888:EE_|SA1PR10MB6341:EE_ X-MS-Office365-Filtering-Correlation-Id: e18c1d6b-9080-45d5-e431-08db5229f724 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: HlinSXhw75Ydy8JNaxv7wjHcr2otOeh2/v0G1fVIG7C9xEhS3hWQCd8N90yrboAJrivAZoGHe4zWxy4ee4C6MttYFLEUVVClY+XSmsLOIUYBrme35qEAp9xARqxURSnOpVrxNTa1Aqlu2tiaPsq/eQfoPcP++5TEOK0CSC/a1VfcPmCxyhWOqMIY6VBK+xP7Nkfq5wkldNKKyssAWxVUfqVh7jD3R3fPSyZFYarh0ZRZfEm+Zh2dtTFbM/ynVqa7twOtagkm1gEZEPIMytq3l1/sHK2wu1COxB9uNY8baX1CFeIdVdncaoJA98ZaT/dVYubnkNv1kFzxLjjIBPJ4u7LHDXKySZHcJjbux0X5aYnpaAXNe5zef+758mxzk17OGfu39tjBogb8HHlETtEikkVfDW1ebr/wPvQOf0aj5caXS7yB31g9jmAa7Y9RwK8AlZY6436KC26e/AedL0Ke6VUZvz9n9XCHhoBtf//Aj7boSUUbMVSMHIXpYYvZPD7u+h/Iv0X3xF095BDL8LfVybtXhQXevyCqYDCNQuAbKThjQ82jI8W0OLi47tKM1pCN X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:BYAPR10MB2888.namprd10.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230028)(39860400002)(136003)(346002)(376002)(396003)(366004)(451199021)(8936002)(30864003)(316002)(8676002)(478600001)(41300700001)(2906002)(6666004)(6916009)(66946007)(66476007)(66556008)(5660300002)(6486002)(1076003)(26005)(6506007)(6512007)(2616005)(36756003)(186003)(83380400001)(38100700002)(86362001);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?MTEqkalwZSB/N6XSLx6T3KXGEnS+Zaxe8Jq6evgf167ivemiUj4a1VWa3KIW?= =?us-ascii?Q?RSnrzlM4HFMyJ3j89NHotogoBmtQ1edaBbCceCpRodlvlN5lPCis4a/hDvUF?= =?us-ascii?Q?WnIY2pb68Pdthmq0BDBDNq8j4l4Nbw+CZnSlFZ5TxgokfgaEsmJYyYTQnDYQ?= =?us-ascii?Q?kfYtz6lDGm5tPjcSUF4xAsw4sTmOhs3Xw36jLyzjEldnwTvU+7Q9DibyORrb?= =?us-ascii?Q?ItTei98KbIhqBwlRyyTc60OC+CkU5oNU3HIafTZ1bNXxmPwzjzYes5o3tnHt?= =?us-ascii?Q?jt/7vdLpHVFDZlN4XR5EXuxQJLRXXABXTQuyJYLcbP52j7eKVq8MT7LQPCjx?= =?us-ascii?Q?Pv9vKRHWiqa1Wh05LJWLTxpG8PEfqM2AGQqjEOddckI9wo96WsSVirMDvo9h?= =?us-ascii?Q?4VZzXdBDPF77q/Uy6q+LqHK1jJxdTyFg4ktgbMGLifwjRmkK2K20W7ybIIpY?= =?us-ascii?Q?EEq5jr+rXf2xyJPBi24lgCZsbvHdMUMPrwohBcyph2A4RLUERlIEA0FTs3MK?= =?us-ascii?Q?VqDNm6m6ODOZg428GUdVADIWuYHj/Xi16DXzBBklG2d917Sv6d7rfyn14xrn?= =?us-ascii?Q?Rnq2zQndjIcs01wJ02IWiPraWeheulbwgzBbV4vq+W+jw99kMQi1ft4D9Lo9?= =?us-ascii?Q?utAnM03uLiAWY6bwcTHM+VHCi2poZm5Uwxs8b9mwftceNP4DXbqss9Jau7+m?= =?us-ascii?Q?nq/nUPprK7XfQ5re5e/08BuUjt4mdKAdvSgAc7IO3hTGcsjDCqEktzFpYhkx?= =?us-ascii?Q?k6E8iBGqC4PlYXs8grk04n1AipjAwq1tXF+Xm5LSDVBSXjVIa+XHSgGWAu/5?= =?us-ascii?Q?UF57GqIsrRLFPDhpC+v9hH7Yd5L5Kj8/WYg/MJVtd/FunNbKWbxubNtKYaHG?= =?us-ascii?Q?XwOZSwqg7eVe2+E2bFMmWoOQxQslSCVI9lhvOwkAcLD9bmc+81amPV+FVRxo?= =?us-ascii?Q?rIE9kMfVzxmju1pDdqOFwb7nJqZyX+y4UQDpmQ5ULCXgErWLDdZ9/nO3+mIP?= =?us-ascii?Q?QPMbMwi9HB4aLmDoubjaq8j2zmwWeoPqEthPEbYwv6tNdfcBeQA8g2Ca14sd?= =?us-ascii?Q?w1cYNcyTfnBZfDy0BnHH9VgtbMqPaEsPrynl0w4KOn5Vd1Pbil7EaApBrrcF?= =?us-ascii?Q?8bY8A0bEk6NvDmWaGiNn/CIqv3dnmCFLEEvg2WbIRH79i5zQs1s1GVD8qI81?= =?us-ascii?Q?ThEUmen+RNHAv+2r449G396K37O4HEouOVcWI+CfWUrJtvpnq+qIYiwGElN6?= =?us-ascii?Q?UmbkFnNveyVaUIXm2Rpp9Pw80f7HkbGEm6AJjnMQ0On9ONbWBlBFTsV1655V?= =?us-ascii?Q?XMhuKsjJ7gQZcbGX0xSIeGjEQeK+ykPxxAwBkQji20vwbAz9c36YrqseN+wJ?= =?us-ascii?Q?QY6XKxyVi4UPTIOVxPmb11YsCWwCYjgvfXhkCZu6WIslBM2ZSG9Kszd+cGwX?= =?us-ascii?Q?fq7VUrWi98Mr4gTeC52zeZBZw9PC6KaDf/Ih+050KWrCtS+OSYdybL/CBTaM?= =?us-ascii?Q?zDB0n+js1G26eKbdniCvy+hEh9HVWgJPgoif/2AB4rB9t5UUoqPrDx9FcY58?= =?us-ascii?Q?ox4a5GD4dEVnf7PNqz8IxhZkhGYDk02EcuxhQ8MAuZdAInNUns18FDAGiJUQ?= =?us-ascii?Q?XQ=3D=3D?= X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: H3bJiruDu7xfD3astUEgiNEIu5+WZaRUGCfqmxMBtJ1Q2SX4lx2yEdxiHeSPXUgVu1nQSdIh5qJKbgTgA2jc5gVUgRm6E0FTWNgxUA9nTdY3Nh9X9oHqhV9lK3OQHw2WPMNR08cNqr73OgM9vufqMjB1t5pemII0mIPIdaqdeZBuby37mbE/JDH6m+CyOQmb2M8BUeELZdlDAFF7e1HXJsYzQLkTUHaEHaQqekFqPe/Uxca41cFflDQQYxUACeUZQYidbCPR1YoqrZOTseU3giALzJjqHQf6YYfBpocrSvVqBKPZd2kMFFB+veEHAYNsnxhURVR8+zGuxIjpm4KfoTVRKMfERgn0kunVtc7hpgsTWeIDry2CevZ75ZrCMnZC9Dt3dM8H+dYVwCo3t9t+tCZRJ6dSrCsvAORoaVt6WzSTsXiTlEgtZ4hbYQ4gZk+GMlZXxa1gpm/M/REWXBndd8h9P+FvzQoSGVmV7ZYeVpxpbDhMmHdvELQBn0YW3/wNJDokp3UsLR+AAvPTxv3AxG5pLMizx5/JK9IfdIQpbJFfEJhjQ8T1lt56s/PNqk9PYVD3aEsrVAEIs45kFz5N8c6GsNXigb8Los3kYaFN5doKS0IcYgvFEywA34jcc9x87D2sYL9dqOxqfaje6BbZYx2dmROYMz6a6TTE7IhDdp6RFXHMrCklLcAqEb/r9VWFBnrSaKtVzzQktBjbu6gncB6BUvJjnUCCt9yyl2YfWUO94Q6XOVsW4LRliv7vNKus X-OriginatorOrg: oracle.com X-MS-Exchange-CrossTenant-Network-Message-Id: e18c1d6b-9080-45d5-e431-08db5229f724 X-MS-Exchange-CrossTenant-AuthSource: BYAPR10MB2888.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2023 14:13:59.8915 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 4e2c6054-71cb-48f1-bd6c-3a9705aca71b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: j+JI4XA3NjyhTY0RIfmqPszewk16chUh80rSDceV4wkY5Noo1CjuA9FwJXPmRthxHiX2a2z+Ce3okgPODuAp8BwY9NNpK62SC/SICgcJB0M= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR10MB6341 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-11_11,2023-05-05_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 mlxlogscore=999 phishscore=0 adultscore=0 bulkscore=0 spamscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305110123 X-Proofpoint-ORIG-GUID: wHMWu_-o21yx6M8AcYd0XxY8HiUICw8f X-Proofpoint-GUID: wHMWu_-o21yx6M8AcYd0XxY8HiUICw8f X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch changes the opcodes CGEN support code in order to allow base instructions with opcodes past the least significative 32 bits. Note that the masks have been adapted in a previous patch. This patch has been regtested for all the current targets in binutils that are based on CGEN, namely: - bpf-unknown-none - lm32-elf - fr30-elf - ip2k-elf - iq2000-elf - m32c-elf - m32r-elf - mep-elf - mt-elf - or1k-elf - stormy16-elf" Also with --enable-cgen-maint and --enable-targets=all. No regressions observed. include/ChangeLog: 2023-05-10 Jose E. Marchesi * opcode/cgen.h (CGEN_IVALUE): Make room for 64-bit base values. opcodes/ChangeLog: 2023-05-10 Jose E. Marchesi * cgen-dis.in (print_insn): Use CGEN_INSN_LGUINT for instruction base values. * cgen-dis.c (cgen_dis_lookup_insn): Likewise. * cgen-opc.c (cgen_macro_insn_count): Likewise. * epiphany-dis.c: Regenerate. * fr30-dis.c: Likewise. * frv-dis.c: Likewise. * ip2k-dis.c: Likewise. * iq2000-dis.c: Likewise. * lm32-dis.c: Likewise. * m32c-dis.c: Likewise. * m32r-dis.c: Likewise. * mep-dis.c: Likewise. * mt-dis.c: Likewise. * or1k-dis.c: Likewise. * xstormy16-dis.c: Likewise. --- include/ChangeLog | 4 ++++ include/opcode/cgen.h | 10 +++++----- opcodes/ChangeLog | 19 +++++++++++++++++++ opcodes/bpf-dis.c | 2 +- opcodes/cgen-dis.c | 2 +- opcodes/cgen-dis.in | 2 +- opcodes/cgen-opc.c | 8 ++++---- opcodes/epiphany-dis.c | 2 +- opcodes/fr30-dis.c | 2 +- opcodes/frv-dis.c | 2 +- opcodes/ip2k-dis.c | 2 +- opcodes/iq2000-dis.c | 2 +- opcodes/lm32-dis.c | 2 +- opcodes/m32c-dis.c | 2 +- opcodes/m32r-dis.c | 2 +- opcodes/mep-dis.c | 2 +- opcodes/mt-dis.c | 2 +- opcodes/or1k-dis.c | 2 +- opcodes/xstormy16-dis.c | 2 +- 19 files changed, 47 insertions(+), 24 deletions(-) diff --git a/include/ChangeLog b/include/ChangeLog index b157251bea8..d38f507f4e3 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2023-05-10 Jose E. Marchesi + + * opcode/cgen.h (CGEN_IVALUE): Make room for 64-bit base values. + 2023-03-23 Frederic Cambus * elf/common.h (PT_OPENBSD_MUTABLE): Define. diff --git a/include/opcode/cgen.h b/include/opcode/cgen.h index 6c0732b4b25..9d638f091f5 100644 --- a/include/opcode/cgen.h +++ b/include/opcode/cgen.h @@ -928,7 +928,7 @@ typedef struct typedef struct { /* The opcode portion of the base insn. */ - CGEN_INSN_INT base_value; + CGEN_INSN_LGUINT base_value; #ifdef CGEN_MAX_EXTRA_OPCODE_OPERANDS /* Extra opcode values beyond base_value. */ @@ -1186,7 +1186,7 @@ extern CGEN_INSN_LIST * cgen_asm_lookup_insn instruction (the actually hashing done is up to the target). */ extern CGEN_INSN_LIST * cgen_dis_lookup_insn - (CGEN_CPU_DESC, const char *, CGEN_INSN_INT); + (CGEN_CPU_DESC, const char *, CGEN_INSN_LGUINT); /* FIXME: delete these two */ #define CGEN_DIS_LOOKUP_INSN(cd, buf, value) cgen_dis_lookup_insn ((cd), (buf), (value)) #define CGEN_DIS_NEXT_INSN(insn) ((insn)->next) @@ -1449,7 +1449,7 @@ extern int CGEN_SYM (get_mach) (const char *); /* Operand index computation. */ extern const CGEN_INSN * cgen_lookup_insn (CGEN_CPU_DESC, const CGEN_INSN * insn_, - CGEN_INSN_INT int_value_, unsigned char *bytes_value_, + CGEN_INSN_LGUINT int_value_, unsigned char *bytes_value_, int length_, CGEN_FIELDS *fields_, int alias_p_); extern void cgen_get_insn_operands (CGEN_CPU_DESC, const CGEN_INSN * insn_, @@ -1461,10 +1461,10 @@ extern const CGEN_INSN * cgen_lookup_get_insn_operands /* Cover fns to bfd_get/set. */ -extern CGEN_INSN_INT cgen_get_insn_value +extern CGEN_INSN_LGUINT cgen_get_insn_value (CGEN_CPU_DESC, unsigned char *, int, int); extern void cgen_put_insn_value - (CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT, int); + (CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_LGUINT, int); extern CGEN_INSN_INT cgen_get_base_insn_value (CGEN_CPU_DESC, unsigned char *, int); diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 890931e6b8a..d954bb938aa 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,22 @@ +2023-05-10 Jose E. Marchesi + + * cgen-dis.in (print_insn): Use CGEN_INSN_LGUINT for instruction + base values. + * cgen-dis.c (cgen_dis_lookup_insn): Likewise. + * cgen-opc.c (cgen_macro_insn_count): Likewise. + * epiphany-dis.c: Regenerate. + * fr30-dis.c: Likewise. + * frv-dis.c: Likewise. + * ip2k-dis.c: Likewise. + * iq2000-dis.c: Likewise. + * lm32-dis.c: Likewise. + * m32c-dis.c: Likewise. + * m32r-dis.c: Likewise. + * mep-dis.c: Likewise. + * mt-dis.c: Likewise. + * or1k-dis.c: Likewise. + * xstormy16-dis.c: Likewise. + 2023-04-21 Tom Tromey * i386-dis.c (OP_J): Check result of get16. diff --git a/opcodes/bpf-dis.c b/opcodes/bpf-dis.c index 0a345179569..a1f2c71fa5d 100644 --- a/opcodes/bpf-dis.c +++ b/opcodes/bpf-dis.c @@ -367,7 +367,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/cgen-dis.c b/opcodes/cgen-dis.c index 90746a845ed..917ce0a8ecc 100644 --- a/opcodes/cgen-dis.c +++ b/opcodes/cgen-dis.c @@ -232,7 +232,7 @@ build_dis_hash_table (CGEN_CPU_DESC cd) /* Return the first entry in the hash list for INSN. */ CGEN_INSN_LIST * -cgen_dis_lookup_insn (CGEN_CPU_DESC cd, const char * buf, CGEN_INSN_INT value) +cgen_dis_lookup_insn (CGEN_CPU_DESC cd, const char * buf, CGEN_INSN_LGUINT value) { unsigned int hash; diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in index c144c7eb450..16f888fa9c6 100644 --- a/opcodes/cgen-dis.in +++ b/opcodes/cgen-dis.in @@ -202,7 +202,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/cgen-opc.c b/opcodes/cgen-opc.c index 7141ffb6a3f..86d897580fa 100644 --- a/opcodes/cgen-opc.c +++ b/opcodes/cgen-opc.c @@ -355,13 +355,13 @@ cgen_macro_insn_count (CGEN_CPU_DESC cd) /* Cover function to read and properly byteswap an insn value. */ -CGEN_INSN_INT +CGEN_INSN_LGUINT cgen_get_insn_value (CGEN_CPU_DESC cd, unsigned char *buf, int length, int endian) { int big_p = (endian == CGEN_ENDIAN_BIG); int insn_chunk_bitsize = cd->insn_chunk_bitsize; - CGEN_INSN_INT value = 0; + CGEN_INSN_LGUINT value = 0; if (insn_chunk_bitsize != 0 && insn_chunk_bitsize < length) { @@ -397,7 +397,7 @@ void cgen_put_insn_value (CGEN_CPU_DESC cd, unsigned char *buf, int length, - CGEN_INSN_INT value, + CGEN_INSN_LGUINT value, int endian) { int big_p = (endian == CGEN_ENDIAN_BIG); @@ -446,7 +446,7 @@ cgen_put_insn_value (CGEN_CPU_DESC cd, const CGEN_INSN * cgen_lookup_insn (CGEN_CPU_DESC cd, const CGEN_INSN *insn, - CGEN_INSN_INT insn_int_value, + CGEN_INSN_LGUINT insn_int_value, /* ??? CGEN_INSN_BYTES would be a nice type name to use here. */ unsigned char *insn_bytes_value, int length, diff --git a/opcodes/epiphany-dis.c b/opcodes/epiphany-dis.c index 72ea8bcc645..a77b1c24765 100644 --- a/opcodes/epiphany-dis.c +++ b/opcodes/epiphany-dis.c @@ -443,7 +443,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c index f0918b8a49c..f200290fc3f 100644 --- a/opcodes/fr30-dis.c +++ b/opcodes/fr30-dis.c @@ -464,7 +464,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c index 4740ac4509a..d3901c923be 100644 --- a/opcodes/frv-dis.c +++ b/opcodes/frv-dis.c @@ -561,7 +561,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c index 87ff75b47c2..598b04fc129 100644 --- a/opcodes/ip2k-dis.c +++ b/opcodes/ip2k-dis.c @@ -453,7 +453,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c index 07fd2fc6557..3fc988d078c 100644 --- a/opcodes/iq2000-dis.c +++ b/opcodes/iq2000-dis.c @@ -354,7 +354,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/lm32-dis.c b/opcodes/lm32-dis.c index b013eaec8a3..268d0f19da8 100644 --- a/opcodes/lm32-dis.c +++ b/opcodes/lm32-dis.c @@ -312,7 +312,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c index 950198a15c3..c783510cf4d 100644 --- a/opcodes/m32c-dis.c +++ b/opcodes/m32c-dis.c @@ -1056,7 +1056,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index 8cfd9fdd499..4bba1c1503c 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -444,7 +444,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/mep-dis.c b/opcodes/mep-dis.c index 91ea29b7c39..0da8a9aa117 100644 --- a/opcodes/mep-dis.c +++ b/opcodes/mep-dis.c @@ -1366,7 +1366,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/mt-dis.c b/opcodes/mt-dis.c index a2121989871..8efaac835a0 100644 --- a/opcodes/mt-dis.c +++ b/opcodes/mt-dis.c @@ -452,7 +452,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c index e70c6519973..e6170d608c7 100644 --- a/opcodes/or1k-dis.c +++ b/opcodes/or1k-dis.c @@ -339,7 +339,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c index 0de29d60248..a8da1e6285b 100644 --- a/opcodes/xstormy16-dis.c +++ b/opcodes/xstormy16-dis.c @@ -333,7 +333,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; -- 2.30.2