From: mengqinggang <mengqinggang@loongson.cn>
To: binutils@sourceware.org
Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn,
liuzhensong@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name,
maskray@google.com, mengqinggang <mengqinggang@loongson.cn>
Subject: [PATCH] LoongArch: gas: Add LVZ and LBT instructions support
Date: Thu, 29 Jun 2023 17:08:31 +0800 [thread overview]
Message-ID: <20230629090831.2579210-1-mengqinggang@loongson.cn> (raw)
gas/ChangeLog:
* testsuite/gas/loongarch/uleb128.d: Regenerated.
* testsuite/gas/loongarch/lvz-lbt.d: New test.
* testsuite/gas/loongarch/lvz-lbt.s: New test.
opcodes/ChangeLog:
* loongarch-opc.c (struct loongarch_ase): Add LVZ and LBT instructions.
---
gas/testsuite/gas/loongarch/lvz-lbt.d | 196 ++++++++++++++++++++++++
gas/testsuite/gas/loongarch/lvz-lbt.s | 186 +++++++++++++++++++++++
gas/testsuite/gas/loongarch/uleb128.d | 52 +++----
opcodes/loongarch-opc.c | 205 +++++++++++++++++++++++++-
4 files changed, 611 insertions(+), 28 deletions(-)
create mode 100644 gas/testsuite/gas/loongarch/lvz-lbt.d
create mode 100644 gas/testsuite/gas/loongarch/lvz-lbt.s
diff --git a/gas/testsuite/gas/loongarch/lvz-lbt.d b/gas/testsuite/gas/loongarch/lvz-lbt.d
new file mode 100644
index 00000000000..714d983684f
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/lvz-lbt.d
@@ -0,0 +1,196 @@
+#as:
+#objdump: -dr
+#skip: loongarch32-*-*
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+00000000.* <.text>:
+[ ]+0:[ ]+05000400[ ]+gcsrrd[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+4:[ ]+05000420[ ]+gcsrwr[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+8:[ ]+05000420[ ]+gcsrwr[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+c:[ ]+06482801[ ]+gtlbsrch[ ]*
+[ ]+10:[ ]+06482c01[ ]+gtlbrd[ ]*
+[ ]+14:[ ]+06483001[ ]+gtlbwr[ ]*
+[ ]+18:[ ]+06483401[ ]+gtlbfill[ ]*
+[ ]+1c:[ ]+06482001[ ]+gtlbclr[ ]*
+[ ]+20:[ ]+06482401[ ]+gtlbflush[ ]*
+[ ]+24:[ ]+002b8001[ ]+hvcl[ ]+0x1[ ]*
+[ ]+28:[ ]+00000820[ ]+gr2scr[ ]+\$scr0,[ ]+\$ra[ ]*
+[ ]+2c:[ ]+00000c20[ ]+scr2gr[ ]+\$zero,[ ]+\$scr1[ ]*
+[ ]+30:[ ]+48006600[ ]+jiscr0[ ]+100\(0x64\)[ ]*
+[ ]+34:[ ]+48006700[ ]+jiscr1[ ]+100\(0x64\)[ ]*
+[ ]+38:[ ]+00290420[ ]+addu12i.w[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+3c:[ ]+00298420[ ]+addu12i.d[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+40:[ ]+00300820[ ]+adc.b[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+44:[ ]+00308820[ ]+adc.h[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+48:[ ]+00310820[ ]+adc.w[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+4c:[ ]+00318820[ ]+adc.d[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+50:[ ]+00320820[ ]+sbc.b[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+54:[ ]+00328820[ ]+sbc.h[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+58:[ ]+00330820[ ]+sbc.w[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+5c:[ ]+00338820[ ]+sbc.d[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+60:[ ]+001a0820[ ]+rotr.b[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+64:[ ]+001a8820[ ]+rotr.h[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+68:[ ]+004c2420[ ]+rotri.b[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+6c:[ ]+004c4420[ ]+rotri.h[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+70:[ ]+00340820[ ]+rcr.b[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+74:[ ]+00348820[ ]+rcr.h[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+78:[ ]+00350820[ ]+rcr.w[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+7c:[ ]+00358820[ ]+rcr.d[ ]+\$zero,[ ]+\$ra,[ ]+\$tp[ ]*
+[ ]+80:[ ]+00502420[ ]+rcri.b[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+84:[ ]+00504420[ ]+rcri.h[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+88:[ ]+00508420[ ]+rcri.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+8c:[ ]+00510420[ ]+rcri.d[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+90:[ ]+0114e420[ ]+fcvt.ud.d[ ]+\$fa0,[ ]+\$fa1[ ]*
+[ ]+94:[ ]+0114e020[ ]+fcvt.ld.d[ ]+\$fa0,[ ]+\$fa1[ ]*
+[ ]+98:[ ]+01150820[ ]+fcvt.d.ld[ ]+\$fa0,[ ]+\$fa1,[ ]+\$fa2[ ]*
+[ ]+9c:[ ]+2e800420[ ]+ldl.d[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+a0:[ ]+2e000420[ ]+ldl.w[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+a4:[ ]+2e400420[ ]+ldr.w[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+a8:[ ]+2ec00420[ ]+ldr.d[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+ac:[ ]+2f000420[ ]+stl.w[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+b0:[ ]+2f800420[ ]+stl.d[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+b4:[ ]+2f400420[ ]+str.w[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+b8:[ ]+2fc00420[ ]+str.d[ ]+\$zero,[ ]+\$ra,[ ]+1\(0x1\)[ ]*
+[ ]+bc:[ ]+003f040c[ ]+x86adc.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+c0:[ ]+003f040d[ ]+x86adc.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+c4:[ ]+003f040e[ ]+x86adc.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+c8:[ ]+003f040f[ ]+x86adc.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+cc:[ ]+003f0404[ ]+x86add.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+d0:[ ]+003f0405[ ]+x86add.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+d4:[ ]+003f0406[ ]+x86add.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+d8:[ ]+003f0407[ ]+x86add.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+dc:[ ]+003f0400[ ]+x86add.wu[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+e0:[ ]+003f0401[ ]+x86add.du[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+e4:[ ]+00008000[ ]+x86inc.b[ ]+\$zero[ ]*
+[ ]+e8:[ ]+00008001[ ]+x86inc.h[ ]+\$zero[ ]*
+[ ]+ec:[ ]+00008002[ ]+x86inc.w[ ]+\$zero[ ]*
+[ ]+f0:[ ]+00008003[ ]+x86inc.d[ ]+\$zero[ ]*
+[ ]+f4:[ ]+003f0410[ ]+x86sbc.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+f8:[ ]+003f0411[ ]+x86sbc.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+fc:[ ]+003f0412[ ]+x86sbc.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+100:[ ]+003f0413[ ]+x86sbc.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+104:[ ]+003f0408[ ]+x86sub.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+108:[ ]+003f0409[ ]+x86sub.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+10c:[ ]+003f040a[ ]+x86sub.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+110:[ ]+003f040b[ ]+x86sub.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+114:[ ]+003f0402[ ]+x86sub.wu[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+118:[ ]+003f0403[ ]+x86sub.du[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+11c:[ ]+00008004[ ]+x86dec.b[ ]+\$zero[ ]*
+[ ]+120:[ ]+00008005[ ]+x86dec.h[ ]+\$zero[ ]*
+[ ]+124:[ ]+00008006[ ]+x86dec.w[ ]+\$zero[ ]*
+[ ]+128:[ ]+00008007[ ]+x86dec.d[ ]+\$zero[ ]*
+[ ]+12c:[ ]+003f8410[ ]+x86and.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+130:[ ]+003f8411[ ]+x86and.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+134:[ ]+003f8412[ ]+x86and.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+138:[ ]+003f8413[ ]+x86and.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+13c:[ ]+003f8414[ ]+x86or.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+140:[ ]+003f8415[ ]+x86or.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+144:[ ]+003f8416[ ]+x86or.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+148:[ ]+003f8417[ ]+x86or.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+14c:[ ]+003f8418[ ]+x86xor.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+150:[ ]+003f8419[ ]+x86xor.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+154:[ ]+003f841a[ ]+x86xor.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+158:[ ]+003f841b[ ]+x86xor.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+15c:[ ]+003e8400[ ]+x86mul.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+160:[ ]+003e8401[ ]+x86mul.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+164:[ ]+003e8402[ ]+x86mul.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+168:[ ]+003e8403[ ]+x86mul.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+16c:[ ]+003e8404[ ]+x86mul.bu[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+170:[ ]+003e8405[ ]+x86mul.hu[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+174:[ ]+003e8406[ ]+x86mul.wu[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+178:[ ]+003e8407[ ]+x86mul.du[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+17c:[ ]+003f840c[ ]+x86rcl.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+180:[ ]+003f840d[ ]+x86rcl.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+184:[ ]+003f840e[ ]+x86rcl.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+188:[ ]+003f840f[ ]+x86rcl.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+18c:[ ]+00542418[ ]+x86rcli.b[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+190:[ ]+00544419[ ]+x86rcli.h[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+194:[ ]+0054841a[ ]+x86rcli.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+198:[ ]+0055041b[ ]+x86rcli.d[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+19c:[ ]+003f8408[ ]+x86rcr.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1a0:[ ]+003f8409[ ]+x86rcr.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1a4:[ ]+003f840a[ ]+x86rcr.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1a8:[ ]+003f840b[ ]+x86rcr.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1ac:[ ]+00542410[ ]+x86rcri.b[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1b0:[ ]+00544411[ ]+x86rcri.h[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1b4:[ ]+00548412[ ]+x86rcri.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1b8:[ ]+00550413[ ]+x86rcri.d[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1bc:[ ]+003f8404[ ]+x86rotl.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1c0:[ ]+003f8405[ ]+x86rotl.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1c4:[ ]+003f8406[ ]+x86rotl.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1c8:[ ]+003f8407[ ]+x86rotl.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1cc:[ ]+00542414[ ]+x86rotli.b[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1d0:[ ]+00544415[ ]+x86rotli.h[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1d4:[ ]+00548416[ ]+x86rotli.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1d8:[ ]+00550417[ ]+x86rotli.d[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1dc:[ ]+003f8400[ ]+x86rotr.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1e0:[ ]+003f8401[ ]+x86rotr.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1e4:[ ]+003f8402[ ]+x86rotr.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1e8:[ ]+003f8403[ ]+x86rotr.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+1ec:[ ]+0054240c[ ]+x86rotri.b[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1f0:[ ]+0054440d[ ]+x86rotri.h[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1f4:[ ]+0054840e[ ]+x86rotri.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1f8:[ ]+0055040f[ ]+x86rotri.d[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+1fc:[ ]+003f0414[ ]+x86sll.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+200:[ ]+003f0415[ ]+x86sll.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+204:[ ]+003f0416[ ]+x86sll.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+208:[ ]+003f0417[ ]+x86sll.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+20c:[ ]+00542400[ ]+x86slli.b[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+210:[ ]+00544401[ ]+x86slli.h[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+214:[ ]+00548402[ ]+x86slli.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+218:[ ]+00550403[ ]+x86slli.d[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+21c:[ ]+003f0418[ ]+x86srl.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+220:[ ]+003f0419[ ]+x86srl.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+224:[ ]+003f041a[ ]+x86srl.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+228:[ ]+003f041b[ ]+x86srl.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+22c:[ ]+00542404[ ]+x86srli.b[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+230:[ ]+00544405[ ]+x86srli.h[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+234:[ ]+00548406[ ]+x86srli.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+238:[ ]+00550407[ ]+x86srli.d[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+23c:[ ]+003f041c[ ]+x86sra.b[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+240:[ ]+003f041d[ ]+x86sra.h[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+244:[ ]+003f041e[ ]+x86sra.w[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+248:[ ]+003f041f[ ]+x86sra.d[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+24c:[ ]+00542408[ ]+x86srai.b[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+250:[ ]+00544409[ ]+x86srai.h[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+254:[ ]+0054840a[ ]+x86srai.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+258:[ ]+0055040b[ ]+x86srai.d[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+25c:[ ]+00368400[ ]+setx86j[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+260:[ ]+00007820[ ]+setx86loope[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+264:[ ]+00007c20[ ]+setx86loopne[ ]+\$zero,[ ]+\$ra[ ]*
+[ ]+268:[ ]+005c0400[ ]+x86mfflag[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+26c:[ ]+005c0420[ ]+x86mtflag[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+270:[ ]+00007400[ ]+x86mftop[ ]+\$zero[ ]*
+[ ]+274:[ ]+00007020[ ]+x86mttop[ ]+0x1[ ]*
+[ ]+278:[ ]+00008009[ ]+x86inctop[ ]*
+[ ]+27c:[ ]+00008029[ ]+x86dectop[ ]*
+[ ]+280:[ ]+00008008[ ]+x86settm[ ]*
+[ ]+284:[ ]+00008028[ ]+x86clrtm[ ]*
+[ ]+288:[ ]+00580420[ ]+x86settag[ ]+\$zero,[ ]+0x1,[ ]+0x1[ ]*
+[ ]+28c:[ ]+00370411[ ]+armadd.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+290:[ ]+00378411[ ]+armsub.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+294:[ ]+00380411[ ]+armadc.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+298:[ ]+00388411[ ]+armsbc.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+29c:[ ]+00390411[ ]+armand.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+2a0:[ ]+00398411[ ]+armor.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+2a4:[ ]+003a0411[ ]+armxor.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+2a8:[ ]+003fc41c[ ]+armnot.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+2ac:[ ]+003a8411[ ]+armsll.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+2b0:[ ]+003b0411[ ]+armsrl.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+2b4:[ ]+003b8411[ ]+armsra.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+2b8:[ ]+003c0411[ ]+armrotr.w[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+2bc:[ ]+003c8411[ ]+armslli.w[ ]+\$zero,[ ]+0x1,[ ]+0x1[ ]*
+[ ]+2c0:[ ]+003d0411[ ]+armsrli.w[ ]+\$zero,[ ]+0x1,[ ]+0x1[ ]*
+[ ]+2c4:[ ]+003d8411[ ]+armsrai.w[ ]+\$zero,[ ]+0x1,[ ]+0x1[ ]*
+[ ]+2c8:[ ]+003e0411[ ]+armrotri.w[ ]+\$zero,[ ]+0x1,[ ]+0x1[ ]*
+[ ]+2cc:[ ]+003fc41f[ ]+armrrx.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+2d0:[ ]+00364420[ ]+armmove[ ]+\$zero,[ ]+\$ra,[ ]+0x1[ ]*
+[ ]+2d4:[ ]+003fc41d[ ]+armmov.w[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+2d8:[ ]+003fc41e[ ]+armmov.d[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+2dc:[ ]+005c0440[ ]+armmfflag[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+2e0:[ ]+005c0460[ ]+armmtflag[ ]+\$zero,[ ]+0x1[ ]*
+[ ]+2e4:[ ]+0036c400[ ]+setarmj[ ]+\$zero,[ ]+0x1[ ]*
diff --git a/gas/testsuite/gas/loongarch/lvz-lbt.s b/gas/testsuite/gas/loongarch/lvz-lbt.s
new file mode 100644
index 00000000000..16ffd24df33
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/lvz-lbt.s
@@ -0,0 +1,186 @@
+gcsrrd $r0, 1
+gcsrwr $r0, 1
+gcsrxchg $r0, $r1, 1
+gtlbsrch
+gtlbrd
+gtlbwr
+gtlbfill
+gtlbclr
+gtlbflush
+hvcl 1
+gr2scr $scr0, $r1
+scr2gr $r0, $scr1
+jiscr0 100
+jiscr1 100
+addu12i.w $r0, $r1, 1
+addu12i.d $r0, $r1, 1
+adc.b $r0, $r1, $r2
+adc.h $r0, $r1, $r2
+adc.w $r0, $r1, $r2
+adc.d $r0, $r1, $r2
+sbc.b $r0, $r1, $r2
+sbc.h $r0, $r1, $r2
+sbc.w $r0, $r1, $r2
+sbc.d $r0, $r1, $r2
+rotr.b $r0, $r1, $r2
+rotr.h $r0, $r1, $r2
+rotri.b $r0, $r1, 1
+rotri.h $r0, $r1, 1
+rcr.b $r0, $r1, $r2
+rcr.h $r0, $r1, $r2
+rcr.w $r0, $r1, $r2
+rcr.d $r0, $r1, $r2
+rcri.b $r0, $r1, 1
+rcri.h $r0, $r1, 1
+rcri.w $r0, $r1, 1
+rcri.d $r0, $r1, 1
+fcvt.ud.d $f0, $f1
+fcvt.ld.d $f0, $f1
+fcvt.d.ld $f0, $f1, $f2
+ldl.d $r0, $r1, 1
+ldl.w $r0, $r1, 1
+ldr.w $r0, $r1, 1
+ldr.d $r0, $r1, 1
+stl.w $r0, $r1, 1
+stl.d $r0, $r1, 1
+str.w $r0, $r1, 1
+str.d $r0, $r1, 1
+x86adc.b $r0, $r1
+x86adc.h $r0, $r1
+x86adc.w $r0, $r1
+x86adc.d $r0, $r1
+x86add.b $r0, $r1
+x86add.h $r0, $r1
+x86add.w $r0, $r1
+x86add.d $r0, $r1
+x86add.wu $r0, $r1
+x86add.du $r0, $r1
+x86inc.b $r0
+x86inc.h $r0
+x86inc.w $r0
+x86inc.d $r0
+x86sbc.b $r0, $r1
+x86sbc.h $r0, $r1
+x86sbc.w $r0, $r1
+x86sbc.d $r0, $r1
+x86sub.b $r0, $r1
+x86sub.h $r0, $r1
+x86sub.w $r0, $r1
+x86sub.d $r0, $r1
+x86sub.wu $r0, $r1
+x86sub.du $r0, $r1
+x86dec.b $r0
+x86dec.h $r0
+x86dec.w $r0
+x86dec.d $r0
+x86and.b $r0, $r1
+x86and.h $r0, $r1
+x86and.w $r0, $r1
+x86and.d $r0, $r1
+x86or.b $r0, $r1
+x86or.h $r0, $r1
+x86or.w $r0, $r1
+x86or.d $r0, $r1
+x86xor.b $r0, $r1
+x86xor.h $r0, $r1
+x86xor.w $r0, $r1
+x86xor.d $r0, $r1
+x86mul.b $r0, $r1
+x86mul.h $r0, $r1
+x86mul.w $r0, $r1
+x86mul.d $r0, $r1
+x86mul.bu $r0, $r1
+x86mul.hu $r0, $r1
+x86mul.wu $r0, $r1
+x86mul.du $r0, $r1
+x86rcl.b $r0, $r1
+x86rcl.h $r0, $r1
+x86rcl.w $r0, $r1
+x86rcl.d $r0, $r1
+x86rcli.b $r0, 1
+x86rcli.h $r0, 1
+x86rcli.w $r0, 1
+x86rcli.d $r0, 1
+x86rcr.b $r0, $r1
+x86rcr.h $r0, $r1
+x86rcr.w $r0, $r1
+x86rcr.d $r0, $r1
+x86rcri.b $r0, 1
+x86rcri.h $r0, 1
+x86rcri.w $r0, 1
+x86rcri.d $r0, 1
+x86rotl.b $r0, $r1
+x86rotl.h $r0, $r1
+x86rotl.w $r0, $r1
+x86rotl.d $r0, $r1
+x86rotli.b $r0, 1
+x86rotli.h $r0, 1
+x86rotli.w $r0, 1
+x86rotli.d $r0, 1
+x86rotr.b $r0, $r1
+x86rotr.h $r0, $r1
+x86rotr.d $r0, $r1
+x86rotr.w $r0, $r1
+x86rotri.b $r0, 1
+x86rotri.h $r0, 1
+x86rotri.w $r0, 1
+x86rotri.d $r0, 1
+x86sll.b $r0, $r1
+x86sll.h $r0, $r1
+x86sll.w $r0, $r1
+x86sll.d $r0, $r1
+x86slli.b $r0, 1
+x86slli.h $r0, 1
+x86slli.w $r0, 1
+x86slli.d $r0, 1
+x86srl.b $r0, $r1
+x86srl.h $r0, $r1
+x86srl.w $r0, $r1
+x86srl.d $r0, $r1
+x86srli.b $r0, 1
+x86srli.h $r0, 1
+x86srli.w $r0, 1
+x86srli.d $r0, 1
+x86sra.b $r0, $r1
+x86sra.h $r0, $r1
+x86sra.w $r0, $r1
+x86sra.d $r0, $r1
+x86srai.b $r0, 1
+x86srai.h $r0, 1
+x86srai.w $r0, 1
+x86srai.d $r0, 1
+setx86j $r0, 1
+setx86loope $r0, $r1
+setx86loopne $r0, $r1
+x86mfflag $r0, 1
+x86mtflag $r0, 1
+x86mftop $r0
+x86mttop 1
+x86inctop
+x86dectop
+x86settm
+x86clrtm
+x86settag $r0, 1, 1
+armadd.w $r0, $r1, 1
+armsub.w $r0, $r1, 1
+armadc.w $r0, $r1, 1
+armsbc.w $r0, $r1, 1
+armand.w $r0, $r1, 1
+armor.w $r0, $r1, 1
+armxor.w $r0, $r1, 1
+armnot.w $r0, 1
+armsll.w $r0, $r1, 1
+armsrl.w $r0, $r1, 1
+armsra.w $r0, $r1, 1
+armrotr.w $r0, $r1, 1
+armslli.w $r0, 1, 1
+armsrli.w $r0, 1, 1
+armsrai.w $r0, 1, 1
+armrotri.w $r0, 1, 1
+armrrx.w $r0, 1
+armmove $r0, $r1, 1
+armmov.w $r0, 1
+armmov.d $r0, 1
+armmfflag $r0, 1
+armmtflag $r0, 1
+setarmj $r0, 1
diff --git a/gas/testsuite/gas/loongarch/uleb128.d b/gas/testsuite/gas/loongarch/uleb128.d
index 41ed8ff870f..aa88359e515 100644
--- a/gas/testsuite/gas/loongarch/uleb128.d
+++ b/gas/testsuite/gas/loongarch/uleb128.d
@@ -8,29 +8,29 @@
Disassembly of section .data:
00000000.* <L1-0x5>:
-[ ]+0:[ ]+80030201[ ]+0x80030201
-[ ]+3:[ ]+R_LARCH_ADD_ULEB128[ ]+L2
-[ ]+3:[ ]+R_LARCH_SUB_ULEB128[ ]+L1
-[ ]+\.\.\.
-
-0000000000000005[ ]+<L1>:
-[ ]+\.\.\.
-[ ]+81:[ ]+ff040000[ ]+0xff040000
-[ ]+85:[ ]+cacop[ ]+0x1f,[ ]+\$t3,[ ]+1\(0x1\)
-
-0000000000000086[ ]+<L2>:
-[ ]+86:[ ]+07060005[ ]+0x07060005
-[ ]+8a:[ ]+0x00008080
-[ ]+8a:[ ]+R_LARCH_ADD_ULEB128[ ]+L4
-[ ]+8a:[ ]+R_LARCH_SUB_ULEB128[ ]+L3
-
-000000000000008d[ ]+<L3>:
-[ ]+\.\.\.
-[ ]+4089:[ ]+ff080000[ ]+0xff080000
-[ ]+408d:[ ]+0x09ffffff
-
-0000000000004090[ ]+<L4>:
-[ ]+4090:[ ]+09090909[ ]+0x09090909
-[ ]+4094:[ ]+09090909[ ]+0x09090909
-[ ]+4098:[ ]+09090909[ ]+0x09090909
-[ ]+409c:[ ]+09090909[ ]+0x09090909
+[ ]*0:[ ]*80030201[ ]*0x80030201
+[ ]*3:[ ]*R_LARCH_ADD_ULEB128[ ]*L2
+[ ]*3:[ ]*R_LARCH_SUB_ULEB128[ ]*L1
+[ ]*\.\.\.
+
+[ ]*0000000000000005[ ]*<L1>:
+[ ]*\.\.\.
+[ ]*81:[ ]*ff040000[ ]*0xff040000
+[ ]*85:[ ]*cacop[ ]*0x1f,[ ]*\$t3,[ ]*1\(0x1\)
+
+[ ]*0000000000000086[ ]*<L2>:
+[ ]*86:[ ]*07060005[ ]*0x07060005
+[ ]*8a:[ ]*x86inc\.b[ ]*\$a0
+[ ]*8a:[ ]*R_LARCH_ADD_ULEB128[ ]*L4
+[ ]*8a:[ ]*R_LARCH_SUB_ULEB128[ ]*L3
+
+[ ]*000000000000008d[ ]*<L3>:
+[ ]*\.\.\.
+[ ]*4089:[ ]*ff080000[ ]*0xff080000
+[ ]*408d:[ ]*0x09ffffff
+
+[ ]*0000000000004090[ ]*<L4>:
+[ ]*4090:[ ]*09090909[ ]*0x09090909
+[ ]*4094:[ ]*09090909[ ]*0x09090909
+[ ]*4098:[ ]*09090909[ ]*0x09090909
+[ ]*409c:[ ]*09090909[ ]*0x09090909
diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
index bd104465ca7..202614390db 100644
--- a/opcodes/loongarch-opc.c
+++ b/opcodes/loongarch-opc.c
@@ -1646,6 +1646,7 @@ static struct loongarch_opcode loongarch_lsx_opcodes[] =
{ 0x73e40000, 0xfffc0000, "vpermi.w", "v0:5,v5:5,u10:8", 0, 0, 0, 0},
{ 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */
};
+
static struct loongarch_opcode loongarch_lasx_opcodes[] =
{
/* match, mask, name, format, macro, include, exclude, pinfo. */
@@ -2321,6 +2322,204 @@ static struct loongarch_opcode loongarch_lasx_opcodes[] =
{ 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */
};
+static struct loongarch_opcode loongarch_lvz_opcodes[] =
+{
+ /* match, mask, name, format, macro, include, exclude, pinfo. */
+ {0x05000000, 0xff0003e0, "gcsrrd", "r0:5,u10:14", 0, 0, 0, 0},
+ {0x05000020, 0xff0003e0, "gcsrwr", "r0:5,u10:14", 0, 0, 0, 0},
+ {0x05000000, 0xff000000, "gcsrxchg", "r0:5,r5:5,u10:14", 0, 0, 0, 0},
+ {0x06482801, 0xffffffff, "gtlbsrch", "", 0, 0, 0, 0},
+ {0x06482c01, 0xffffffff, "gtlbrd", "", 0, 0, 0, 0},
+ {0x06483001, 0xffffffff, "gtlbwr", "", 0, 0, 0, 0},
+ {0x06483401, 0xffffffff, "gtlbfill", "", 0, 0, 0, 0},
+ {0x06482001, 0xffffffff, "gtlbclr", "", 0, 0, 0, 0},
+ {0x06482401, 0xffffffff, "gtlbflush", "", 0, 0, 0, 0},
+ {0x002b8000, 0xffff8000, "hvcl", "u0:15", 0, 0, 0, 0},
+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */
+};
+
+static struct loongarch_opcode loongarch_lbt_opcodes[] =
+{
+ /* match, mask, name, format, macro, include, exclude, pinfo. */
+ {0x00000800, 0xfffffc1c, "gr2scr", "cr0:2,r5:5", 0, 0, 0, 0},
+ {0x00000c00, 0xffffff80, "scr2gr", "r0:5,cr5:2", 0, 0, 0, 0},
+ {0x48000200, 0xfc0003e0, "jiscr0", "s0:5|10:16<<2", 0, 0, 0, 0},
+ {0x48000300, 0xfc0003e0, "jiscr1", "s0:5|10:16<<2", 0, 0, 0, 0},
+ {0x00290000, 0xffff8000, "addu12i.w", "r0:5,r5:5,s10:5", 0, 0, 0, 0},
+ {0x00298000, 0xffff8000, "addu12i.d", "r0:5,r5:5,s10:5", 0, 0, 0, 0},
+ {0x00300000, 0xffff8000, "adc.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00308000, 0xffff8000, "adc.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00310000, 0xffff8000, "adc.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00318000, 0xffff8000, "adc.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00320000, 0xffff8000, "sbc.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00328000, 0xffff8000, "sbc.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00330000, 0xffff8000, "sbc.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00338000, 0xffff8000, "sbc.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x001a0000, 0xffff8000, "rotr.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x001a8000, 0xffff8000, "rotr.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x004c2000, 0xffffe000, "rotri.b", "r0:5,r5:5,u10:3", 0, 0, 0, 0},
+ {0x004c4000, 0xffffc000, "rotri.h", "r0:5,r5:5,u10:4", 0, 0, 0, 0},
+ {0x00340000, 0xffff8000, "rcr.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00348000, 0xffff8000, "rcr.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00350000, 0xffff8000, "rcr.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00358000, 0xffff8000, "rcr.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+ {0x00502000, 0xffffe000, "rcri.b", "r0:5,r5:5,u10:3", 0, 0, 0, 0},
+ {0x00504000, 0xffffc000, "rcri.h", "r0:5,r5:5,u10:4", 0, 0, 0, 0},
+ {0x00508000, 0xffff8000, "rcri.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0},
+ {0x00510000, 0xffff0000, "rcri.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0},
+ {0x0114e400, 0xfffffc00, "fcvt.ud.d", "f0:5,f5:5", 0, 0, 0, 0},
+ {0x0114e000, 0xfffffc00, "fcvt.ld.d", "f0:5,f5:5", 0, 0, 0, 0},
+ {0x01150000, 0xffff8000, "fcvt.d.ld", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+ {0x2e800000, 0xffc00000, "ldl.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+ {0x2e000000, 0xffc00000, "ldl.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+ {0x2e400000, 0xffc00000, "ldr.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+ {0x2ec00000, 0xffc00000, "ldr.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+ {0x2f000000, 0xffc00000, "stl.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+ {0x2f800000, 0xffc00000, "stl.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+ {0x2f400000, 0xffc00000, "str.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+ {0x2fc00000, 0xffc00000, "str.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+ {0x003f000c, 0xffff801f, "x86adc.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f000d, 0xffff801f, "x86adc.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f000e, 0xffff801f, "x86adc.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f000f, 0xffff801f, "x86adc.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0004, 0xffff801f, "x86add.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0005, 0xffff801f, "x86add.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0006, 0xffff801f, "x86add.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0007, 0xffff801f, "x86add.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0000, 0xffff801f, "x86add.wu", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0001, 0xffff801f, "x86add.du", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x00008000, 0xfffffc1f, "x86inc.b", "r5:5", 0, 0, 0, 0},
+ {0x00008001, 0xfffffc1f, "x86inc.h", "r5:5", 0, 0, 0, 0},
+ {0x00008002, 0xfffffc1f, "x86inc.w", "r5:5", 0, 0, 0, 0},
+ {0x00008003, 0xfffffc1f, "x86inc.d", "r5:5", 0, 0, 0, 0},
+ {0x003f0010, 0xffff801f, "x86sbc.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0011, 0xffff801f, "x86sbc.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0012, 0xffff801f, "x86sbc.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0013, 0xffff801f, "x86sbc.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0008, 0xffff801f, "x86sub.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0009, 0xffff801f, "x86sub.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f000a, 0xffff801f, "x86sub.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f000b, 0xffff801f, "x86sub.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0002, 0xffff801f, "x86sub.wu", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0003, 0xffff801f, "x86sub.du", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x00008004, 0xfffffc1f, "x86dec.b", "r5:5", 0, 0, 0, 0},
+ {0x00008005, 0xfffffc1f, "x86dec.h", "r5:5", 0, 0, 0, 0},
+ {0x00008006, 0xfffffc1f, "x86dec.w", "r5:5", 0, 0, 0, 0},
+ {0x00008007, 0xfffffc1f, "x86dec.d", "r5:5", 0, 0, 0, 0},
+ {0x003f8010, 0xffff801f, "x86and.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8011, 0xffff801f, "x86and.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8012, 0xffff801f, "x86and.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8013, 0xffff801f, "x86and.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8014, 0xffff801f, "x86or.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8015, 0xffff801f, "x86or.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8016, 0xffff801f, "x86or.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8017, 0xffff801f, "x86or.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8018, 0xffff801f, "x86xor.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8019, 0xffff801f, "x86xor.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f801a, 0xffff801f, "x86xor.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f801b, 0xffff801f, "x86xor.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003e8000, 0xffff801f, "x86mul.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003e8001, 0xffff801f, "x86mul.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003e8002, 0xffff801f, "x86mul.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003e8003, 0xffff801f, "x86mul.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003e8004, 0xffff801f, "x86mul.bu", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003e8005, 0xffff801f, "x86mul.hu", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003e8006, 0xffff801f, "x86mul.wu", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003e8007, 0xffff801f, "x86mul.du", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f800c, 0xffff801f, "x86rcl.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f800d, 0xffff801f, "x86rcl.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f800e, 0xffff801f, "x86rcl.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f800f, 0xffff801f, "x86rcl.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x00542018, 0xffffe01f, "x86rcli.b", "r5:5,u10:3", 0, 0, 0, 0},
+ {0x00544019, 0xffffc01f, "x86rcli.h", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x0054801a, 0xffff801f, "x86rcli.w", "r5:5,u10:5", 0, 0, 0, 0},
+ {0x0055001b, 0xffff001f, "x86rcli.d", "r5:5,u10:6", 0, 0, 0, 0},
+ {0x003f8008, 0xffff801f, "x86rcr.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8009, 0xffff801f, "x86rcr.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f800a, 0xffff801f, "x86rcr.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f800b, 0xffff801f, "x86rcr.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x00542010, 0xffffe01f, "x86rcri.b", "r5:5,u10:3", 0, 0, 0, 0},
+ {0x00544011, 0xffffc01f, "x86rcri.h", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x00548012, 0xffff801f, "x86rcri.w", "r5:5,u10:5", 0, 0, 0, 0},
+ {0x00550013, 0xffff001f, "x86rcri.d", "r5:5,u10:6", 0, 0, 0, 0},
+ {0x003f8004, 0xffff801f, "x86rotl.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8005, 0xffff801f, "x86rotl.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8006, 0xffff801f, "x86rotl.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8007, 0xffff801f, "x86rotl.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x00542014, 0xffffe01f, "x86rotli.b", "r5:5,u10:3", 0, 0, 0, 0},
+ {0x00544015, 0xffffc01f, "x86rotli.h", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x00548016, 0xffff801f, "x86rotli.w", "r5:5,u10:5", 0, 0, 0, 0},
+ {0x00550017, 0xffff001f, "x86rotli.d", "r5:5,u10:6", 0, 0, 0, 0},
+ {0x003f8000, 0xffff801f, "x86rotr.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8001, 0xffff801f, "x86rotr.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8002, 0xffff801f, "x86rotr.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f8003, 0xffff801f, "x86rotr.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x0054200c, 0xffffe01f, "x86rotri.b", "r5:5,u10:3", 0, 0, 0, 0},
+ {0x0054400d, 0xffffc01f, "x86rotri.h", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x0054800e, 0xffff801f, "x86rotri.w", "r5:5,u10:5", 0, 0, 0, 0},
+ {0x0055000f, 0xffff001f, "x86rotri.d", "r5:5,u10:6", 0, 0, 0, 0},
+ {0x003f0014, 0xffff801f, "x86sll.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0015, 0xffff801f, "x86sll.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0016, 0xffff801f, "x86sll.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0017, 0xffff801f, "x86sll.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x00542000, 0xffffe01f, "x86slli.b", "r5:5,u10:3", 0, 0, 0, 0},
+ {0x00544001, 0xffffc01f, "x86slli.h", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x00548002, 0xffff801f, "x86slli.w", "r5:5,u10:5", 0, 0, 0, 0},
+ {0x00550003, 0xffff001f, "x86slli.d", "r5:5,u10:6", 0, 0, 0, 0},
+ {0x003f0018, 0xffff801f, "x86srl.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f0019, 0xffff801f, "x86srl.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f001a, 0xffff801f, "x86srl.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f001b, 0xffff801f, "x86srl.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x00542004, 0xffffe01f, "x86srli.b", "r5:5,u10:3", 0, 0, 0, 0},
+ {0x00544005, 0xffffc01f, "x86srli.h", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x00548006, 0xffff801f, "x86srli.w", "r5:5,u10:5", 0, 0, 0, 0},
+ {0x00550007, 0xffff001f, "x86srli.d", "r5:5,u10:6", 0, 0, 0, 0},
+ {0x003f001c, 0xffff801f, "x86sra.b", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f001d, 0xffff801f, "x86sra.h", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f001e, 0xffff801f, "x86sra.w", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x003f001f, 0xffff801f, "x86sra.d", "r5:5,r10:5", 0, 0, 0, 0},
+ {0x00542008, 0xffffe01f, "x86srai.b", "r5:5,u10:3", 0, 0, 0, 0},
+ {0x00544009, 0xffffc01f, "x86srai.h", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x0054800a, 0xffff801f, "x86srai.w", "r5:5,u10:5", 0, 0, 0, 0},
+ {0x0055000b, 0xffff001f, "x86srai.d", "r5:5,u10:6", 0, 0, 0, 0},
+ {0x00368000, 0xffffc3e0, "setx86j", "r0:5,u10:4", 0, 0, 0, 0},
+ {0x00007800, 0xfffffc00, "setx86loope", "r0:5,r5:5", 0, 0, 0, 0},
+ {0x00007c00, 0xfffffc00, "setx86loopne", "r0:5,r5:5", 0, 0, 0, 0},
+ {0x005c0000, 0xfffc03e0, "x86mfflag", "r0:5,u10:8", 0, 0, 0, 0},
+ {0x005c0020, 0xfffc03e0, "x86mtflag", "r0:5,u10:8", 0, 0, 0, 0},
+ {0x00007400, 0xffffffe0, "x86mftop", "r0:5", 0, 0, 0, 0},
+ {0x00007000, 0xffffff1f, "x86mttop", "u5:3", 0, 0, 0, 0},
+ {0x00008009, 0xffffffff, "x86inctop", "", 0, 0, 0, 0},
+ {0x00008029, 0xffffffff, "x86dectop", "", 0, 0, 0, 0},
+ {0x00008008, 0xffffffff, "x86settm", "", 0, 0, 0, 0},
+ {0x00008028, 0xffffffff, "x86clrtm", "", 0, 0, 0, 0},
+ {0x00580000, 0xfffc0000, "x86settag", "r0:5,u5:5,u10:8", 0, 0, 0, 0},
+ {0x00370010, 0xffff8010, "armadd.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x00378010, 0xffff8010, "armsub.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x00380010, 0xffff8010, "armadc.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x00388010, 0xffff8010, "armsbc.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x00390010, 0xffff8010, "armand.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x00398010, 0xffff8010, "armor.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x003a0010, 0xffff8010, "armxor.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x003fc01c, 0xffffc01f, "armnot.w", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x003a8010, 0xffff8010, "armsll.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x003b0010, 0xffff8010, "armsrl.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x003b8010, 0xffff8010, "armsra.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x003c0010, 0xffff8010, "armrotr.w", "r5:5,r10:5,u0:4", 0, 0, 0, 0},
+ {0x003c8010, 0xffff8010, "armslli.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0},
+ {0x003d0010, 0xffff8010, "armsrli.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0},
+ {0x003d8010, 0xffff8010, "armsrai.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0},
+ {0x003e0010, 0xffff8010, "armrotri.w", "r5:5,u10:5,u0:4", 0, 0, 0, 0},
+ {0x003fc01f, 0xffffc01f, "armrrx.w", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x00364000, 0xffffc000, "armmove", "r0:5,r5:5,u10:4", 0, 0, 0, 0},
+ {0x003fc01d, 0xffffc01f, "armmov.w", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x003fc01e, 0xffffc01f, "armmov.d", "r5:5,u10:4", 0, 0, 0, 0},
+ {0x005c0040, 0xfffc03e0, "armmfflag", "r0:5,u10:8", 0, 0, 0, 0},
+ {0x005c0060, 0xfffc03e0, "armmtflag", "r0:5,u10:8", 0, 0, 0, 0},
+ {0x0036c000, 0xffffc3e0, "setarmj", "r0:5,u10:4", 0, 0, 0, 0},
+ { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */
+};
+
struct loongarch_ase loongarch_ASEs[] =
{
{ &LARCH_opts.ase_ilp32, loongarch_macro_opcodes, 0, 0, { 0 }, 0, 0 },
@@ -2336,7 +2535,9 @@ struct loongarch_ase loongarch_ASEs[] =
{ &LARCH_opts.ase_df, loongarch_4opt_double_float_opcodes, 0, 0, { 0 }, 0, 0 },
{ &LARCH_opts.ase_sf, loongarch_single_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 },
{ &LARCH_opts.ase_df, loongarch_double_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 },
- { &LARCH_opts.ase_lsx, loongarch_lsx_opcodes, 0, 0, { 0}, 0, 0 },
- { &LARCH_opts.ase_lasx, loongarch_lasx_opcodes, 0, 0, { 0}, 0, 0 },
+ { &LARCH_opts.ase_lsx, loongarch_lsx_opcodes, 0, 0, { 0 }, 0, 0 },
+ { &LARCH_opts.ase_lasx, loongarch_lasx_opcodes, 0, 0, { 0 }, 0, 0 },
+ { &LARCH_opts.ase_lasx, loongarch_lvz_opcodes, 0, 0, { 0 }, 0, 0 },
+ { &LARCH_opts.ase_lasx, loongarch_lbt_opcodes, 0, 0, { 0 }, 0, 0 },
{ 0, 0, 0, 0, { 0 }, 0, 0 },
};
--
2.36.0
next reply other threads:[~2023-06-29 9:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-29 9:08 mengqinggang [this message]
2023-06-29 11:33 ` WANG Xuerui
2023-06-29 12:29 ` Chenghua Xu
2023-06-29 12:42 ` WANG Xuerui
2023-06-29 12:38 ` WANG Xuerui
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