From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by sourceware.org (Postfix) with ESMTPS id 94A943858C54 for ; Fri, 21 Jul 2023 05:32:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 94A943858C54 Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-pg1-x52c.google.com with SMTP id 41be03b00d2f7-55adfa72d3fso835390a12.3 for ; Thu, 20 Jul 2023 22:32:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1689917545; x=1690522345; h=content-transfer-encoding:mime-version:message-id:date:subject:to :from:from:to:cc:subject:date:message-id:reply-to; bh=nXmXTOtTtFN/5BjWqzdiz5vhfVL5WoHRkdYogqSEa58=; b=UYcLzt7Sn7cNcGFMZvwOZkulzqkwrf2JDWZEFcFdW4SLhFbd+/ZxKqncA8FnunVsQG Da6owOXMWuYChVMK6ypb6p6rUyMCVd9i52vr/kt+is/Y6vzm9Uwhpd2MnuN5upb1GuKN vVnkjn2XV8MmmE0CFcKRdPPdcv8RM3YgO9gfLYEbzSkZteEsyHN2RtXFJ8DbNXeTw5wz mnQLDO4NEG3PZWh5TAfoKzNr41m93rR3Fx/ed3WXoWvtl/ZiBeZkRKf0A08MQt0kTVqV 4+/VyZyiiLgnWFEnI5st2eSJvUAbT8BUzjvABpTsgEZ+0Bg2mkK4PDobvPh88Em/FYom KwMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689917545; x=1690522345; h=content-transfer-encoding:mime-version:message-id:date:subject:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=nXmXTOtTtFN/5BjWqzdiz5vhfVL5WoHRkdYogqSEa58=; b=km4lkUTlEwxJ4uPW9aGPs8FRl1eqS6ylZHH3ANFZzvEzatGiKh6kUAZAG27hmtR4Dr QuWb2N0P+p2ebuV2L1udbKYU/Nf5e2T5CyocSdZDvNpXiGbRLLE+nhBTjGcqANAQS3N/ M/aq+Ia/XM78cDqmXM/mzMvKIIJmRq6hPBjOgNdIJIRNSoXtp0I4CWs2BBejkBAYBbNt Eov4ZQiW7oK0hueAD8o+3GxyIVn+sVR/tAJmbm6I0+PAPBioL2Ij3uly20BiE1JAgpg1 991eaPxc3WcHZ3dALPrQerO/UbEuJN3j6UoYlFMz8aIJxl9MkPaevR6uffJmhwSt6630 uALg== X-Gm-Message-State: ABy/qLbSwTxDZHIe7lSBLH27RaQJ2xEyGZcnBlIRznw3AUq3o/4oJtJC yXyD0sUbQMFrbklAUJ9lobeOGw== X-Google-Smtp-Source: APBJJlGYUTP0OfcCEtWDqAXRtkTNwy8wztJ2ttsCnqeAK/mtUlpCMJt1lcsr8XpoaaMGQiDxjydmeQ== X-Received: by 2002:a05:6a20:42a7:b0:12c:f581:c3a3 with SMTP id o39-20020a056a2042a700b0012cf581c3a3mr1024537pzj.6.1689917545484; Thu, 20 Jul 2023 22:32:25 -0700 (PDT) Received: from hsinchu15.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id i8-20020aa78d88000000b006765cb32558sm2083524pfr.139.2023.07.20.22.32.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jul 2023 22:32:25 -0700 (PDT) From: Hau Hsu To: hau.hsu@sifive.com, binutils@sourceware.org, kito.cheng@gmail.com Subject: [PATCH] RISC-V: Fix wrongly inserted IRELATIVE relocs Date: Fri, 21 Jul 2023 13:32:18 +0800 Message-Id: <20230721053218.16817-1-hau.hsu@sifive.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: For ifun symbols that are referenced by global pointer (and will be put in .data.rel section), the linker overwrites their entris in .rela.iplt. The issue is similar to commit 51a8a7c2e3cc0730831963651a55d23d1fae624d. This patch uses the variable `last_iplt_index` added in the previous commit to insert ifunc reloactions .rela.iplt. --- bfd/elfnn-riscv.c | 12 ++++-- .../ifunc-plt-got-overwrite-02-exe.rd | 4 ++ .../ld-riscv-elf/ifunc-plt-got-overwrite-02.d | 12 ++++++ .../ld-riscv-elf/ifunc-plt-got-overwrite-02.s | 37 +++++++++++++++++++ ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 2 + 5 files changed, 64 insertions(+), 3 deletions(-) create mode 100644 ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02-exe.rd create mode 100644 ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02.d create mode 100644 ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02.s diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c index 09aa7be225e..c61a7a1eb4d 100644 --- a/bfd/elfnn-riscv.c +++ b/bfd/elfnn-riscv.c @@ -3118,16 +3118,22 @@ riscv_elf_finish_dynamic_symbol (bfd *output_bfd, /* Calculate the address of the PLT header. */ header_address = sec_addr (plt); - /* Calculate the index of the entry and the offset of .got.plt entry. - For static executables, we don't reserve anything. */ + /* Calculate the index of the entry and the offset of .got.plt entry.*/ if (plt == htab->elf.splt) { + /* Reserve PLT header. */ plt_idx = (h->plt.offset - PLT_HEADER_SIZE) / PLT_ENTRY_SIZE; got_offset = GOTPLT_HEADER_SIZE + (plt_idx * GOT_ENTRY_SIZE); } else { - plt_idx = h->plt.offset / PLT_ENTRY_SIZE; + /* For static executables, we don't reserve anything. + And we add relocs in backward order to fix wrong relocation indexing. + See: + https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=51a8a7c2e3cc0730831963651a55d23d1fae624d + */ + + plt_idx = htab->last_iplt_index--; got_offset = plt_idx * GOT_ENTRY_SIZE; } diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02-exe.rd b/ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02-exe.rd new file mode 100644 index 00000000000..0de47a4009f --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02-exe.rd @@ -0,0 +1,4 @@ +Relocation section '.rela.plt' at .* +[ ]+Offset[ ]+Info[ ]+Type[ ]+.* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* +[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_IRELATIVE[ ]+[0-9a-f]* diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02.d b/ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02.d new file mode 100644 index 00000000000..f6cac186dca --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02.d @@ -0,0 +1,12 @@ +#... +Disassembly of section .text: +#... +0+[0-9a-f]+ : +#... +0+[0-9a-f]+ : +#... +0+[0-9a-f]+
: +.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.* +.*:[ ]+[0-9a-f]+[ ]+jalr[ ]+.*<(.*plt.*)> +.*:[ ]+[0-9a-f]+[ ]+ret +#... diff --git a/ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02.s b/ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02.s new file mode 100644 index 00000000000..b2cb21dceaa --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-02.s @@ -0,0 +1,37 @@ + .text + + .type resolver1, @function +resolver1: + ret + .size resolver1, .-resolver1 + + .type resolver2, @function +resolver2: + ret + .size resolver2, .-resolver2 + + .globl ifunc1 + .type ifunc1, %gnu_indirect_function + .set ifunc1, resolver1 + + .globl ifunc2 + .type ifunc2, %gnu_indirect_function + .set ifunc2, resolver2 + + + .globl ifunc2_ptr + .section .data.rel,"aw" + .align 3 + .type ifunc2_ptr, @object + .size ifunc2_ptr, 8 +ifunc2_ptr: + .dword ifunc2 + .text + .align 1 + + .globl main + .type main, @function +main: + call ifunc1@plt + ret + .size main, .-main diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp index 947a266ba72..ecfb56cca4a 100644 --- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp +++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp @@ -281,6 +281,8 @@ if [istarget "riscv*-*-*"] { run_dump_test_ifunc "ifunc-plt-got-overwrite" rv64 exe run_dump_test_ifunc "ifunc-plt-got-overwrite" rv64 pie run_dump_test_ifunc "ifunc-plt-got-overwrite" rv64 pic + run_dump_test_ifunc "ifunc-plt-got-overwrite-02" rv32 exe + run_dump_test_ifunc "ifunc-plt-got-overwrite-02" rv64 exe # TODO: Make the following tests work under RV32. if [istarget "riscv32-*-*"] { -- 2.40.1