From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 313393858D20 for ; Fri, 1 Sep 2023 03:09:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 313393858D20 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.5]) by gateway (Coremail) with SMTP id _____8Cx5_HQVfFkAawdAA--.60598S3; Fri, 01 Sep 2023 11:09:05 +0800 (CST) Received: from 5.5.5 (unknown [10.2.5.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxX8_PVfFkIY5oAA--.55924S4; Fri, 01 Sep 2023 11:09:03 +0800 (CST) From: cailulu To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, cailulu Subject: [PATCH 1/2] Use 32/64_PCREL to replace a pair of ADD32/64 and SUB32/64. Date: Fri, 1 Sep 2023 11:09:00 +0800 Message-Id: <20230901030901.2519730-1-cailulu@loongson.cn> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:AQAAf8AxX8_PVfFkIY5oAA--.55924S4 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQABB2TwEzQOxAALs1 X-Coremail-Antispam: 1Uk129KBj93XoWxGw4kZrW5uw45Kr13Zw18WFX_yoW5Ary3pr ZxAF4ftFW8JFWS9FZxtF95G3W3A3yxJ3y2vrWaq3W8uF4xG34Yvws2vryxWFyq9w4ruw42 vr95K3WUWa98AFgCm3ZEXasCq-sJn29KB7ZKAUJUUUUf529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUBFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVWxJr0_GcWln4kS14v26r126r1DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12 xvs2x26I8E6xACxx1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r12 6r1DMcIj6I8E87Iv67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64 vIr41lc7CjxVAaw2AFwI0_JF0_Jw1l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_ Jr0_Gr1l4IxYO2xFxVAFwI0_JF0_Jw1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8Gjc xK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0 cI8IcVAFwI0_JFI_Gr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK8V AvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E 14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07je4EiUUUUU= X-Spam-Status: No, score=-13.5 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Subtraction for labels that require static relocation usually generates ADD32/64 and SUB32/64. If subsy of BFD_RELOC_32/64 and PC in same segment, and disable relax or PC at start of subsy or enable relax but not in SEC_CODE, we generate 32/64_PCREL to replace a pair of ADD32/64 and SUB32/64. --- gas/config/tc-loongarch.c | 22 ++++++++++++---------- gas/config/tc-loongarch.h | 12 ++++++++++-- 2 files changed, 22 insertions(+), 12 deletions(-) diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index 2e8a259d147..57faffeb14d 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -1195,7 +1195,6 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) static int64_t stack_top; static int last_reloc_is_sop_push_pcrel_1 = 0; int last_reloc_is_sop_push_pcrel = last_reloc_is_sop_push_pcrel_1; - segT sub_segment; last_reloc_is_sop_push_pcrel_1 = 0; char *buf = fixP->fx_frag->fr_literal + fixP->fx_where; @@ -1273,16 +1272,19 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) (use md_number_to_chars (buf, 0, fixP->fx_size)). */ case BFD_RELOC_64: case BFD_RELOC_32: - if (fixP->fx_r_type == BFD_RELOC_32 - && fixP->fx_addsy && fixP->fx_subsy - && (sub_segment = S_GET_SEGMENT (fixP->fx_subsy)) - && strcmp (sub_segment->name, ".eh_frame") == 0 - && S_GET_VALUE (fixP->fx_subsy) - == fixP->fx_frag->fr_address + fixP->fx_where) + if (fixP->fx_pcrel) { - fixP->fx_r_type = BFD_RELOC_LARCH_32_PCREL; - fixP->fx_subsy = NULL; - break; + switch (fixP->fx_r_type) + { + case BFD_RELOC_64: + fixP->fx_r_type = BFD_RELOC_LARCH_64_PCREL; + break; + case BFD_RELOC_32: + fixP->fx_r_type = BFD_RELOC_LARCH_32_PCREL; + break; + default: + break; + } } if (fixP->fx_addsy && fixP->fx_subsy) diff --git a/gas/config/tc-loongarch.h b/gas/config/tc-loongarch.h index a9f2a0a17cc..d353f18d0d2 100644 --- a/gas/config/tc-loongarch.h +++ b/gas/config/tc-loongarch.h @@ -71,8 +71,16 @@ extern bool loongarch_frag_align_code (int); relaxation, so do not resolve such expressions in the assembler. */ #define md_allow_local_subtract(l,r,s) 0 -/* Values passed to md_apply_fix don't include symbol values. */ -#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) 1 +/* If subsy of BFD_RELOC32/64 and PC in same segment, and without relax + or PC at start of subsy or with relax but sub_symbol_segment not in + SEC_CODE, we generate 32/64_PCREL. */ +#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) \ + (!((BFD_RELOC_32 || BFD_RELOC_64) \ + &&(!LARCH_opts.relax \ + || S_GET_VALUE (FIX->fx_subsy) \ + == FIX->fx_frag->fr_address + FIX->fx_where \ + || (LARCH_opts.relax \ + && ((S_GET_SEGMENT (FIX->fx_subsy)->flags & SEC_CODE) == 0))))) #define TC_VALIDATE_FIX_SUB(FIX, SEG) 1 #define DIFF_EXPR_OK 1 -- 2.31.1