From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by sourceware.org (Postfix) with ESMTPS id 13D37385782B for ; Mon, 25 Sep 2023 08:36:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 13D37385782B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ed1-x530.google.com with SMTP id 4fb4d7f45d1cf-522bd411679so6832021a12.0 for ; Mon, 25 Sep 2023 01:36:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1695630967; x=1696235767; darn=sourceware.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Th98UtDzlvmOz22KxWlCHukwwu9iqQa0QzhOJQ/IcBA=; b=f5WMWbr3tDQg4rt2hjMuGibSjK6w+aTCh843kECXFT/3ycUveQjc6Dr7AjVEnMdGx8 fvs1AMZ57sLb3A2U7AbZ7NZWIrz9IKVwDV6xDTud4d+N/oLYrNke4Jln513vSsyC3VXK Z8iUMw/zMcXcUUmVQ6qSagVOLuOv5yMLSjZjoWSdqOBM8rrfhAPjYxtIGp0CdlZROcAx 5jCI+Y8EcgZqzGTKCEepWkNipA3ak+9BT1K3T+d2rd7yIPAFePBdp2NxMyQpw1aOJNlE Mekm3AV+aA+u0vLbdpjhIaBRhxqoZIwwgtN1UZKqC060ZmYojPGvw4CisUWKrLQlCrIR IUzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695630967; x=1696235767; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Th98UtDzlvmOz22KxWlCHukwwu9iqQa0QzhOJQ/IcBA=; b=BDUVjGDcaIlrXcKn1H4/2obXPguhTuc8QUsLnm66vObHzQCtFedOjCl2GUZrpMMYS+ dm/mCCPvk8IdGCLcbgblf3pTggsCfrreBLYc3AltiRZ1CmJ/q9MVVhQ/hJSBcbOuWl6L 8GLWn2plWjmzBcJgIIic+LDtX3PR30jG8tArRzzNLlCVXI9390fkZW5gQySRl9J0jZd2 2Jmlbq1ESk9DCauq99NNaHhgTx+ferhJkVb8Ybz4QwFlXDwxpRV6Lapgf8EnI9d7L4r+ 9+clQAGPaheRgMPVqXo4HHx0TPJVNlFWED7m9O/1/GQtu1r/cZRmFkUfZJNwo4JLOEX1 No9Q== X-Gm-Message-State: AOJu0YzXUsO0CKoQHVW+nqwHaxNP2IXKxVlv/B6FZOPjEpf6mH0AU0eu EoU9fl6hZ0pFxlFLvPAZ+sMqTerS8eM= X-Google-Smtp-Source: AGHT+IFm9my/pwI+AfFavL0e3+DYYDlptSByhCjzz0l/sp+SDsFUgwUUFXifcfJEG580V1OZS0HO/w== X-Received: by 2002:aa7:c481:0:b0:52c:b469:bafd with SMTP id m1-20020aa7c481000000b0052cb469bafdmr4288810edq.41.1695630966996; Mon, 25 Sep 2023 01:36:06 -0700 (PDT) Received: from fatty.nomansland ([193.187.151.25]) by smtp.gmail.com with ESMTPSA id n2-20020aa7c442000000b0052e1959db1csm5206903edr.20.2023.09.25.01.36.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Sep 2023 01:36:06 -0700 (PDT) From: Claudiu Zissulescu To: binutils@sourceware.org Cc: fbedard@synopsys.com, Claudiu Zissulescu Subject: [committed 05/10] arc: Update opcode related include files for ARCv3. Date: Mon, 25 Sep 2023 11:35:42 +0300 Message-Id: <20230925083547.432083-5-claziss@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230925083547.432083-1-claziss@gmail.com> References: <20230925083547.432083-1-claziss@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_LOTSOFHASH,PDS_BTC_ID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Claudiu Zissulescu Add new ARCv3 CPUs and required bits to decode/encode ARCv3 ISA opcodes. Fix 32 bit relocations which were set as signed but should be bitfield: ARC_32_ME, ARC_GLOB_DAT, ARC_JMP_SLOT, ARC_RELATIVE. Remove non-ABI relocation ARC_32_ME_S. include/ xxxx-xx-xx Claudiu Zissulescu Cupertino Miranda Bruno Mauricio * include/elf/arc-cpu.def: Add new HS5x and HS6x CPUs. * include/elf/arc-reloc.def: Add new ARC64 relocations. * include/elf/arc.h (EF_ARC_CPU_ARC64): New define. * include/opcode/arc-attrs.h (FEATURE_LIST_NAME): Update predicate. * include/opcode/arc-func.h: Update formating. (replace_disp8ls): New function. (replace_disp9s): Likewise. (replace_disp6s): Likewise. (replace_disp7s): Likewise. (replace_disp12s): Likewise. * include/opcode/arc.h (ARC_OPCODE_ARC64): New define. (ARC_OPCODE_ARC32): Likewise. (ARC_OPERAND_FP): Likewise. (HARD_FIELDF): Likewise. (ARC_OPCODE_ARCVx): New macro. (arc_flag_class): Update structure to hold new extract/insert functions for flags. (INSN3OP): Update macro. (FP_SIZE, TPOF, DPOF, SOPF, COPF, CONVOPS): New enums. Signed-off-by: Claudiu Zissulescu --- include/elf/arc-cpu.def | 63 +++++++------ include/elf/arc-reloc.def | 171 ++++++++++++++++++++++++++++++--- include/elf/arc.h | 1 + include/opcode/arc-attrs.h | 4 +- include/opcode/arc-func.h | 188 +++++++++++++++++++++++++++---------- include/opcode/arc.h | 121 +++++++++++++++++++++++- 6 files changed, 452 insertions(+), 96 deletions(-) diff --git a/include/elf/arc-cpu.def b/include/elf/arc-cpu.def index 8b039a1b426..49a35ab711a 100644 --- a/include/elf/arc-cpu.def +++ b/include/elf/arc-cpu.def @@ -19,35 +19,40 @@ 02110-1301, USA. */ -ARC_CPU_TYPE_A7xx (arc700, 0x00), -ARC_CPU_TYPE_A7xx (nps400, NPS400), - -ARC_CPU_TYPE_AV2EM (arcem, 0x00), -ARC_CPU_TYPE_AV2EM (em, 0x00), -ARC_CPU_TYPE_AV2EM (em_mini, 0x00), -ARC_CPU_TYPE_AV2EM (em4, CD), -ARC_CPU_TYPE_AV2EM (em4_dmips, CD), -ARC_CPU_TYPE_AV2EM (em4_fpus, CD), -ARC_CPU_TYPE_AV2EM (em4_fpuda, CD | DPA), -ARC_CPU_TYPE_AV2EM (quarkse_em, CD | SPX | DPX), - -ARC_CPU_TYPE_AV2HS (archs, CD), -ARC_CPU_TYPE_AV2HS (hs, CD), -ARC_CPU_TYPE_AV2HS (hs34, CD), -ARC_CPU_TYPE_AV2HS (hs38, CD), -ARC_CPU_TYPE_AV2HS (hs38_linux, CD), -ARC_CPU_TYPE_AV2HS (hs4x, CD), -ARC_CPU_TYPE_AV2HS (hs4xd, CD), -ARC_CPU_TYPE_AV2HS (hs4x_rel31, CD), - -ARC_CPU_TYPE_A6xx (arc600, 0x00), -ARC_CPU_TYPE_A6xx (arc600_norm, 0x00), -ARC_CPU_TYPE_A6xx (arc600_mul64, 0x00), -ARC_CPU_TYPE_A6xx (arc600_mul32x16, 0x00), -ARC_CPU_TYPE_A6xx (arc601, 0x00), -ARC_CPU_TYPE_A6xx (arc601_norm, 0x00), -ARC_CPU_TYPE_A6xx (arc601_mul64, 0x00), -ARC_CPU_TYPE_A6xx (arc601_mul32x16, 0x00), +ARC_CPU_TYPE_A64x (hs6x, CD | DIV) +ARC_CPU_TYPE_A32x (hs5x, CD | DIV) +ARC_CPU_TYPE_A64x (hs68, CD | DIV) +ARC_CPU_TYPE_A32x (hs58, CD | DIV) + +ARC_CPU_TYPE_A7xx (arc700, 0x00) +ARC_CPU_TYPE_A7xx (nps400, NPS400) + +ARC_CPU_TYPE_AV2EM (arcem, 0x00) +ARC_CPU_TYPE_AV2EM (em, 0x00) +ARC_CPU_TYPE_AV2EM (em_mini, 0x00) +ARC_CPU_TYPE_AV2EM (em4, CD) +ARC_CPU_TYPE_AV2EM (em4_dmips, CD) +ARC_CPU_TYPE_AV2EM (em4_fpus, CD) +ARC_CPU_TYPE_AV2EM (em4_fpuda, CD | DPA) +ARC_CPU_TYPE_AV2EM (quarkse_em, CD | SPX | DPX) + +ARC_CPU_TYPE_AV2HS (archs, CD) +ARC_CPU_TYPE_AV2HS (hs, CD) +ARC_CPU_TYPE_AV2HS (hs34, CD) +ARC_CPU_TYPE_AV2HS (hs38, CD) +ARC_CPU_TYPE_AV2HS (hs38_linux, CD) +ARC_CPU_TYPE_AV2HS (hs4x, CD) +ARC_CPU_TYPE_AV2HS (hs4xd, CD) +ARC_CPU_TYPE_AV2HS (hs4x_rel31, CD) + +ARC_CPU_TYPE_A6xx (arc600, 0x00) +ARC_CPU_TYPE_A6xx (arc600_norm, 0x00) +ARC_CPU_TYPE_A6xx (arc600_mul64, 0x00) +ARC_CPU_TYPE_A6xx (arc600_mul32x16, 0x00) +ARC_CPU_TYPE_A6xx (arc601, 0x00) +ARC_CPU_TYPE_A6xx (arc601_norm, 0x00) +ARC_CPU_TYPE_A6xx (arc601_mul64, 0x00) +ARC_CPU_TYPE_A6xx (arc601_mul32x16, 0x00) ARC_CPU_TYPE_NONE diff --git a/include/elf/arc-reloc.def b/include/elf/arc-reloc.def index 9d0e42e4447..fd04a55b1bf 100644 --- a/include/elf/arc-reloc.def +++ b/include/elf/arc-reloc.def @@ -64,6 +64,13 @@ ARC_RELOC_HOWTO(ARC_32, 4, \ bitfield, \ ( S + A )) +ARC_RELOC_HOWTO(ARC_64, 5, \ + 8, \ + 64, \ + replace_word64, \ + bitfield, \ + ( S + A )) + ARC_RELOC_HOWTO(ARC_N8, 8, \ 1, \ 8, \ @@ -201,14 +208,7 @@ ARC_RELOC_HOWTO(ARC_32_ME, 27, \ 4, \ 32, \ replace_limm, \ - signed, \ - ( ME ( ( S + A ) ) )) - -ARC_RELOC_HOWTO(ARC_32_ME_S, 105, \ - 4, \ - 32, \ - replace_limms, \ - signed, \ + bitfield, \ ( ME ( ( S + A ) ) )) ARC_RELOC_HOWTO(ARC_N32_ME, 28, \ @@ -369,21 +369,21 @@ ARC_RELOC_HOWTO(ARC_GLOB_DAT, 54, \ 4, \ 32, \ replace_word32, \ - signed, \ + bitfield, \ S) ARC_RELOC_HOWTO(ARC_JMP_SLOT, 55, \ 4, \ 32, \ replace_word32, \ - signed, \ + bitfield, \ ( ME ( S ) )) ARC_RELOC_HOWTO(ARC_RELATIVE, 56, \ 4, \ 32, \ replace_word32, \ - signed, \ + bitfield, \ ( ME ( ( B + A ) ) )) ARC_RELOC_HOWTO(ARC_GOTOFF, 57, \ @@ -511,3 +511,152 @@ ARC_RELOC_HOWTO(ARC_NPS_CMEM16, 78, \ replace_bits16, \ dont, \ ( ME ( S + A ))) + +ARC_RELOC_HOWTO(ARC_S9H_PCREL, 79, \ + 4, \ + 8, \ + replace_disp8ls, \ + signed, \ + ( ME ( ( ( ( S + A ) - P ) >> 1 ) ) ) ) + +ARC_RELOC_HOWTO(ARC_S7H_PCREL, 80, \ + 2, \ + 6, \ + replace_disp6s, \ + signed, \ + ( ( ( ( S + A ) - P ) >> 1 ) ) ) + +ARC_RELOC_HOWTO(ARC_S8H_PCREL, 81, \ + 2, \ + 7, \ + replace_disp7s, \ + signed, \ + ( ( ( ( S + A ) - P ) >> 1 ) ) ) + +ARC_RELOC_HOWTO(ARC_S10H_PCREL, 82, \ + 2, \ + 9, \ + replace_disp9s, \ + signed, \ + ( ( ( ( S + A ) - P ) >> 1 ) ) ) + +ARC_RELOC_HOWTO(ARC_S13H_PCREL, 83, \ + 4, \ + 12, \ + replace_disp12s, \ + signed, \ + ( ME ( ( ( ( S + A ) - P ) >> 1 ) ) ) ) + +ARC_RELOC_HOWTO(ARC_ALIGN, 84, \ + 4, \ + 0, \ + replace_none, \ + dont, \ + 0 ) + +ARC_RELOC_HOWTO(ARC_ADD8, 85, \ + 1, \ + 8, \ + replace_bits8, \ + dont, \ + ( S + A )) + +ARC_RELOC_HOWTO(ARC_ADD16, 86, \ + 2, \ + 16, \ + replace_bits16, \ + dont, \ + ( S + A )) + +ARC_RELOC_HOWTO(ARC_SUB8, 87, \ + 1, \ + 8, \ + replace_bits8, \ + dont, \ + ( A - S + ICARRY )) + +ARC_RELOC_HOWTO(ARC_SUB16, 88, \ + 2, \ + 16, \ + replace_bits16, \ + dont, \ + ( A - S + ICARRY )) + +ARC_RELOC_HOWTO(ARC_SUB32, 89, \ + 4, \ + 32, \ + replace_word32, \ + dont, \ + ( A - S + ICARRY)) + +ARC_RELOC_HOWTO(ARC_LO32, 90, \ + 4, \ + 32, \ + replace_word32, \ + dont, \ + ( ( S + A ) & 4294967295 )) + +ARC_RELOC_HOWTO(ARC_HI32, 91, \ + 4, \ + 32, \ + replace_word32, \ + dont, \ + ( ( S + A ) >> 32 )) + +ARC_RELOC_HOWTO(ARC_LO32_ME, 92, \ + 4, \ + 32, \ + replace_word32, \ + dont, \ + ( ME ( ( ( S + A ) & 4294967295 ) ) )) + +ARC_RELOC_HOWTO(ARC_HI32_ME, 93, \ + 4, \ + 32, \ + replace_word32, \ + dont, \ + ( ME ( ( ( S + A ) >> 32 ) ) )) + +ARC_RELOC_HOWTO(ARC_N64, 94, \ + 4, \ + 32, \ + replace_word32, \ + dont, \ + ( DEREFP - ( S + A ) )) + +ARC_RELOC_HOWTO(ARC_SDA_LDST3, 95, \ + 4, \ + 9, \ + replace_disp9ls, \ + signed, \ + ( ( ( S + A ) - _SDA_BASE_ ) >> 3 )) + +ARC_RELOC_HOWTO(ARC_NLO32, 96, \ + 4, \ + 32, \ + replace_word32, \ + dont, \ + ( DEREFP - ( ( S + A ) & 4294967295 ) )) + +ARC_RELOC_HOWTO(ARC_NLO32_ME, 97, \ + 4, \ + 32, \ + replace_word32, \ + dont, \ + ( ME ( ( DEREFP - ( ( S + A ) & 4294967295 ) ) ) )) + +ARC_RELOC_HOWTO(ARC_PCLO32_ME_2, 98, \ + 4, \ + 34, \ + replace_word32, \ + signed, \ + ( ME ( ( ( ( S + A ) - P ) >> 2 ) & 0xFFFFFFFF ) ) ) + + +ARC_RELOC_HOWTO(ARC_PLT34, 99, \ + 4, \ + 34, \ + replace_word32, \ + signed, \ + ( ME ( ( ( ( L + A ) - P ) >> 2 ) & 0xFFFFFFFF ) ) ) + diff --git a/include/elf/arc.h b/include/elf/arc.h index 57800e024cd..a6a84cc75b4 100644 --- a/include/elf/arc.h +++ b/include/elf/arc.h @@ -50,6 +50,7 @@ END_RELOC_NUMBERS (R_ARC_max) #define E_ARC_MACH_ARC700 0x00000003 #define EF_ARC_CPU_ARCV2EM 0x00000005 #define EF_ARC_CPU_ARCV2HS 0x00000006 +#define EF_ARC_CPU_ARC64 0x00000007 /* ARC Linux specific ABIs. */ #define E_ARC_OSABI_ORIG 0x00000000 /* MUST be 0 for back-compat. */ diff --git a/include/opcode/arc-attrs.h b/include/opcode/arc-attrs.h index f0478dc7dd4..01276a60fc1 100644 --- a/include/opcode/arc-attrs.h +++ b/include/opcode/arc-attrs.h @@ -37,8 +37,8 @@ const struct feature_type } FEATURE_LIST_NAME [] = { { BTSCN, ARC_OPCODE_ARCALL, "BITSCAN", "bit-scan" }, - { CD, ARC_OPCODE_ARCV2, "CD", "code-density" }, - { DIV, ARC_OPCODE_ARCV2, "DIV_REM", "div/rem" }, + { CD, ARC_OPCODE_ARCVx, "CD", "code-density" }, + { DIV, ARC_OPCODE_ARCVx, "DIV_REM", "div/rem" }, { DP, ARC_OPCODE_ARCv2HS, "FPUD", "double-precision FPU" }, { DPA, ARC_OPCODE_ARCv2EM, "FPUDA", "double assist FP" }, { DPX, ARC_OPCODE_ARCFPX, "DPFP", "double-precision FPX" }, diff --git a/include/opcode/arc-func.h b/include/opcode/arc-func.h index 65d21e38d96..78356101d04 100644 --- a/include/opcode/arc-func.h +++ b/include/opcode/arc-func.h @@ -22,8 +22,8 @@ /* mask = 00000000000000000000000000000000. */ #ifndef REPLACE_none #define REPLACE_none -ATTRIBUTE_UNUSED static unsigned -replace_none (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_none (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0x00; @@ -35,8 +35,8 @@ replace_none (unsigned insn, int value ATTRIBUTE_UNUSED) /* mask = 11111111. */ #ifndef REPLACE_bits8 #define REPLACE_bits8 -ATTRIBUTE_UNUSED static unsigned -replace_bits8 (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_bits8 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0xff; insn |= ((value >> 0) & 0x00ff) << 0; @@ -49,8 +49,8 @@ replace_bits8 (unsigned insn, int value ATTRIBUTE_UNUSED) /* mask = 1111111111111111. */ #ifndef REPLACE_bits16 #define REPLACE_bits16 -ATTRIBUTE_UNUSED static unsigned -replace_bits16 (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_bits16 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0xffff; insn |= ((value >> 0) & 0xffff) << 0; @@ -63,8 +63,8 @@ replace_bits16 (unsigned insn, int value ATTRIBUTE_UNUSED) /* mask = 111111111111111111111111. */ #ifndef REPLACE_bits24 #define REPLACE_bits24 -ATTRIBUTE_UNUSED static unsigned -replace_bits24 (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_bits24 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0xffffff; insn |= ((value >> 0) & 0xffffff) << 0; @@ -78,8 +78,8 @@ replace_bits24 (unsigned insn, int value ATTRIBUTE_UNUSED) /* mask = 111111111111111111111111. */ #ifndef REPLACE_bits24_be #define REPLACE_bits24_be -ATTRIBUTE_UNUSED static unsigned -replace_bits24_be (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_bits24_be (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0xffffff00; insn |= ((value >> 0) & 0xffffff) << 8; @@ -87,27 +87,39 @@ replace_bits24_be (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_bits24_be */ +#endif /* REPLACE_bits24_be. */ /* mask = 11111111111111111111111111111111. */ #ifndef REPLACE_word32 #define REPLACE_word32 -ATTRIBUTE_UNUSED static unsigned -replace_word32 (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_word32 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0xffffffff; insn |= ((value >> 0) & 0xffffffff) << 0; return insn; } +#endif /* REPLACE_word32. */ + +/* mask = 1111111111111111111111111111111111111111111111111111111111111111. */ +#ifndef REPLACE_word64 +#define REPLACE_word64 +ATTRIBUTE_UNUSED static bfd_vma +replace_word64 (bfd_vma insn, bfd_vma value) +{ + insn |= value; + + return insn; +} +#endif /* REPLACE_word64. */ -#endif /* REPLACE_word32 */ /* mask = 0000000000000000000000000000000011111111111111111111111111111111. */ #ifndef REPLACE_limm #define REPLACE_limm -ATTRIBUTE_UNUSED static unsigned -replace_limm (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_limm (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0xffffffff; insn |= ((value >> 0) & 0xffffffff) << 0; @@ -115,13 +127,13 @@ replace_limm (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_limm */ +#endif /* REPLACE_limm. */ /* mask = 000000000000000011111111111111111111111111111111. */ #ifndef REPLACE_limms #define REPLACE_limms -ATTRIBUTE_UNUSED static unsigned -replace_limms (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_limms (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0xffffffff; insn |= ((value >> 0) & 0xffffffff) << 0; @@ -129,13 +141,13 @@ replace_limms (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_limms */ +#endif /* REPLACE_limms. */ /* mask = 00000111111111102222222222000000. */ #ifndef REPLACE_disp21h #define REPLACE_disp21h -ATTRIBUTE_UNUSED static unsigned -replace_disp21h (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp21h (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0x7feffc0; insn |= ((value >> 0) & 0x03ff) << 17; @@ -144,13 +156,13 @@ replace_disp21h (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_disp21h */ +#endif /* REPLACE_disp21h. */ /* mask = 00000111111111002222222222000000. */ #ifndef REPLACE_disp21w #define REPLACE_disp21w -ATTRIBUTE_UNUSED static unsigned -replace_disp21w (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp21w (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0x7fcffc0; insn |= ((value >> 0) & 0x01ff) << 18; @@ -159,13 +171,13 @@ replace_disp21w (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_disp21w */ +#endif /* REPLACE_disp21w. */ /* mask = 00000111111111102222222222003333. */ #ifndef REPLACE_disp25h #define REPLACE_disp25h -ATTRIBUTE_UNUSED static unsigned -replace_disp25h (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp25h (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0x7feffcf; insn |= ((value >> 0) & 0x03ff) << 17; @@ -175,13 +187,13 @@ replace_disp25h (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_disp25h */ +#endif /* REPLACE_disp25h. */ /* mask = 00000111111111002222222222003333. */ #ifndef REPLACE_disp25w #define REPLACE_disp25w -ATTRIBUTE_UNUSED static unsigned -replace_disp25w (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp25w (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0x7fcffcf; insn |= ((value >> 0) & 0x01ff) << 18; @@ -191,13 +203,13 @@ replace_disp25w (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_disp25w */ +#endif /* REPLACE_disp25w. */ /* mask = 00000000000000000000000111111111. */ #ifndef REPLACE_disp9 #define REPLACE_disp9 -ATTRIBUTE_UNUSED static unsigned -replace_disp9 (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp9 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0x1ff; insn |= ((value >> 0) & 0x01ff) << 0; @@ -205,13 +217,13 @@ replace_disp9 (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_disp9 */ +#endif /* REPLACE_disp9. */ /* mask = 00000000111111112000000000000000. */ #ifndef REPLACE_disp9ls #define REPLACE_disp9ls -ATTRIBUTE_UNUSED static unsigned -replace_disp9ls (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp9ls (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0xff8000; insn |= ((value >> 0) & 0x00ff) << 16; @@ -225,8 +237,8 @@ replace_disp9ls (unsigned insn, int value ATTRIBUTE_UNUSED) /* mask = 0000000111111111. */ #ifndef REPLACE_disp9s #define REPLACE_disp9s -ATTRIBUTE_UNUSED static unsigned -replace_disp9s (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp9s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0x1ff; insn |= ((value >> 0) & 0x01ff) << 0; @@ -234,13 +246,13 @@ replace_disp9s (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_disp9s */ +#endif /* REPLACE_disp9s. */ /* mask = 0000011111111111. */ #ifndef REPLACE_disp13s #define REPLACE_disp13s -ATTRIBUTE_UNUSED static unsigned -replace_disp13s (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp13s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0x7ff; insn |= ((value >> 0) & 0x07ff) << 0; @@ -248,13 +260,13 @@ replace_disp13s (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_disp13s */ +#endif /* REPLACE_disp13s. */ /* mask = 0000022222200111. */ #ifndef REPLACE_disp9s1 #define REPLACE_disp9s1 -ATTRIBUTE_UNUSED static unsigned -replace_disp9s1 (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp9s1 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0x7e7; insn |= ((value >> 0) & 0x0007) << 0; @@ -263,13 +275,13 @@ replace_disp9s1 (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_disp9s1 */ +#endif /* REPLACE_disp9s1. */ /* mask = 00000000000000000000111111222222. */ #ifndef REPLACE_disp12s #define REPLACE_disp12s -ATTRIBUTE_UNUSED static unsigned -replace_disp12s (unsigned insn, int value ATTRIBUTE_UNUSED) +ATTRIBUTE_UNUSED static bfd_vma +replace_disp12s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) { insn = insn & ~0xfff; insn |= ((value >> 0) & 0x003f) << 6; @@ -277,13 +289,13 @@ replace_disp12s (unsigned insn, int value ATTRIBUTE_UNUSED) return insn; } -#endif /* REPLACE_disp12s */ +#endif /* REPLACE_disp12s. */ /* mask = 0000001111111111. */ #ifndef REPLACE_jli #define REPLACE_jli -ATTRIBUTE_UNUSED static unsigned -replace_jli (unsigned insn, int value) +ATTRIBUTE_UNUSED static bfd_vma +replace_jli (bfd_vma insn, bfd_vma value) { insn = insn & ~0x3ff; insn |= ((value >> 0) & 0x03ff) << 0; @@ -291,4 +303,76 @@ replace_jli (unsigned insn, int value) return insn; } -#endif /* REPLACE_jli */ +#endif /* REPLACE_jli. */ + +#ifndef REPLACE_disp8ls +#define REPLACE_disp8ls +/* mask = 0000 0000 1111 1110 2000 0000 0000 0000. */ +ATTRIBUTE_UNUSED static bfd_vma +replace_disp8ls (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) +{ + insn = insn & ~0xfe8000; + insn |= ((value >> 0) & 0x007f) << 17; + insn |= ((value >> 7) & 0x0001) << 15; + + return insn; +} +#endif /* REPLACE_disp8ls. */ + +#ifndef REPLACE_disp9s +#define REPLACE_disp9s +/* mask = 0000000111111111 + insn = 1111001sssssssss. */ +static bfd_vma +replace_disp9s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) +{ + insn = insn & ~0x1ff; + insn |= ((value >> 0) & 0x01ff) << 0; + + return insn; +} +#endif /* REPLACE_disp9s. */ + +#ifndef REPLACE_disp6s +#define REPLACE_disp6s +/* mask = 0000000000111111 + insn = 1111011000ssssss. */ +ATTRIBUTE_UNUSED static bfd_vma +replace_disp6s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) +{ + insn = insn & ~0x3f; + insn |= ((value >> 0) & 0x003f) << 0; + + return insn; +} + +#endif /* REPLACE_disp6s. */ + +#ifndef REPLACE_disp7s +#define REPLACE_disp7s +/* mask = 0000000001111111 + insn = 11101bbb1sssssss. */ +ATTRIBUTE_UNUSED static bfd_vma +replace_disp7s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) +{ + insn = insn & ~0x7f; + insn |= ((value >> 0) & 0x007f) << 0; + + return insn; +} +#endif /* REPLACE_disp7s. */ + +#ifndef REPLACE_disp12s +#define REPLACE_disp12s +/* mask = 00000000000000000000111111222222 + insn = 00100RRR101010000RRRssssssSSSSSS. */ +ATTRIBUTE_UNUSED static bfd_vma +replace_disp12s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED) +{ + insn = insn & ~0xfff; + insn |= ((value >> 0) & 0x003f) << 6; + insn |= ((value >> 6) & 0x003f) << 0; + + return insn; +} +#endif /* REPLACE_disp12s. */ diff --git a/include/opcode/arc.h b/include/opcode/arc.h index 0fae8740722..fe3278ab706 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -199,13 +199,19 @@ extern int arc_opcode_len (const struct arc_opcode *opcode); #define ARC_OPCODE_ARC700 0x0002 /* ARC 700 specific insns. */ #define ARC_OPCODE_ARCv2EM 0x0004 /* ARCv2 EM specific insns. */ #define ARC_OPCODE_ARCv2HS 0x0008 /* ARCv2 HS specific insns. */ +#define ARC_OPCODE_ARC64 0x0010 /* ARC64 specific insns. */ +#define ARC_OPCODE_ARC32 0x0020 /* ARC32 specific insns. */ /* CPU combi. */ #define ARC_OPCODE_ARCALL (ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 \ - | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS) + | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS \ + | ARC_OPCODE_ARC64 | ARC_OPCODE_ARC32) #define ARC_OPCODE_ARCFPX (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM) #define ARC_OPCODE_ARCV1 (ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700) #define ARC_OPCODE_ARCV2 (ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS) +#define ARC_OPCODE_ARCVx \ + (ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS | ARC_OPCODE_ARC64 \ + | ARC_OPCODE_ARC32) #define ARC_OPCODE_ARCMPY6E (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCV2) /* The operands table is an array of struct arc_operand. */ @@ -325,6 +331,9 @@ extern const unsigned arc_NToperand; /* Mark the colon position. */ #define ARC_OPERAND_COLON 0x4000 +/* Mark a floating point register. */ +#define ARC_OPERAND_FP 0x8000 + /* Mask for selecting the type for typecheck purposes. */ #define ARC_OPERAND_TYPECHECK_MASK \ (ARC_OPERAND_IR \ @@ -369,6 +378,16 @@ struct arc_flag_class /* List of valid flags (codes). */ unsigned flags[256]; + + /* Some special cases needs to use insert/extract functions for + flags as well. The function prototypes are identically like the + one used for insertion/extraction of an operand. The reason + beeing the ability of reusing these functions. */ + unsigned long long (*insert) (unsigned long long instruction, + long long int op, + const char **errmsg); + long long int (*extract) (unsigned long long instruction, + bool *invalid); }; extern const struct arc_flag_class arc_flag_classes[]; @@ -441,6 +460,8 @@ struct arc_pseudo_insn extern const struct arc_pseudo_insn arc_pseudo_insns[]; extern const unsigned arc_num_pseudo_insn; +extern const struct arc_pseudo_insn arc64_pseudo_insns[]; +extern const unsigned arc64_num_pseudo_insn; /* Structure for AUXILIARY registers. */ struct arc_aux_reg @@ -478,8 +499,10 @@ extern const unsigned arc_num_relax_opcodes; #define FIELDC(word) ((word & 0x3F) << 6) #define FIELDF (0x01 << 15) #define FIELDQ (0x1F) +#define HARD_FIELDF (0x00) -#define INSN3OP(MOP,SOP) (((MOP & 0x1F) << 27) | ((SOP & 0x3F) << 16)) +#define INSN3OP(MOP,SOP) \ + (((MOP & 0x1F) << 27) | ((SOP & 0x3F) << 16) | HARD_FIELDF) #define INSN2OPX(MOP,SOP1,SOP2) (INSN3OP (MOP,SOP1) | (SOP2 & 0x3F)) #define INSN2OP(MOP,SOP) (INSN2OPX (MOP,0x2F,SOP)) @@ -667,6 +690,100 @@ typedef enum #define ARC_NUM_ADDRTYPES 16 +/*ARC64 floating point enums. */ +#define P_HALF 0 +#define P_SINGLE 1 +#define P_DOUBLE 2 + +#define TOPF_FMADD 0 +#define TOPF_FMSUB 1 +#define TOPF_FNMADD 2 +#define TOPF_FNMSUB 3 +#define TOPF_VFMADD 4 +#define TOPF_VFMSUB 5 +#define TOPF_VFNMADD 6 +#define TOPF_VFNMSUB 7 +#define TOPF_VFMADDS 0xC +#define TOPF_VFMSUBS 0xD +#define TOPF_VFNMADDS 0xE +#define TOPF_VFNMSUBS 0xF + +#define DOPF_FADD 0 +#define DOPF_FSUB 1 +#define DOPF_FMUL 2 +#define DOPF_FDIV 3 +#define DOPF_FCMP 4 +#define DOPF_FCMPF 5 +#define DOPF_FMIN 6 +#define DOPF_FMAX 7 +#define DOPF_FSGNJ 8 +#define DOPF_FSGNJN 10 +#define DOPF_FSGNJX 11 +#define DOPF_VFADD 0x10 +#define DOPF_VFSUB 0x11 +#define DOPF_VFMUL 0x12 +#define DOPF_VFDIV 0x13 +#define DOPF_VFADDS 0x14 +#define DOPF_VFSUBS 0x15 +#define DOPF_VFMULS 0x16 +#define DOPF_VFDIVS 0x17 +#define DOPF_VFUNPKL 0x18 +#define DOPF_VFUNPKM 0x19 +#define DOPF_VFPACKL 0x1a +#define DOPF_VFPACKM 0x1b +#define DOPF_VFBFLYL 0x1c +#define DOPF_VFBFLYM 0x1d +#define DOPF_VFADDSUB 0x1e +#define DOPF_VFSUBADD 0x1f + +#define SOPF_FSQRT 0 +#define SOPF_VFSQRT 1 +#define SOPF_VFEXCH 2 + +#define COPF_FMOV 0 +#define COPF_VFMOV 1 + +#define FUINT2S 0 +#define FS2UINT 0 +#define FINT2S 0 +#define FS2INT 0 +#define FSRND 0 +#define F2UINT_RZ 0 +#define FSINT_RZ 0 +#define FSRND_RZ 0 +#define FMVI2S 0 +#define FMVS2I 0 +#define FS2H 0 +#define FH2S 0 +#define FS2H_RZ 0 + +#define FUINT2D 1 +#define FS2UL 1 +#define FINT2D 1 +#define FS2L 1 +#define FS2D 1 +#define FS2UL_RZ 1 +#define FS2L_RZ 1 + +#define FUL2S 2 +#define FD2UINT 2 +#define FL2S 2 +#define FD2INT 2 +#define FD2S 2 +#define FD2UINT_RZ 2 +#define FD2INT_RZ 2 + +#define FUL2D 3 +#define FD2UL 3 +#define FL2D 3 +#define FD2L 3 +#define FDRND 3 +#define FD2UL_RZ 3 +#define FD2L_RZ 3 +#define FDRND_RZ 3 +#define FMVL2D 3 +#define FMVD2L 3 + #ifdef __cplusplus } #endif -- 2.30.2