From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by sourceware.org (Postfix) with ESMTPS id 033353858C2F for ; Mon, 13 Nov 2023 12:14:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 033353858C2F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=embecosm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=embecosm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 033353858C2F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::330 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699877683; cv=none; b=VNgwqdnUnndlIY+p9MsrorcynGQJu5dHvVb6xYgXtGEB8s64hRsZNbjS6zjqNI/4jL6MPCpF6F0/KDJbqRyFajhpHFXZp3qSX/0bCTK8W9pmag2ua5nN2NpBTCgrqUqN60XDDPOXwECCnZextHoxawh9V7WnDNlWES5YzBxQKl4= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699877683; c=relaxed/simple; bh=A3obFKYKuCeZM4WYoeVm2Jw0EyJCnD668dnhtxuk4q4=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=seeRWVCrvY0IlrSzSPUKEPqhzjm1tmY/Xp8HmqK4cKVOMGl5CkFCcM/So6YNodu0Vw1Dn5jJOFK527FALVE/YWDo2IvLLzMVQwtjnpjMdpa8v3JggSnbH+2OOuqMom4kpBJwDIa2JKSgSjrXvVhz7Dghp3UJlsij4Yxd6aYymKo= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-40a46ea95f0so25280535e9.2 for ; Mon, 13 Nov 2023 04:14:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=embecosm.com; s=google; t=1699877678; x=1700482478; darn=sourceware.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=kxF26bIVPvMX29+9Y5+gzeTqRbCm19MGg8L5eookaqg=; b=LuEbUE7vrU7E8hqkvtPqMN4WvLV2kQ1i5PQuLky9EezrSvb5Ade8n4Zcca7Qlm7cZ3 kuL89GM9ajDbLiGzWj0STp+pu4c/vY7rf19CIswU7ECSCDrtBD99IZHCLxduOidgGwzT vryE29H3PSpeykOFPPJNnWyg0YewHhzfQHHlqeuacYBJhPM04LGyL6lA7EPAp/xH3COm bJTDhYExIYzEKWCqxYS75xAE4JiGOTKT5/8d/5/K9OMy4CL5yU+0woDxge8jXSZ8Ax01 kufX6g9RgP6aOu/ShPPXasbbj2B5Rq35iTkfSZcSBk7+5ZgfpFjULC8n/6r6s8xMBTHB VgqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699877678; x=1700482478; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=kxF26bIVPvMX29+9Y5+gzeTqRbCm19MGg8L5eookaqg=; b=e+uIDVRztwCymddNZDxtk4tcEukJii2CBTi8Igv8dh4hlTsLMTrMwU6/HIy3mcXNKQ Ssb0UHFvwhHtbd0/nccW6WRDOLfmbKvmIoLRH1phfwFJT3CwKyMLZEQNSrp1KSj0HOY7 PmIrfAFDBeZU4z2DLM4oIDdp0GcuSs/0qvTzaRB3d4HX47EN7+ntC4jMPIXNKR3yuEhT R3gCybEncpF8+4jFXpgnmE+t8vJe8YxwlE2nmzVMlVhfBKmyUZm5EsG2wYMD7Iqmg6al e7uQ0JeFGwiLurpsgzoMFoGvmxmMjNSuLAFYy6qGNNMd/HRzNF1mGQOvjCnXIPn0vLzw C8Uw== X-Gm-Message-State: AOJu0YxXxGaih8DUDhFJmnmgvVAlA1a1E7KRH2VVITUa19vTxpEikTlZ XqDltqXwLA9PJzdM1v4C3FjJuGHzKfYj8XFCs3cF7A== X-Google-Smtp-Source: AGHT+IHAWfKtzYMWqZFAseX+keVHaW6a34k45i4u7tHcWErDEcumB+/psLOQRYKaYfL25gtP30AN0g== X-Received: by 2002:a05:600c:3509:b0:407:8e68:4a5b with SMTP id h9-20020a05600c350900b004078e684a5bmr5173693wmq.38.1699877677835; Mon, 13 Nov 2023 04:14:37 -0800 (PST) Received: from troughton.sou.embecosm-corp.com ([212.69.42.53]) by smtp.gmail.com with ESMTPSA id p6-20020adfe606000000b0032d2f09d991sm5249274wrm.33.2023.11.13.04.14.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 04:14:36 -0800 (PST) From: Mary Bennett To: binutils@sourceware.org Cc: mary.bennett@embecosm.com Subject: [PATCH 0/3] RISC-V: Support CORE-V XCVELW, XCVBI, and XCVMEM extensions Date: Mon, 13 Nov 2023 12:14:22 +0000 Message-Id: <20231113121425.958923-1-mary.bennett@embecosm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch series presents the comprehensive implementation of the ELW, BI, and MEM extension for CORE-V. Tested with riscv-gnu-toolchain on binutils, ld, gas and gcc testsuites to ensure its correctness and compatibility with the existing codebase. However, your input, reviews, and suggestions are invaluable in making this extension even more robust. The CORE-V instructions are described in the specification [1] and work can be found in the OpenHW group's Github repository [2]. [1] docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html [2] github.com/openhwgroup/corev-binutils-gdb Contributors: Mary Bennett Nandni Jamnadas Pietra Ferreira Charlie Keaney Jessica Mills Craig Blackmore Simon Cook Jeremy Bennett Helene Chelin Nazareno Bruschi Lin Sinan RISC-V: Add support for XCVmem extension in CV32E40P RISC-V: Add support for XCVelw extension in CV32E40P RISC-V: Add support for XCVbi extension in CV32E40P bfd/elfxx-riscv.c | 15 ++++++ gas/config/tc-riscv.c | 12 ++++- gas/doc/c-riscv.texi | 15 ++++++ gas/testsuite/gas/riscv/cv-bi-beqimm.d | 12 +++++ gas/testsuite/gas/riscv/cv-bi-beqimm.s | 4 ++ gas/testsuite/gas/riscv/cv-bi-bneimm.d | 12 +++++ gas/testsuite/gas/riscv/cv-bi-bneimm.s | 4 ++ gas/testsuite/gas/riscv/cv-bi-fail-march.d | 3 ++ gas/testsuite/gas/riscv/cv-bi-fail-march.l | 3 ++ gas/testsuite/gas/riscv/cv-bi-fail-march.s | 5 ++ .../gas/riscv/cv-bi-fail-operand-01.d | 3 ++ .../gas/riscv/cv-bi-fail-operand-01.l | 3 ++ .../gas/riscv/cv-bi-fail-operand-01.s | 4 ++ .../gas/riscv/cv-bi-fail-operand-02.d | 3 ++ .../gas/riscv/cv-bi-fail-operand-02.l | 3 ++ .../gas/riscv/cv-bi-fail-operand-02.s | 4 ++ .../gas/riscv/cv-bi-fail-operand-03.d | 3 ++ .../gas/riscv/cv-bi-fail-operand-03.l | 9 ++++ .../gas/riscv/cv-bi-fail-operand-03.s | 10 ++++ gas/testsuite/gas/riscv/cv-elw-fail-march.d | 3 ++ gas/testsuite/gas/riscv/cv-elw-fail-march.l | 38 +++++++++++++++ gas/testsuite/gas/riscv/cv-elw-fail-march.s | 42 +++++++++++++++++ gas/testsuite/gas/riscv/cv-elw-fail.d | 3 ++ gas/testsuite/gas/riscv/cv-elw-fail.l | 5 ++ gas/testsuite/gas/riscv/cv-elw-fail.s | 8 ++++ gas/testsuite/gas/riscv/cv-elw-pass.d | 46 +++++++++++++++++++ gas/testsuite/gas/riscv/cv-elw-pass.s | 42 +++++++++++++++++ gas/testsuite/gas/riscv/cv-mem-fail-march.d | 3 ++ gas/testsuite/gas/riscv/cv-mem-fail-march.l | 25 ++++++++++ gas/testsuite/gas/riscv/cv-mem-fail-march.s | 26 +++++++++++ .../gas/riscv/cv-mem-fail-operand-01.d | 3 ++ .../gas/riscv/cv-mem-fail-operand-01.l | 21 +++++++++ .../gas/riscv/cv-mem-fail-operand-01.s | 22 +++++++++ .../gas/riscv/cv-mem-fail-operand-02.d | 3 ++ .../gas/riscv/cv-mem-fail-operand-02.l | 13 ++++++ .../gas/riscv/cv-mem-fail-operand-02.s | 14 ++++++ .../gas/riscv/cv-mem-fail-operand-03.d | 3 ++ .../gas/riscv/cv-mem-fail-operand-03.l | 33 +++++++++++++ .../gas/riscv/cv-mem-fail-operand-03.s | 34 ++++++++++++++ .../gas/riscv/cv-mem-fail-operand-04.d | 3 ++ .../gas/riscv/cv-mem-fail-operand-04.l | 41 +++++++++++++++++ .../gas/riscv/cv-mem-fail-operand-04.s | 42 +++++++++++++++++ .../gas/riscv/cv-mem-fail-operand-05.d | 3 ++ .../gas/riscv/cv-mem-fail-operand-05.l | 25 ++++++++++ .../gas/riscv/cv-mem-fail-operand-05.s | 26 +++++++++++ gas/testsuite/gas/riscv/cv-mem-lbpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lbpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lbrr.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lbrr.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lbrrpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lbrrpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lbupost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lbupost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lburr.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lburr.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lburrpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lburrpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lhpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lhpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lhrr.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lhrr.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lhrrpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lhrrpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lhupost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lhupost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lhurr.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lhurr.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lhurrpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lhurrpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lwpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lwpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lwrr.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lwrr.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-lwrrpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-lwrrpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-sbpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-sbpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-sbrr.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-sbrr.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-sbrrpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-sbrrpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-shpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-shpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-shrr.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-shrr.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-shrrpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-shrrpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-swpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-swpost.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-swrr.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-swrr.s | 4 ++ gas/testsuite/gas/riscv/cv-mem-swrrpost.d | 12 +++++ gas/testsuite/gas/riscv/cv-mem-swrrpost.s | 4 ++ include/opcode/riscv-opc.h | 39 ++++++++++++++++ include/opcode/riscv.h | 6 +++ ld/testsuite/ld-riscv-elf/cv-bi-beqimm.d | 21 +++++++++ ld/testsuite/ld-riscv-elf/cv-bi-beqimm.s | 11 +++++ ld/testsuite/ld-riscv-elf/cv-bi-bneimm.d | 21 +++++++++ ld/testsuite/ld-riscv-elf/cv-bi-bneimm.s | 11 +++++ ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 2 + opcodes/riscv-dis.c | 4 ++ opcodes/riscv-opc.c | 33 +++++++++++++ 102 files changed, 1185 insertions(+), 1 deletion(-) create mode 100644 gas/testsuite/gas/riscv/cv-bi-beqimm.d create mode 100644 gas/testsuite/gas/riscv/cv-bi-beqimm.s create mode 100644 gas/testsuite/gas/riscv/cv-bi-bneimm.d create mode 100644 gas/testsuite/gas/riscv/cv-bi-bneimm.s create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-march.d create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-march.l create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-march.s create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-operand-01.d create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-operand-01.l create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-operand-01.s create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-operand-02.d create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-operand-02.l create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-operand-02.s create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-operand-03.d create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-operand-03.l create mode 100644 gas/testsuite/gas/riscv/cv-bi-fail-operand-03.s create mode 100644 gas/testsuite/gas/riscv/cv-elw-fail-march.d create mode 100644 gas/testsuite/gas/riscv/cv-elw-fail-march.l create mode 100644 gas/testsuite/gas/riscv/cv-elw-fail-march.s create mode 100644 gas/testsuite/gas/riscv/cv-elw-fail.d create mode 100644 gas/testsuite/gas/riscv/cv-elw-fail.l create mode 100644 gas/testsuite/gas/riscv/cv-elw-fail.s create mode 100644 gas/testsuite/gas/riscv/cv-elw-pass.d create mode 100644 gas/testsuite/gas/riscv/cv-elw-pass.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-march.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-march.l create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-march.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-01.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-01.l create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-01.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-02.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-02.l create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-02.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-03.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-03.l create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-03.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-04.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-04.l create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-04.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-05.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-05.l create mode 100644 gas/testsuite/gas/riscv/cv-mem-fail-operand-05.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lbpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lbpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lbrr.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lbrr.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lbrrpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lbrrpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lbupost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lbupost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lburr.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lburr.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lburrpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lburrpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhrr.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhrr.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhrrpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhrrpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhupost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhupost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhurr.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhurr.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhurrpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lhurrpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lwpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lwpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lwrr.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lwrr.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-lwrrpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-lwrrpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-sbpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-sbpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-sbrr.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-sbrr.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-sbrrpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-sbrrpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-shpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-shpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-shrr.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-shrr.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-shrrpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-shrrpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-swpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-swpost.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-swrr.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-swrr.s create mode 100644 gas/testsuite/gas/riscv/cv-mem-swrrpost.d create mode 100644 gas/testsuite/gas/riscv/cv-mem-swrrpost.s create mode 100644 ld/testsuite/ld-riscv-elf/cv-bi-beqimm.d create mode 100644 ld/testsuite/ld-riscv-elf/cv-bi-beqimm.s create mode 100644 ld/testsuite/ld-riscv-elf/cv-bi-bneimm.d create mode 100644 ld/testsuite/ld-riscv-elf/cv-bi-bneimm.s -- 2.34.1