From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-m6030.netease.com (mail-m6030.netease.com [210.79.60.30]) by sourceware.org (Postfix) with ESMTPS id 87AD73858D37 for ; Thu, 28 Dec 2023 03:40:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 87AD73858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=stu.xupt.edu.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=stu.xupt.edu.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 87AD73858D37 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=210.79.60.30 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703734816; cv=none; b=kwB6WepCkw9Q9Tv2g56e9EOFGoj0uJ934IpCunYEx7TEMaWQlO8l5LaILrINhmZjL6/H9ZsBZArl+akCfUM/sXd7VuiCiUFZZu1YrbkH2c4wb6MFA55M7BRSlfBL5dv9LSZ3VIAEg6QzHlVvNubswPjkSV2nrdwFiqp+YvsOUCA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703734816; c=relaxed/simple; bh=izA/N/H065MbeAyO6ngFWT7U+eTHZHFlX4xdnb3eQYM=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=XeTCG1OsftI1PBKHbJxYXSGLf+HoL8mOllkl3yHdwwCjhABLKFczi4HWwCr+JOVpBvDYJCM1Y2ezxDkVnVrPQ/Xhu0YI8hIhQivCATkSVvNne3i6frx4vbBe2h3VzNhZZ6g/KHNLhf4dhWvW4fhQogs2aGDPorkbqJr+AlI23fQ= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from ubuntu.localdomain (unknown [111.18.37.154]) by mail-m121144.qiye.163.com (Hmail) with ESMTPA id 7CB66AC008D; Thu, 28 Dec 2023 11:39:59 +0800 (CST) From: changjiachen To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, cailulu@loongson.cn, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lazy_Linux@126.com, mengqinggang@loongson.cn, changjiachen Subject: [PATCH v5 0/5] LoongArch tls le model linker relaxation support. Date: Thu, 28 Dec 2023 11:39:52 +0800 Message-Id: <20231228033957.108449-1-changjiachen@stu.xupt.edu.cn> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDHklJVk5PGEMZGU9DGhpJT1UTARMWGhIXJBQOD1 lXWRgSC1lBWUpKSlVKQ1VITFVKTk9ZV1kWGg8SFR0UWUFZS1VLVUtVS1kG X-HM-Tid: 0a8cae81eea6b039kuuu7cb66ac008d X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MRg6KCo6Djw8Kw8pDTgMAko8 URQaCzBVSlVKTEtITEhPQ0tLQ0JOVTMWGhIXVRgTGhUcERIaGBMeFTsIDw5VAw4LD1UeHw5VGBVF WVdZEgtZQVlKSkpVSkNVSExVSk5PWVdZCAFZQU1JT0g3Bg++ X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00,KAM_DMARC_STATUS,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This is the v5 version of patches to support loongarch linker tls le model relax. Changes from v4: * Modified the format of the code. * Some comments are added to the relevant test cases. * Changed the serial number of the new relocation. R_LARCH_TLS_LE_HI20_R (RELOC_NUMBER: 110 ==> 121) R_LARCH_TLS_LE_ADD_R (RELOC_NUMBER: 111 ==> 122) R_LARCH_TLS_LE_LO12_R (RELOC_NUMBER: 112 ==> 123) Changes from v3: * For the fourth operand in the add.d $a0,$a0,$a0,%le_add_r(a) insn, some exception information is added. * Added add.d $a0,$a0,$a0,%le_add_r(a) instruction format to check test cases in gas/testsuite/gas/loongarch. example: a.s add.d $a0,$a0,$a0,8 $ gas/as-new a.s a.s: Assembler messages: a.s:1: error: no match insn: add.d $a0,$a0,$a0,8 Changes from v2: * Some problems in the v2 patch are answered as follows. Question: use ".reloc.,R_LARCH_TLS_LE_ADD_R,sym" to generate relocation or %le_add_r(sym) to generate relocation. Reply: First, after a test, the R_LARCH_TLS_LE_ADD_R can be generated using ".reloc.,R_LARCH_TLS_LE_ADD_R,sym", or "%le_add_r(sym)". However,".reloc" generates R_LARCH_TLS_LE_ADD_R relocation directly, and it is not easy to add "R_LARCH_RELAX" relocation. "%le_add_r(sym)" Adds the R_LARCH_TLS_LE_ADD_R and R_LARCH_RELAX relocation commands, which is easier to implement. Of course, there is another way to generate ".reloc.,R_LARCH_TLS_LE_ADD_R,sym" and ".reloc.,R_LARCH_RELAX,sym" directly in gcc. However, this implementation causes the -mrelax/-mno-relax option to be set in both gcc and gas, which can be confusing. One problem with this is that add.d $r12,$r12,$r2 and add.d $r12,$r12,$r2, %le_add_r(sym) are too similar, so I have to add comments in loongarch_fix_opcodes[]. The goal is to make it as clear as possible to developers. * modified code format in loongarch_relax_tls_le(),use loongarch_relax_delete_bytes() instead of R_LARCH_DELETE to implement the delete instruction operation. * modified R_LARCH_TLS_LE_ADD_R type_name:"tls_le_add_r"-->"le_add_r". * modify comment information. * some comments added to "add.d" in loongarch_opcode loongarch_fix_opcodes[]. * remove some unnecessary content from the ld/testsuite/ld-loongarch test case. Changes from v1: * Modified v1-0000-cover-letter.patch part of the explanatory content. Before Modify: example: __thread int a = 1; old insn sequence: lu12i.w $r12,%le_hi20_r(a) ori $r12,$r12,%le_lo12_r(a) add.d $r12,$r12,$r2,%le_add_r(a) li.w $r13,$r0,1 stptr.w $r13,$r12,0 new insn sequence: lu12i.w $r12,%le_hi20_r(a) add.d $r12,$r12,$r2,%le_add_r(a) li.w $r13,$r0,1 st.w $r13,$r12,%le_lo12_r(a) After Modify: example: __thread int a = 1; old insn sequence(at the O0 optimization level): lu12i.w $r12,%le_hi20(a) ori $r12,$r12,%le_lo12(a) add.d $r12,$r12,$r2 addi.w $r13,$r0,1 stptr.w $r13,$r12,0 new insn sequence(at the O0 optimization level): lu12i.w $r12,%le_hi20_r(a) add.d $r12,$r12,$r2,%le_add_r(a) addi.w $r13,$r0,1 st.w $r13,$r12,%le_lo12_r(a) changjiachen (5): LoongArch: bfd: Add support for tls le relax. LoongArch: include: Add support for tls le relax. LoongArch: opcodes: Add support for tls le relax. LoongArch: gas: Add support for tls le relax. LoongArch: ld: Add support for tls le relax. bfd/bfd-in2.h | 4 + bfd/elfnn-loongarch.c | 75 +++++++++ bfd/elfxx-loongarch.c | 55 ++++++- bfd/libbfd.h | 3 + bfd/reloc.c | 7 + gas/config/tc-loongarch.c | 31 ++++ gas/testsuite/gas/loongarch/loongarch.exp | 9 ++ gas/testsuite/gas/loongarch/reloc.d | 18 +++ gas/testsuite/gas/loongarch/reloc.s | 11 ++ .../gas/loongarch/tls_le_insn_format_check.s | 15 ++ include/elf/loongarch.h | 12 ++ ld/testsuite/ld-loongarch-elf/old-tls-le.s | 23 +++ .../relax-bound-check-tls-le.s | 53 ++++++ ld/testsuite/ld-loongarch-elf/relax-tls-le.s | 26 +++ ld/testsuite/ld-loongarch-elf/relax.exp | 151 +++++++++++++++++- .../tls-relax-compatible-check-new.s | 35 ++++ .../tls-relax-compatible-check-old.s | 33 ++++ opcodes/loongarch-opc.c | 1 + 18 files changed, 556 insertions(+), 6 deletions(-) create mode 100644 gas/testsuite/gas/loongarch/tls_le_insn_format_check.s create mode 100644 ld/testsuite/ld-loongarch-elf/old-tls-le.s create mode 100644 ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s create mode 100644 ld/testsuite/ld-loongarch-elf/relax-tls-le.s create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s -- 2.40.0