[PATCH 07/12] aarch64: Create QL_SRC_X2 and QL_DEST_X2 qualifier macros

[Victor Do Nascimento <victor.donascimento@arm.com>]

Some 128-bit system operations (mrrs, msrr, tlbip, and sysp) take two
qualified operands and one of unqualified type (e.g. system register
name, tlbip operation).  This creates the need for adequate qualifiers
to handle this.

This patch therefore introduces the `QL_SRC_X2' and `QL_DST_X2' qualifier
specifiers, which expand to `QLF3(NIL,X,X)' and `QLF3(X,X,NIL)',
respectively.
---
 opcodes/aarch64-tbl.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 98feb56e08a..06b1550e9a3 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -52,12 +52,24 @@
   QLF2(NIL,X),			\
 }
 
+/* e.g. MSRR <systemreg>, <Xt>, <Xt2>.  */
+#define QL_SRC_X2		\
+{				\
+  QLF3(NIL,X,X),		\
+}
+
 /* e.g. MRS <Xt>, <systemreg>.  */
 #define QL_DST_X		\
 {				\
   QLF2(X,NIL),			\
 }
 
+/* e.g. MRRS <Xt>, <Xt2>, <systemreg>.  */
+#define QL_DST_X2		\
+{				\
+  QLF3(X,X,NIL),		\
+}
+
 /* e.g. SYS #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>}.  */
 #define QL_SYS			\
 {				\
-- 
2.42.0