From: Jens Remus <jremus@linux.ibm.com>
To: binutils@sourceware.org
Cc: Jens Remus <jremus@linux.ibm.com>,
Andreas Krebbel <krebbel@linux.ibm.com>
Subject: [PATCH 08/14] s390: Add test case for disassembler option warn-areg-zero
Date: Thu, 15 Feb 2024 16:58:15 +0100 [thread overview]
Message-ID: <20240215155821.4065623-9-jremus@linux.ibm.com> (raw)
In-Reply-To: <20240215155821.4065623-1-jremus@linux.ibm.com>
gas/
* testsuite/gas/s390/s390.exp: Add test cases for s390-specific
assembler option "warn-areg-zero".
* testsuite/gas/s390/zarch-warn-areg-zero.s: Likewise.
* testsuite/gas/s390/zarch-warn-areg-zero.l: Likewise.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
---
gas/testsuite/gas/s390/s390.exp | 1 +
gas/testsuite/gas/s390/zarch-warn-areg-zero.l | 65 ++++++++++
gas/testsuite/gas/s390/zarch-warn-areg-zero.s | 116 ++++++++++++++++++
3 files changed, 182 insertions(+)
create mode 100644 gas/testsuite/gas/s390/zarch-warn-areg-zero.l
create mode 100644 gas/testsuite/gas/s390/zarch-warn-areg-zero.s
diff --git a/gas/testsuite/gas/s390/s390.exp b/gas/testsuite/gas/s390/s390.exp
index f5798b4778e1..613487fc453c 100644
--- a/gas/testsuite/gas/s390/s390.exp
+++ b/gas/testsuite/gas/s390/s390.exp
@@ -60,4 +60,5 @@ if [expr [istarget "s390-*-*"] || [istarget "s390x-*-*"]] then {
run_list_test "zarch-omitted-base-index-err" ""
run_dump_test "zarch-base-index-0" "{as -m64}"
run_list_test "zarch-base-index-0-err" ""
+ run_list_test "zarch-warn-areg-zero" "-m64 -mwarn-areg-zero"
}
diff --git a/gas/testsuite/gas/s390/zarch-warn-areg-zero.l b/gas/testsuite/gas/s390/zarch-warn-areg-zero.l
new file mode 100644
index 000000000000..decf896aecc7
--- /dev/null
+++ b/gas/testsuite/gas/s390/zarch-warn-areg-zero.l
@@ -0,0 +1,65 @@
+.*: Assembler messages:
+.*:6: Warning: base register specified but zero
+.*:7: Warning: base register specified but zero
+.*:15: Warning: index register specified but zero
+.*:16: Warning: index register specified but zero
+.*:19: Warning: base register specified but zero
+.*:20: Warning: base register specified but zero
+.*:22: Warning: index register specified but zero
+.*:22: Warning: base register specified but zero
+.*:23: Warning: index register specified but zero
+.*:23: Warning: base register specified but zero
+.*:25: Warning: index register specified but zero
+.*:25: Warning: base register specified but zero
+.*:26: Warning: index register specified but zero
+.*:26: Warning: base register specified but zero
+.*:28: Warning: index register specified but zero
+.*:28: Warning: base register specified but zero
+.*:29: Warning: base register specified but zero
+.*:30: Warning: base register specified but zero
+.*:40: Warning: base register specified but zero
+.*:41: Warning: base register specified but zero
+.*:44: Warning: base register specified but zero
+.*:45: Warning: base register specified but zero
+.*:48: Warning: base register specified but zero
+.*:48: Warning: base register specified but zero
+.*:49: Warning: base register specified but zero
+.*:49: Warning: base register specified but zero
+.*:51: Warning: base register specified but zero
+.*:52: Warning: base register specified but zero
+.*:52: Warning: base register specified but zero
+.*:53: Warning: base register specified but zero
+.*:53: Warning: base register specified but zero
+.*:55: Warning: base register specified but zero
+.*:60: Warning: base register specified but zero
+.*:61: Warning: base register specified but zero
+.*:68: Warning: base register specified but zero
+.*:69: Warning: base register specified but zero
+.*:72: Warning: base register specified but zero
+.*:73: Warning: base register specified but zero
+.*:76: Warning: base register specified but zero
+.*:76: Warning: base register specified but zero
+.*:77: Warning: base register specified but zero
+.*:77: Warning: base register specified but zero
+.*:79: Warning: base register specified but zero
+.*:80: Warning: base register specified but zero
+.*:80: Warning: base register specified but zero
+.*:81: Warning: base register specified but zero
+.*:81: Warning: base register specified but zero
+.*:83: Warning: base register specified but zero
+.*:88: Warning: base register specified but zero
+.*:89: Warning: base register specified but zero
+.*:96: Warning: index register specified but zero
+.*:97: Warning: index register specified but zero
+.*:100: Warning: base register specified but zero
+.*:101: Warning: base register specified but zero
+.*:103: Warning: index register specified but zero
+.*:103: Warning: base register specified but zero
+.*:104: Warning: index register specified but zero
+.*:104: Warning: base register specified but zero
+.*:106: Warning: index register specified but zero
+.*:106: Warning: base register specified but zero
+.*:107: Warning: index register specified but zero
+.*:107: Warning: base register specified but zero
+.*:109: Warning: base register specified but zero
+.*:110: Warning: base register specified but zero
diff --git a/gas/testsuite/gas/s390/zarch-warn-areg-zero.s b/gas/testsuite/gas/s390/zarch-warn-areg-zero.s
new file mode 100644
index 000000000000..15c792d776fa
--- /dev/null
+++ b/gas/testsuite/gas/s390/zarch-warn-areg-zero.s
@@ -0,0 +1,116 @@
+.text
+foo:
+
+# D1(B1),I2
+ mvi 16(%r1),32
+ mvi 16(%r0),32
+ mvi 16(0),32
+# mvi 16(),32 # syntax error: empty parentheses
+ mvi 16,32
+ mvi 0,32
+ mvi 0,0
+
+# R1,D2(X2,B2)
+ a %r1,16(%r2,%r3)
+ a %r1,16(%r0,%r3)
+ a %r1,16(0,%r3)
+ a %r1,16(,%r3)
+ a %r1,16(%r3)
+ a %r1,16(%r2,%r0)
+ a %r1,16(%r2,0)
+# a %r1,16(%r2,) # syntax error: explicitly omitted base
+ a %r1,16(%r0,%r0)
+ a %r1,16(%r0,0)
+# a %r1,16(%r0,) # syntax error: explicitly omitted base
+ a %r1,16(0,%r0)
+ a %r1,16(0,0)
+# a %r1,16(0,) # syntax error: explicitly omitted base
+ a %r1,16(0,%r0)
+ a %r1,16(,%r0)
+ a %r1,16(,0)
+# a %r1,16(,) # syntax error: explicitly omitted index & base
+# a %r1,16() # syntax error: empty parentheses
+ a %r1,16
+ a %r1,0
+ a %r0,0
+ a 0,0
+
+# D1(L1,B1),D2(B2)
+ mvc 16(1,%r1),32(%r2)
+ mvc 16(1,%r0),32(%r2)
+ mvc 16(1,0),32(%r2)
+# mvc 16(1,),32(%r2) # syntax error: explicitly omitted base
+ mvc 16(1),32(%r2)
+ mvc 16(1,%r1),32(%r0)
+ mvc 16(1,%r1),32(0)
+# mvc 16(1,%r1),32() # syntax error: empty parentheses
+ mvc 16(1,%r1),32
+ mvc 16(1,%r0),32(%r0)
+ mvc 16(1,%r0),32(0)
+# mvc 16(1,%r0),32() # syntax error: empty parentheses
+ mvc 16(1,%r0),32
+ mvc 16(1,0),32(%r0)
+ mvc 16(1,0),32(0)
+# mvc 16(1,0),32() # syntax error: empty parentheses
+ mvc 16(1,0),32
+# mvc 16(1,),32(%r0) # syntax error: explicitly omitted base
+# mvc 16(1,),32(0) # syntax error: explicitly omitted base
+# mvc 16(1,),32() # syntax error: explicitly omitted base & empty parentheses
+# mvc 16(1,),32 # syntax error: explicitly omitted base
+ mvc 16(1),32(%r0)
+ mvc 16(1),32(0)
+# mvc 16(1),32() # syntax error: empty parentheses
+ mvc 16(1),32
+ mvc 0(1),0
+
+# D1(L1,B1),D2(L2,B2)
+ unpk 16(1,%r1),32(2,%r2)
+ unpk 16(1,%r0),32(2,%r2)
+ unpk 16(1,0),32(2,%r2)
+# unpk 16(1,),32(2,%r2) # syntax error: explicitly omitted base
+ unpk 16(1),32(2,%r2)
+ unpk 16(1,%r1),32(2,%r0)
+ unpk 16(1,%r1),32(2,0)
+# unpk 16(1,%r1),32(2,) # syntax error: explicitly omitted base
+ unpk 16(1,%r1),32(2)
+ unpk 16(1,%r0),32(2,%r0)
+ unpk 16(1,%r0),32(2,0)
+# unpk 16(1,%r0),32(2,) # syntax error: explicitly omitted base
+ unpk 16(1,%r0),32(2)
+ unpk 16(1,0),32(2,%r0)
+ unpk 16(1,0),32(2,0)
+# unpk 16(1,0),32(2,) # syntax error: explicitly omitted base
+ unpk 16(1,0),32(2)
+# unpk 16(1,),32(2,%r0) # syntax error: explicitly omitted base
+# unpk 16(1,),32(2,0) # syntax error: explicitly omitted base
+# unpk 16(1,),32(2,) # syntax error: explicitly omitted base
+# unpk 16(1,),32(2) # syntax error: explicitly omitted base
+ unpk 16(1),32(2,%r0)
+ unpk 16(1),32(2,0)
+# unpk 16(1),32(2,) # syntax error: explicitly omitted base
+ unpk 16(1),32(2)
+ unpk 0(1),0(2)
+
+# V1,D2(VX2,B2),M3
+ vgef %v1,16(%v2,%r3),0
+ vgef %v1,16(%v0,%r3),0
+ vgef %v1,16(0,%r3),0
+ vgef %v1,16(,%r3),0
+ vgef %v1,16(%r3),0
+ vgef %v1,16(%v2,%r0),0
+ vgef %v1,16(%v2,0),0
+# vgef %v1,16(%v2,),0 # syntax error: explicitly omitted base
+ vgef %v1,16(%v0,%r0),0
+ vgef %v1,16(%v0,0),0
+# vgef %v1,16(%v0,),0 # syntax error: explicitly omitted base
+ vgef %v1,16(0,%r0),0
+ vgef %v1,16(0,0),0
+# vgef %v1,16(0,),0 # syntax error: explicitly omitted base
+ vgef %v1,16(,%r0),0
+ vgef %v1,16(,0),0
+# vgef %v1,16(,),0 # syntax error: explicitly omitted index & base
+# vgef %v1,16(),0 # syntax error: empty parentheses
+ vgef %v1,16,0
+ vgef %v0,16,0
+ vgef 0,16,0
+ vgef 0,0,0
--
2.40.1
next prev parent reply other threads:[~2024-02-15 15:58 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-15 15:58 [PATCH 00/14] s390: Enhancements to working with addressing operands Jens Remus
2024-02-15 15:58 ` [PATCH 01/14] s390: Lower severity of assembler syntax errors from fatal to error Jens Remus
2024-02-15 15:58 ` [PATCH 02/14] s390: Enhance handling of syntax errors in assembler Jens Remus
2024-02-15 15:58 ` [PATCH 03/14] s390: Do not erroneously use base operand value for length operand Jens Remus
2024-02-15 15:58 ` [PATCH 04/14] s390: Correct setting of highgprs flag in ELF output Jens Remus
2024-02-15 15:58 ` [PATCH 05/14] s390: Assemble processor specific test cases for their processor Jens Remus
2024-02-15 15:58 ` [PATCH 06/14] s390: Add comments to assembler operand parsing logic Jens Remus
2024-02-15 15:58 ` [PATCH 07/14] s390: Add test cases for base/index register 0 Jens Remus
2024-02-15 15:58 ` Jens Remus [this message]
2024-02-15 15:58 ` [PATCH 09/14] s390: Revise s390-specific assembler option descriptions Jens Remus
2024-02-15 15:58 ` [PATCH 10/14] s390: Warn when register name type does not match operand Jens Remus
2024-02-15 15:58 ` [PATCH 11/14] s390: Print base register 0 as "0" in disassembly Jens Remus
2024-02-15 15:58 ` [PATCH 12/14] s390: Allow to explicitly omit base register operand in assembly Jens Remus
2024-02-15 15:58 ` [PATCH 13/14] s390: Provide operand number in assembler warning and error messages Jens Remus
2024-02-15 15:58 ` [PATCH 14/14] s390: Be more verbose about missing operand type Jens Remus
2024-03-01 12:24 ` [PATCH 00/14] s390: Enhancements to working with addressing operands Jens Remus
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