From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cam-smtp0.cambridge.arm.com (fw-tnat-cam5.arm.com [217.140.106.53]) by sourceware.org (Postfix) with ESMTPS id 8DD283858420 for ; Tue, 27 Feb 2024 11:00:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8DD283858420 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 8DD283858420 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.106.53 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1709031602; cv=none; b=udldMyGvfrp8+F/M1vAw+V4A6DPTt8BzV1ZXPmvxiov17NzCvyXLrwhEacPAdps3sxkdpIpLikzWGfLnBHrMlQJn2zCfOus1et+YCM3+rl7/J6vFkLgZGC0fPiAmDCDDsusqTs8Y06ShMnFvg0Gp/gt5VVjgCDKOOHdblTRypjI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1709031602; c=relaxed/simple; bh=yc1L6w4PqONnM1sJp4vdo5KNVq5eaG/ZL1Z78KnTHiM=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=VdDIlkNndB5RdmHMepEg4yeYDP+jkt/qPEeBKuUqiFOnS0FN9+75EFvcGAFWwdPdnzOeCDDHsHM2E8vXgX3k854CjgupIZOwTGq0IpbH14TLMektF6k6zaqa14S+wvaWMlY76/gYh49YimYPQaRZ12MmXr6VjgTdEqG4zCTn+B4= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from e129756.cambridge.arm.com (e129756.arm.com [10.2.78.55]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id 41RAxnZP030743; Tue, 27 Feb 2024 10:59:58 GMT From: Matthieu Longo To: binutils@sourceware.org Cc: Richard Earnshaw , Nick Clifton , Matthieu Longo Subject: [PATCH v1 1/4] aarch64: testsuite: replace instruction addresses by regex Date: Tue, 27 Feb 2024 10:59:14 +0000 Message-Id: <20240227105917.295899-2-matthieu.longo@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240227105917.295899-1-matthieu.longo@arm.com> References: <20240227105917.295899-1-matthieu.longo@arm.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------2.34.1" Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,KHOP_HELO_FCRDNS,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This is a multi-part message in MIME format. --------------2.34.1 Content-Type: text/plain; charset=UTF-8; format=fixed Content-Transfer-Encoding: 8bit This patch removes the instruction addresses from the objdump's expected output (.d files). The intended benefit from this clean-up is to allow to swap lines around more easilly, and removes the noise of patches that add, remove or reorder instructions. --- gas/testsuite/gas/aarch64/sysreg/sysreg.d | 56 +++++++++++------------ 1 file changed, 28 insertions(+), 28 deletions(-) --------------2.34.1 Content-Type: text/x-patch; name="v1-0001-aarch64-testsuite-replace-instruction-addresses-b.patch" Content-Transfer-Encoding: 8bit Content-Disposition: attachment; filename="v1-0001-aarch64-testsuite-replace-instruction-addresses-b.patch" diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg.d b/gas/testsuite/gas/aarch64/sysreg/sysreg.d index d10175837f2..90b5be3cabf 100644 --- a/gas/testsuite/gas/aarch64/sysreg/sysreg.d +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg.d @@ -5,31 +5,31 @@ Disassembly of section \.text: 0+ <.*>: - 0: d51b9c67 msr pmovsclr_el0, x7 - 4: d53b9c60 mrs x0, pmovsclr_el0 - 8: d51b9e67 msr pmovsset_el0, x7 - c: d53b9e60 mrs x0, pmovsset_el0 - 10: d5380140 mrs x0, id_dfr0_el1 - 14: d5380100 mrs x0, id_pfr0_el1 - 18: d5380120 mrs x0, id_pfr1_el1 - 1c: d5380160 mrs x0, id_afr0_el1 - 20: d5380180 mrs x0, id_mmfr0_el1 - 24: d53801a0 mrs x0, id_mmfr1_el1 - 28: d53801c0 mrs x0, id_mmfr2_el1 - 2c: d53801e0 mrs x0, id_mmfr3_el1 - 30: d53802c0 mrs x0, id_mmfr4_el1 - 34: d5380200 mrs x0, id_isar0_el1 - 38: d5380220 mrs x0, id_isar1_el1 - 3c: d5380240 mrs x0, id_isar2_el1 - 40: d5380260 mrs x0, id_isar3_el1 - 44: d5380280 mrs x0, id_isar4_el1 - 48: d53802a0 mrs x0, id_isar5_el1 - 4c: d538cf00 mrs x0, s3_0_c12_c15_0 - 50: d5384b00 mrs x0, s3_0_c4_c11_0 - 54: d5184b00 msr s3_0_c4_c11_0, x0 - 58: d5310300 mrs x0, trcstatr - 5c: d5110300 msr trcstatr, x0 - 60: d5380640 mrs x0, id_aa64isar2_el1 - 64: d538065e mrs x30, id_aa64isar2_el1 - 68: d5380660 mrs x0, id_aa64isar3_el1 - 6c: d538067e mrs x30, id_aa64isar3_el1 +.*: d51b9c67 msr pmovsclr_el0, x7 +.*: d53b9c60 mrs x0, pmovsclr_el0 +.*: d51b9e67 msr pmovsset_el0, x7 +.*: d53b9e60 mrs x0, pmovsset_el0 +.*: d5380140 mrs x0, id_dfr0_el1 +.*: d5380100 mrs x0, id_pfr0_el1 +.*: d5380120 mrs x0, id_pfr1_el1 +.*: d5380160 mrs x0, id_afr0_el1 +.*: d5380180 mrs x0, id_mmfr0_el1 +.*: d53801a0 mrs x0, id_mmfr1_el1 +.*: d53801c0 mrs x0, id_mmfr2_el1 +.*: d53801e0 mrs x0, id_mmfr3_el1 +.*: d53802c0 mrs x0, id_mmfr4_el1 +.*: d5380200 mrs x0, id_isar0_el1 +.*: d5380220 mrs x0, id_isar1_el1 +.*: d5380240 mrs x0, id_isar2_el1 +.*: d5380260 mrs x0, id_isar3_el1 +.*: d5380280 mrs x0, id_isar4_el1 +.*: d53802a0 mrs x0, id_isar5_el1 +.*: d538cf00 mrs x0, s3_0_c12_c15_0 +.*: d5384b00 mrs x0, s3_0_c4_c11_0 +.*: d5184b00 msr s3_0_c4_c11_0, x0 +.*: d5310300 mrs x0, trcstatr +.*: d5110300 msr trcstatr, x0 +.*: d5380640 mrs x0, id_aa64isar2_el1 +.*: d538065e mrs x30, id_aa64isar2_el1 +.*: d5380660 mrs x0, id_aa64isar3_el1 +.*: d538067e mrs x30, id_aa64isar3_el1 --------------2.34.1--