From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id A8FE43858C41 for ; Tue, 5 Mar 2024 11:35:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A8FE43858C41 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A8FE43858C41 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1709638563; cv=none; b=a2+fltYy2M+o8eE7F5/KEsgNC2O0/lvHBfvMG2RAqiYDHoqmPkH1B2/xySvAZWC3ncTy0DeZpqlSr6jaI5od5ISbvxwVhVEQSMgLGDyKKDC1Xi+dUEAjXQhDL7XkCd5BsTkYFVg9vglVuOWeogJa130U+apk1uhwcxzIPRcUFX4= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1709638563; c=relaxed/simple; bh=z++EQajjnfHOUW55QIF2DuLMOV/ONy4/uvRuvbEJM60=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=nC/mnuWednypATjxV2yeJ6MIcXoifdauQ5G1ORqqfVDKQvMT94e9c3lIxioDgDJBFjuzUSAivmJRL8kd26h83xzLEMJVUP04dH5IxGqD1ACFI1TFsiF+gf8wMW5n+K3YRJVrkUChid18O0njJ6zO7gHNXxDsj9R5bvPT8k1PFrE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.2.6.5]) by gateway (Coremail) with SMTP id _____8BxSOicA+dl8r8UAA--.32574S3; Tue, 05 Mar 2024 19:35:56 +0800 (CST) Received: from 5.5.5 (unknown [10.2.6.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8DxvhObA+dlxYdOAA--.22738S4; Tue, 05 Mar 2024 19:35:56 +0800 (CST) From: Lulu Cai To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lulu Cai Subject: [PATCH v1] LoongArch: Scan all illegal operand instructions without interruption Date: Tue, 5 Mar 2024 19:35:54 +0800 Message-Id: <20240305113554.3393481-1-cailulu@loongson.cn> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:AQAAf8DxvhObA+dlxYdOAA--.22738S4 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQAHB2Xm1+YCPgABsO X-Coremail-Antispam: 1Uk129KBj9fXoW3Zw1UKF13CFykXF4Dtw48Xwc_yoW8Wryfto Z5XasYv3W8JrWYga4rt3yUuFs8XFWrAFWIq343ua1qkw4UGFW8Za4Dtr1UZryfK3s5JrWD uFyqyr15XrW3Z3y5l-sFpf9Il3svdjkaLaAFLSUrUUUUbb8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrn0xqx4xG64xvF2IEw4CE5I8CrVC2j2Jv73VFW2AGmfu7bjvjm3AaLaJ3 UjIYCTnIWjp_UUUYj7kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI 8IcIk0rVWrJVCq3wAFIxvE14AKwVWUXVWUAwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xG Y2AK021l84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF7I0E14 v26r4j6F4UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AK xVWxJr0_GcWle2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27w Aqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE 14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x 0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E 7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcV C0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF 04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7 CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU8zwZ7UUUUU== X-Spam-Status: No, score=-13.2 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Currently, gas will exit immediately and report an error when it sees illegal operands, and will not process the remaining instructions. Replace as_fatal with as_bad to check for all illegal operands. Add test cases for illegal operands of some instructions. --- gas/config/tc-loongarch.c | 11 +- .../gas/loongarch/check_bstrins-pick.d | 18 +++ .../gas/loongarch/check_bstrins-pick.s | 9 ++ gas/testsuite/gas/loongarch/illegal-oprand.l | 113 +++++++++++++++++ gas/testsuite/gas/loongarch/illegal-oprand.s | 117 ++++++++++++++++++ gas/testsuite/gas/loongarch/loongarch.exp | 4 + gas/testsuite/gas/loongarch/lvz-lbt.d | 2 +- gas/testsuite/gas/loongarch/lvz-lbt.s | 2 +- 8 files changed, 269 insertions(+), 7 deletions(-) create mode 100644 gas/testsuite/gas/loongarch/check_bstrins-pick.d create mode 100644 gas/testsuite/gas/loongarch/check_bstrins-pick.s create mode 100644 gas/testsuite/gas/loongarch/illegal-oprand.l create mode 100644 gas/testsuite/gas/loongarch/illegal-oprand.s diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index de92366eda4..d76d7894657 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -946,8 +946,8 @@ check_this_insn_before_appending (struct loongarch_cl_insn *ip) /* For AMO insn amswap.[wd], amadd.[wd], etc. */ if (ip->args[0] != 0 && (ip->args[0] == ip->args[1] || ip->args[0] == ip->args[2])) - as_fatal (_("AMO insns require rd != base && rd != rt" - " when rd isn't $r0")); + as_bad (_("AMO insns require rd != rj && rd != rk" + " when rd isn't r0")); } else if ((ip->insn->mask == 0xffe08000 /* bstrins.w rd, rj, msbw, lsbw */ @@ -958,12 +958,13 @@ check_this_insn_before_appending (struct loongarch_cl_insn *ip) { /* For bstr(ins|pick).[wd]. */ if (ip->args[2] < ip->args[3]) - as_fatal (_("bstr(ins|pick).[wd] require msbd >= lsbd")); + as_bad (_("bstr(ins|pick).[wd] require msbd >= lsbd")); } else if (ip->insn->mask != 0 && (ip->insn_bin & 0xfe0003c0) == 0x04000000 /* csrxchg rd, rj, csr_num */ - && (strcmp ("csrxchg", ip->name) == 0)) - as_fatal (_("csrxchg require rj != $r0 && rj != $r1")); + && (strcmp ("csrxchg", ip->name) == 0 + || strcmp ("gcsrxchg", ip->name) == 0)) + as_bad (_("g?csrxchg require rj != r0 && rj != r1")); return ret; } diff --git a/gas/testsuite/gas/loongarch/check_bstrins-pick.d b/gas/testsuite/gas/loongarch/check_bstrins-pick.d new file mode 100644 index 00000000000..7575be1926e --- /dev/null +++ b/gas/testsuite/gas/loongarch/check_bstrins-pick.d @@ -0,0 +1,18 @@ +#as: +#objdump: -d +#skip: loongarch32-*-* + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 00682041 bstrins\.w \$ra, \$tp, 0x8, 0x8 + 4: 00882041 bstrins\.d \$ra, \$tp, 0x8, 0x8 + 8: 0068a041 bstrpick\.w \$ra, \$tp, 0x8, 0x8 + c: 00c82041 bstrpick\.d \$ra, \$tp, 0x8, 0x8 + 10: 00680041 bstrins\.w \$ra, \$tp, 0x8, 0x0 + 14: 00880041 bstrins\.d \$ra, \$tp, 0x8, 0x0 + 18: 00688041 bstrpick\.w \$ra, \$tp, 0x8, 0x0 + 1c: 00c80041 bstrpick\.d \$ra, \$tp, 0x8, 0x0 diff --git a/gas/testsuite/gas/loongarch/check_bstrins-pick.s b/gas/testsuite/gas/loongarch/check_bstrins-pick.s new file mode 100644 index 00000000000..0decaf98ea5 --- /dev/null +++ b/gas/testsuite/gas/loongarch/check_bstrins-pick.s @@ -0,0 +1,9 @@ +bstrins.w $r1,$r2,8,8 +bstrins.d $r1,$r2,8,8 +bstrpick.w $r1,$r2,8,8 +bstrpick.d $r1,$r2,8,8 + +bstrins.w $r1,$r2,8,0 +bstrins.d $r1,$r2,8,0 +bstrpick.w $r1,$r2,8,0 +bstrpick.d $r1,$r2,8,0 diff --git a/gas/testsuite/gas/loongarch/illegal-oprand.l b/gas/testsuite/gas/loongarch/illegal-oprand.l new file mode 100644 index 00000000000..e6553abe7b4 --- /dev/null +++ b/gas/testsuite/gas/loongarch/illegal-oprand.l @@ -0,0 +1,113 @@ +.*: Assembler messages: +.*:2: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:3: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:4: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:5: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:6: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:7: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:8: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:9: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:10: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:11: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:12: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:13: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:14: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:15: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:16: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:17: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:18: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:19: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:20: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:21: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:22: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:23: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:24: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:25: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:26: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:27: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:28: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:29: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:30: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:31: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:32: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:33: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:34: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:35: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:36: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:37: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:38: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:39: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:40: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:41: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:42: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:43: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:44: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:45: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:46: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:47: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:48: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:49: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:50: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:51: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:52: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:53: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:54: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:55: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:56: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:57: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:58: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:59: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:60: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:61: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:62: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:63: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:64: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:65: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:66: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:67: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:68: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:69: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:70: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:71: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:72: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:73: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:74: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:75: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:76: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:77: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:78: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:79: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:80: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:81: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:82: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:83: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:84: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:85: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:86: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:87: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:88: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:89: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:90: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:91: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:92: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:93: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:94: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:95: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:96: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:97: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:98: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:99: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:100: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:101: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:102: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:103: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:104: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:105: Error: AMO insns require rd != rj && rd != rk when rd isn't r0 +.*:108: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd +.*:109: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd +.*:110: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd +.*:111: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd +.*:114: Error: g\?csrxchg require rj != r0 && rj != r1 +.*:115: Error: g\?csrxchg require rj != r0 && rj != r1 +.*:116: Error: g\?csrxchg require rj != r0 && rj != r1 +.*:117: Error: g\?csrxchg require rj != r0 && rj != r1 diff --git a/gas/testsuite/gas/loongarch/illegal-oprand.s b/gas/testsuite/gas/loongarch/illegal-oprand.s new file mode 100644 index 00000000000..3860539d242 --- /dev/null +++ b/gas/testsuite/gas/loongarch/illegal-oprand.s @@ -0,0 +1,117 @@ +# Illegal operand of atomic memory access instruction. +amcas.b $r1,$r1,$r2 +amcas.b $r1,$r2,$r1 +amcas.h $r1,$r1,$r2 +amcas.h $r1,$r2,$r1 +amcas.w $r1,$r1,$r2 +amcas.w $r1,$r2,$r1 +amcas.d $r1,$r1,$r2 +amcas.d $r1,$r2,$r1 +amcas_db.b $r1,$r1,$r2 +amcas_db.b $r1,$r2,$r1 +amcas_db.h $r1,$r1,$r2 +amcas_db.h $r1,$r2,$r1 +amcas_db.w $r1,$r1,$r2 +amcas_db.w $r1,$r2,$r1 +amcas_db.d $r1,$r1,$r2 +amcas_db.d $r1,$r2,$r1 +amswap.b $r1,$r1,$r2 +amswap.b $r1,$r2,$r1 +amswap.h $r1,$r1,$r2 +amswap.h $r1,$r2,$r1 +amadd.b $r1,$r1,$r2 +amadd.b $r1,$r2,$r1 +amadd.h $r1,$r1,$r2 +amadd.h $r1,$r2,$r1 +amswap_db.b $r1,$r1,$r2 +amswap_db.b $r1,$r2,$r1 +amswap_db.h $r1,$r1,$r2 +amswap_db.h $r1,$r2,$r1 +amadd_db.b $r1,$r1,$r2 +amadd_db.b $r1,$r2,$r1 +amadd_db.h $r1,$r1,$r2 +amadd_db.h $r1,$r2,$r1 +amswap.w $r1,$r1,$r2 +amswap.w $r1,$r2,$r1 +amswap.d $r1,$r1,$r2 +amswap.d $r1,$r2,$r1 +amadd.w $r1,$r1,$r2 +amadd.w $r1,$r2,$r1 +amadd.d $r1,$r1,$r2 +amadd.d $r1,$r2,$r1 +amand.w $r1,$r1,$r2 +amand.w $r1,$r2,$r1 +amand.d $r1,$r1,$r2 +amand.d $r1,$r2,$r1 +amor.w $r1,$r1,$r2 +amor.w $r1,$r2,$r1 +amor.d $r1,$r1,$r2 +amor.d $r1,$r2,$r1 +amxor.w $r1,$r1,$r2 +amxor.w $r1,$r2,$r1 +amxor.d $r1,$r1,$r2 +amxor.d $r1,$r2,$r1 +ammax.w $r1,$r1,$r2 +ammax.w $r1,$r2,$r1 +ammax.d $r1,$r1,$r2 +ammax.d $r1,$r2,$r1 +ammin.w $r1,$r1,$r2 +ammin.w $r1,$r2,$r1 +ammin.d $r1,$r1,$r2 +ammin.d $r1,$r2,$r1 +ammax.wu $r1,$r1,$r2 +ammax.wu $r1,$r2,$r1 +ammax.du $r1,$r1,$r2 +ammax.du $r1,$r2,$r1 +ammin.wu $r1,$r1,$r2 +ammin.wu $r1,$r2,$r1 +ammin.du $r1,$r1,$r2 +ammin.du $r1,$r2,$r1 +amswap_db.w $r1,$r1,$r2 +amswap_db.w $r1,$r2,$r1 +amswap_db.d $r1,$r1,$r2 +amswap_db.d $r1,$r2,$r1 +amadd_db.w $r1,$r1,$r2 +amadd_db.w $r1,$r2,$r1 +amadd_db.d $r1,$r1,$r2 +amadd_db.d $r1,$r2,$r1 +amand_db.w $r1,$r1,$r2 +amand_db.w $r1,$r2,$r1 +amand_db.d $r1,$r1,$r2 +amand_db.d $r1,$r2,$r1 +amor_db.w $r1,$r1,$r2 +amor_db.w $r1,$r2,$r1 +amor_db.d $r1,$r1,$r2 +amor_db.d $r1,$r2,$r1 +amxor_db.w $r1,$r1,$r2 +amxor_db.w $r1,$r2,$r1 +amxor_db.d $r1,$r1,$r2 +amxor_db.d $r1,$r2,$r1 +ammax_db.w $r1,$r1,$r2 +ammax_db.w $r1,$r2,$r1 +ammax_db.d $r1,$r1,$r2 +ammax_db.d $r1,$r2,$r1 +ammin_db.w $r1,$r1,$r2 +ammin_db.w $r1,$r2,$r1 +ammin_db.d $r1,$r1,$r2 +ammin_db.d $r1,$r2,$r1 +ammax_db.wu $r1,$r1,$r2 +ammax_db.wu $r1,$r2,$r1 +ammax_db.du $r1,$r1,$r2 +ammax_db.du $r1,$r2,$r1 +ammin_db.wu $r1,$r1,$r2 +ammin_db.wu $r1,$r2,$r1 +ammin_db.du $r1,$r1,$r2 +ammin_db.du $r1,$r2,$r1 + +# Illegal operand of bstr(ins|pick).[wd] +bstrins.w $r1,$r2,0,8 +bstrins.d $r1,$r2,0,8 +bstrpick.w $r1,$r2,0,8 +bstrpick.d $r1,$r2,0,8 + +# Illegal operand of csrxchg/gcsrxchg +csrxchg $r0,$r0,1 +csrxchg $r0,$r1,1 +gcsrxchg $r0,$r0,1 +gcsrxchg $r0,$r1,1 diff --git a/gas/testsuite/gas/loongarch/loongarch.exp b/gas/testsuite/gas/loongarch/loongarch.exp index 422b858917e..8a7c9c141a5 100644 --- a/gas/testsuite/gas/loongarch/loongarch.exp +++ b/gas/testsuite/gas/loongarch/loongarch.exp @@ -32,4 +32,8 @@ if [istarget loongarch*-*-*] { run_list_test "align" run_list_test "reg-s9" + + if [istarget loongarch64-*-*] { + run_list_test "illegal-oprand" + } } diff --git a/gas/testsuite/gas/loongarch/lvz-lbt.d b/gas/testsuite/gas/loongarch/lvz-lbt.d index f89707762dc..760066a023a 100644 --- a/gas/testsuite/gas/loongarch/lvz-lbt.d +++ b/gas/testsuite/gas/loongarch/lvz-lbt.d @@ -10,7 +10,7 @@ Disassembly of section .text: 00000000.* <.text>: [ ]*0:[ ]*05000400[ ]*gcsrrd[ ]*\$zero,[ ]*0x1[ ]* [ ]*4:[ ]*05000420[ ]*gcsrwr[ ]*\$zero,[ ]*0x1[ ]* -[ ]*8:[ ]*05000420[ ]*gcsrwr[ ]*\$zero,[ ]*0x1[ ]* +[ ]*8:[ ]*05000440[ ]*gcsrxchg[ ]*\$zero,[ ]*\$tp,[ ]*0x1[ ]* [ ]*c:[ ]*06482401[ ]*gtlbflush[ ]* [ ]*10:[ ]*002b8001[ ]*hvcl[ ]*0x1[ ]* [ ]*14:[ ]*00000820[ ]*movgr2scr[ ]*\$scr0,[ ]*\$ra[ ]* diff --git a/gas/testsuite/gas/loongarch/lvz-lbt.s b/gas/testsuite/gas/loongarch/lvz-lbt.s index 64469a4362d..2e5089e4e5d 100644 --- a/gas/testsuite/gas/loongarch/lvz-lbt.s +++ b/gas/testsuite/gas/loongarch/lvz-lbt.s @@ -1,6 +1,6 @@ gcsrrd $r0, 1 gcsrwr $r0, 1 -gcsrxchg $r0, $r1, 1 +gcsrxchg $r0, $r2, 1 gtlbflush hvcl 1 movgr2scr $scr0, $r1 -- 2.36.0