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From: "Cui, Lili" <lili.cui@intel.com>
To: binutils@sourceware.org
Cc: hjl.tools@gmail.com, jbeulich@suse.com
Subject: [PATCH 2/3] Add check for 8-bit old registers in EVEX format
Date: Mon, 20 May 2024 14:22:01 +0800	[thread overview]
Message-ID: <20240520062202.1297234-3-lili.cui@intel.com> (raw)
In-Reply-To: <20240520062202.1297234-1-lili.cui@intel.com>

Since APX supports EVEX from legacy instructions, we need to check
the 8-bit old registers in EVEX format. and adjusted the test case results.

gas/ChangeLog:

        * config/tc-i386.c (md_assemble): Add invalid check for old byte
        registers in EVEX/VEX format.
        * testsuite/gas/i386/x86-64-apx-inval.l: Add new test.
        * testsuite/gas/i386/x86-64-apx-inval.s: Ditto.
---
 gas/config/tc-i386.c                      | 6 +++---
 gas/testsuite/gas/i386/rex-bad.l          | 8 ++++----
 gas/testsuite/gas/i386/x86-64-apx-inval.l | 3 +++
 gas/testsuite/gas/i386/x86-64-apx-inval.s | 2 ++
 4 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 2fbd90bedb8..5606049c054 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4311,10 +4311,10 @@ static void establish_rex (void)
       && !is_apx_rex2_encoding () && !is_any_vex_encoding (&i.tm) && !i.rex)
     i.rex |= REX_OPCODE;
 
-  /* For REX/REX2 prefix instructions, we need to convert old registers
+  /* For REX/REX2/EVEX prefix instructions, we need to convert old registers
      (AL, CL, DL and BL) to new ones (AXL, CXL, DXL and BXL) and report bad
      for AH, CH, DH and BH.  */
-  if (i.rex || i.rex2)
+  if (i.rex || i.rex2 || i.tm.opcode_modifier.evex)
     {
       for (unsigned int x = first; x <= last; x++)
 	{
@@ -4326,7 +4326,7 @@ static void establish_rex (void)
 	      /* In case it is "hi" register, give up.  */
 	      if (i.op[x].regs->reg_num > 3)
 		as_bad (_("can't encode register '%s%s' in an "
-			  "instruction requiring REX/REX2 prefix"),
+			  "instruction requiring REX/REX2/EVEX prefix"),
 			register_prefix, i.op[x].regs->reg_name);
 
 	      /* Otherwise it is equivalent to the extended register.
diff --git a/gas/testsuite/gas/i386/rex-bad.l b/gas/testsuite/gas/i386/rex-bad.l
index abd4d3045d0..100eda558b7 100644
--- a/gas/testsuite/gas/i386/rex-bad.l
+++ b/gas/testsuite/gas/i386/rex-bad.l
@@ -3,8 +3,8 @@
 .*:5: Error: same .*
 .*:6: Error: same .*
 .*:7: Error: same .*
-.*:9: Error: .* REX/REX2 .*
-.*:10: Error: .* REX/REX2 .*
-.*:12: Error: .* REX/REX2 .*
-.*:13: Error: .* REX/REX2 .*
+.*:9: Error: .* REX/REX2/EVEX .*
+.*:10: Error: .* REX/REX2/EVEX .*
+.*:12: Error: .* REX/REX2/EVEX .*
+.*:13: Error: .* REX/REX2/EVEX .*
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-apx-inval.l b/gas/testsuite/gas/i386/x86-64-apx-inval.l
index 7a870b27b72..4948c520481 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-inval.l
+++ b/gas/testsuite/gas/i386/x86-64-apx-inval.l
@@ -12,3 +12,6 @@
 .*:13: Error: \{nf\} unsupported for `mulx'
 .*:14: Error: \{nf\} cannot be combined with \{vex\}/\{vex3\}
 .*:15: Error: \{nf\} cannot be combined with \{vex\}/\{vex3\}
+.*:16: Error: can't encode register '%ah' in an instruction requiring REX/REX2/EVEX prefix
+.*:17: Error: can't encode register '%ah' in an instruction requiring REX/REX2/EVEX prefix
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-apx-inval.s b/gas/testsuite/gas/i386/x86-64-apx-inval.s
index 0487b885ec8..3d69deabe4d 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-inval.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-inval.s
@@ -13,3 +13,5 @@
 	{nf} mulx %r15,%r15,%r11
 	{nf} {vex} bextr %ecx, %edx, %r10d
 	{vex} {nf} bextr %ecx, %edx, %r10d
+	{nf} add %dl,%ah
+	{evex} adc %dl,%ah
-- 
2.34.1


  parent reply	other threads:[~2024-05-20  6:22 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-20  6:21 [PATCH 0/3] Support APX zero-upper Cui, Lili
2024-05-20  6:22 ` [PATCH 1/3] x86: Split REX/REX2 old registers judgment Cui, Lili
2024-05-21 12:18   ` Jan Beulich
2024-05-22  1:33     ` Cui, Lili
2024-05-22  5:49       ` Jan Beulich
2024-05-22  6:11         ` Cui, Lili
2024-05-22  6:22           ` Jan Beulich
2024-05-20  6:22 ` Cui, Lili [this message]
2024-05-21 12:24   ` [PATCH 2/3] Add check for 8-bit old registers in EVEX format Jan Beulich
2024-05-22  2:20     ` Cui, Lili
2024-05-20  6:22 ` [PATCH 3/3] Support APX zero-upper Cui, Lili
2024-05-22  6:21   ` Jan Beulich
2024-05-22  8:05     ` Cui, Lili

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