From: Matthieu Longo <matthieu.longo@arm.com>
To: <binutils@sourceware.org>
Cc: Richard Earnshaw <richard.earnshaw@arm.com>,
Nick Clifton <nickc@redhat.com>,
Matthieu Longo <matthieu.longo@arm.com>
Subject: [PATCH v0 01/13] aarch64: make comment clearer about the location
Date: Mon, 8 Jul 2024 13:34:40 +0100 [thread overview]
Message-ID: <20240708123452.1883314-2-matthieu.longo@arm.com> (raw)
In-Reply-To: <20240708123452.1883314-1-matthieu.longo@arm.com>
[-- Attachment #1: Type: text/plain, Size: 439 bytes --]
The enum aarch64_opnd_qualifiers in include/opcode/aarch64.h needs to
stay in sync with the array of struct operand_qualifier_data which
defines various properties for the different type of operands. For
instance, for:
- registers: the size of the register, the number of elements.
- immediates: lower and upper bits to determine the range of values.
---
include/opcode/aarch64.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: v0-0001-aarch64-make-comment-clearer-about-the-location.patch --]
[-- Type: text/x-patch; name="v0-0001-aarch64-make-comment-clearer-about-the-location.patch", Size: 545 bytes --]
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index dfed0a509b2..756d4295ccd 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -890,7 +890,8 @@ enum aarch64_opnd
/* Qualifier constrains an operand. It either specifies a variant of an
operand type or limits values available to an operand type.
- N.B. Order is important; keep aarch64_opnd_qualifiers synced. */
+ N.B. Order is important.
+ Keep aarch64_opnd_qualifiers (opcodes/aarch64-opc.c) synced. */
enum aarch64_opnd_qualifier
{
next prev parent reply other threads:[~2024-07-08 12:35 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-08 12:34 [PATCH v0 00/13] aarch64: add instructions for Armv9.5-A PAC enhancement Matthieu Longo
2024-07-08 12:34 ` Matthieu Longo [this message]
2024-07-08 12:34 ` [PATCH v0 02/13] aarch64: constify unchanged char* arguments Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 03/13] aarch64: change returned type to bool to match semantic of functions Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 04/13] aarch64: improve debuggability on array of enum Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 05/13] aarch64: remove redundant register type R_N Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 06/13] aarch64: testsuite: remove hard-coded instruction addresses Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 07/13] aarch64: refactor binary approach for RA signing method to make it extendable Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 08/13] aarch64: add PAuth_LR instructions belonging to NOP space Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 09/13] aarch64: add pauth-lr feature option for Armv9.5-A PAC enhancements Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 10/13] aarch64: add PAuth_LR instructions with no or one-register operand Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 11/13] aarch64: add flag OPD_F_UNSIGNED to distinguish signedness of immediate operands Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 12/13] aarch64: add PAuth_LR instructions with imm16 operand Matthieu Longo
2024-07-08 12:34 ` [PATCH v0 13/13] aarch64: add DWARF CFI directive for PAuth_LR Matthieu Longo
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