From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jeffrey A Law <law@cygnus.com>
To: binutils@sourceware.cygnus.com
Subject: Another minor tc-arm.c patch
Date: Wed, 27 Oct 1999 19:56:00 -0000
Message-id: <22781.941078722@upchuck>
X-SW-Source: 1999-10/msg00151.html

This patch adds a "variants" field to the thumb opcode structure and
initializes it for all the thumb opcodes.  This change makes the
thumb opcode table work more like the arm opcode table and gives us
the potential to handle thumb instructions that are specific to a
particular ISA in the future.

This work was done by Don Lindsay.

	* config/tc-arm.c (thumb_opcode): Add "variants" field.
	(tinsns): Initialize variants field.

Index: tc-arm.c
===================================================================
RCS file: /cvs/binutils/binutils/gas/config/tc-arm.c,v
retrieving revision 1.23
diff -c -3 -p -r1.23 tc-arm.c
*** tc-arm.c	1999/10/27 22:52:35	1.23
--- tc-arm.c	1999/10/28 02:52:12
*************** struct thumb_opcode 
*** 770,837 ****
    CONST char *  template;	/* Basic string to match */
    unsigned long value;		/* Basic instruction code */
    int           size;
    void (*       parms) PARAMS ((char *));  /* Function to call to parse args 
*/
  };
  
  static CONST struct thumb_opcode tinsns[] =
  {
!   {"adc",	0x4140,		2,	do_t_arit},
!   {"add",	0x0000,		2,	do_t_add},
!   {"and",	0x4000,		2,	do_t_arit},
!   {"asr",	0x0000,		2,	do_t_asr},
!   {"b",		T_OPCODE_BRANCH, 2,	do_t_branch12},
!   {"beq",	0xd0fe,		2,	do_t_branch9},
!   {"bne",	0xd1fe,		2,	do_t_branch9},
!   {"bcs",	0xd2fe,		2,	do_t_branch9},
!   {"bhs",	0xd2fe,		2,	do_t_branch9},
!   {"bcc",	0xd3fe,		2,	do_t_branch9},
!   {"bul",	0xd3fe,		2,	do_t_branch9},
!   {"blo",	0xd3fe,		2,	do_t_branch9},
!   {"bmi",	0xd4fe,		2,	do_t_branch9},
!   {"bpl",	0xd5fe,		2,	do_t_branch9},
!   {"bvs",	0xd6fe,		2,	do_t_branch9},
!   {"bvc",	0xd7fe,		2,	do_t_branch9},
!   {"bhi",	0xd8fe,		2,	do_t_branch9},
!   {"bls",	0xd9fe,		2,	do_t_branch9},
!   {"bge",	0xdafe,		2,	do_t_branch9},
!   {"blt",	0xdbfe,		2,	do_t_branch9},
!   {"bgt",	0xdcfe,		2,	do_t_branch9},
!   {"ble",	0xddfe,		2,	do_t_branch9},
!   {"bic",	0x4380,		2,	do_t_arit},
!   {"bl",	0xf7fffffe,	4,	do_t_branch23},
!   {"bx",	0x4700,		2,	do_t_bx},
!   {"cmn",	T_OPCODE_CMN,	2,	do_t_arit},
!   {"cmp",	0x0000,		2,	do_t_compare},
!   {"eor",	0x4040,		2,	do_t_arit},
!   {"ldmia",	0xc800,		2,	do_t_ldmstm},
!   {"ldr",	0x0000,		2,	do_t_ldr},
!   {"ldrb",	0x0000,		2,	do_t_ldrb},
!   {"ldrh",	0x0000,		2,	do_t_ldrh},
!   {"ldrsb",	0x5600,		2,	do_t_lds},
!   {"ldrsh",	0x5e00,		2,	do_t_lds},
!   {"ldsb",	0x5600,		2,	do_t_lds},
!   {"ldsh",	0x5e00,		2,	do_t_lds},
!   {"lsl",	0x0000,		2,	do_t_lsl},
!   {"lsr",	0x0000,		2,	do_t_lsr},
!   {"mov",	0x0000,		2,	do_t_mov},
!   {"mul",	T_OPCODE_MUL,	2,	do_t_arit},
!   {"mvn",	T_OPCODE_MVN,	2,	do_t_arit},
!   {"neg",	T_OPCODE_NEG,	2,	do_t_arit},
!   {"orr",	0x4300,		2,	do_t_arit},
!   {"pop",	0xbc00,		2,	do_t_push_pop},
!   {"push",	0xb400,		2,	do_t_push_pop},
!   {"ror",	0x41c0,		2,	do_t_arit},
!   {"sbc",	0x4180,		2,	do_t_arit},
!   {"stmia",	0xc000,		2,	do_t_ldmstm},
!   {"str",	0x0000,		2,	do_t_str},
!   {"strb",	0x0000,		2,	do_t_strb},
!   {"strh",	0x0000,		2,	do_t_strh},
!   {"swi",	0xdf00,		2,	do_t_swi},
!   {"sub",	0x0000,		2,	do_t_sub},
!   {"tst",	T_OPCODE_TST,	2,	do_t_arit},
    /* Pseudo ops: */
!   {"adr",       0x0000,         2,      do_t_adr},
!   {"nop",       0x46C0,         2,      do_t_nop},      /* mov r8,r8 */
  };
  
  struct reg_entry
--- 770,838 ----
    CONST char *  template;	/* Basic string to match */
    unsigned long value;		/* Basic instruction code */
    int           size;
+   unsigned long          variants;    /* Which CPU variants this exists for 
*/
    void (*       parms) PARAMS ((char *));  /* Function to call to parse args 
*/
  };
  
  static CONST struct thumb_opcode tinsns[] =
  {
!   {"adc",	0x4140,		2,	ARM_THUMB, do_t_arit},
!   {"add",	0x0000,		2,	ARM_THUMB, do_t_add},
!   {"and",	0x4000,		2,	ARM_THUMB, do_t_arit},
!   {"asr",	0x0000,		2,	ARM_THUMB, do_t_asr},
!   {"b",		T_OPCODE_BRANCH, 2,	ARM_THUMB, do_t_branch12},
!   {"beq",	0xd0fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bne",	0xd1fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bcs",	0xd2fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bhs",	0xd2fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bcc",	0xd3fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bul",	0xd3fe,		2,	ARM_THUMB, do_t_branch9},
!   {"blo",	0xd3fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bmi",	0xd4fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bpl",	0xd5fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bvs",	0xd6fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bvc",	0xd7fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bhi",	0xd8fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bls",	0xd9fe,		2,	ARM_THUMB, do_t_branch9},
!   {"bge",	0xdafe,		2,	ARM_THUMB, do_t_branch9},
!   {"blt",	0xdbfe,		2,	ARM_THUMB, do_t_branch9},
!   {"bgt",	0xdcfe,		2,	ARM_THUMB, do_t_branch9},
!   {"ble",	0xddfe,		2,	ARM_THUMB, do_t_branch9},
!   {"bic",	0x4380,		2,	ARM_THUMB, do_t_arit},
!   {"bl",	0xf7fffffe,	4,	ARM_THUMB, do_t_branch23},
!   {"bx",	0x4700,		2,	ARM_THUMB, do_t_bx},
!   {"cmn",	T_OPCODE_CMN,	2,	ARM_THUMB, do_t_arit},
!   {"cmp",	0x0000,		2,	ARM_THUMB, do_t_compare},
!   {"eor",	0x4040,		2,	ARM_THUMB, do_t_arit},
!   {"ldmia",	0xc800,		2,	ARM_THUMB, do_t_ldmstm},
!   {"ldr",	0x0000,		2,	ARM_THUMB, do_t_ldr},
!   {"ldrb",	0x0000,		2,	ARM_THUMB, do_t_ldrb},
!   {"ldrh",	0x0000,		2,	ARM_THUMB, do_t_ldrh},
!   {"ldrsb",	0x5600,		2,	ARM_THUMB, do_t_lds},
!   {"ldrsh",	0x5e00,		2,	ARM_THUMB, do_t_lds},
!   {"ldsb",	0x5600,		2,	ARM_THUMB, do_t_lds},
!   {"ldsh",	0x5e00,		2,	ARM_THUMB, do_t_lds},
!   {"lsl",	0x0000,		2,	ARM_THUMB, do_t_lsl},
!   {"lsr",	0x0000,		2,	ARM_THUMB, do_t_lsr},
!   {"mov",	0x0000,		2,	ARM_THUMB, do_t_mov},
!   {"mul",	T_OPCODE_MUL,	2,	ARM_THUMB, do_t_arit},
!   {"mvn",	T_OPCODE_MVN,	2,	ARM_THUMB, do_t_arit},
!   {"neg",	T_OPCODE_NEG,	2,	ARM_THUMB, do_t_arit},
!   {"orr",	0x4300,		2,	ARM_THUMB, do_t_arit},
!   {"pop",	0xbc00,		2,	ARM_THUMB, do_t_push_pop},
!   {"push",	0xb400,		2,	ARM_THUMB, do_t_push_pop},
!   {"ror",	0x41c0,		2,	ARM_THUMB, do_t_arit},
!   {"sbc",	0x4180,		2,	ARM_THUMB, do_t_arit},
!   {"stmia",	0xc000,		2,	ARM_THUMB, do_t_ldmstm},
!   {"str",	0x0000,		2,	ARM_THUMB, do_t_str},
!   {"strb",	0x0000,		2,	ARM_THUMB, do_t_strb},
!   {"strh",	0x0000,		2,	ARM_THUMB, do_t_strh},
!   {"swi",	0xdf00,		2,	ARM_THUMB, do_t_swi},
!   {"sub",	0x0000,		2,	ARM_THUMB, do_t_sub},
!   {"tst",	T_OPCODE_TST,	2,	ARM_THUMB, do_t_arit},
    /* Pseudo ops: */
!   {"adr",       0x0000,         2,      ARM_THUMB, do_t_adr},
!   {"nop",       0x46C0,         2,      ARM_THUMB, do_t_nop},      /* mov 
r8,r8 */
  };
  
  struct reg_entry