public inbox for binutils@sourceware.org
 help / color / mirror / Atom feed
From: Saurabh Jha <saurabh.jha@arm.com>
To: binutils@sourceware.org, Richard Earnshaw <richard.earnshaw@arm.com>
Subject: Re: [PATCH v3 2/2] gas, aarch64: Add SVE2 lut extension
Date: Tue, 21 May 2024 14:05:10 +0100	[thread overview]
Message-ID: <26aa5180-8965-459c-935c-1694cdae6f83@arm.com> (raw)
In-Reply-To: <dbd4d972-61ee-413c-9338-8c1c67784f26@arm.com>

On 5/21/2024 1:33 PM, Saurabh Jha wrote:
> Introduces instructions for the SVE2 lut extension for AArch64. They are 
> documented in the following links:
> * luti2: 
> https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions/LUTI2--Lookup-table-read-with-2-bit-indices-?lang=en
> * luti4: 
> https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions/LUTI4--Lookup-table-read-with-4-bit-indices-?lang=en
> 
> These instructions use new SVE2 vector operands. They are called
> SVE_Zm1_23_INDEX, SVE_Zm2_22_INDEX, and Zm3_12_INDEX and they have
> 1 bit, 2 bit, and 3 bit indices respectively.
> 
> For these new operands, we defined a new inserter and a new extractor.
> 
> The lsb and width of these new operands are the same as many existing
> operands but the convention is to give different names to fields that
> serve different purpose so we introduced new fields in aarch64-opc.c
> and aarch64-opc.h.
> 
> We made a design choice for the second operand of the halfword variant of
> luti4 with two register tables. We could have either defined a new operand,
> like SVE_Znx2, or we could have use the existing operand SVE_ZnxN. With
> the new operand, we would need to implement constraints on register
> lists based on either operand or opcode flag. With existing operand, we
> could just existing constraint checks using opcode flag. We chose
> the second approach and went with SVE_ZnxN and added opcode flag to
> enforce lengths of vector register list operands. This way, we can reuse
> the existing constraint check logic.
> ---
> Hi,
> 
> Regression tested for aarch64-none-elf and found no regressions.
> 
> Ok for binutils-master? I don't have commit access so can someone please 
> commit on my behalf?
> 
> Regards,
> Saurabh
Unfortunately, I missed a failing test case in this patch of the series. 
I have sent a new patch series and the patch corresponding to this one 
is here: https://sourceware.org/pipermail/binutils/2024-May/134198.html

      reply	other threads:[~2024-05-21 13:05 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-21 12:33 Saurabh Jha
2024-05-21 13:05 ` Saurabh Jha [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=26aa5180-8965-459c-935c-1694cdae6f83@arm.com \
    --to=saurabh.jha@arm.com \
    --cc=binutils@sourceware.org \
    --cc=richard.earnshaw@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).