From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id B4E253896C0B for ; Fri, 21 Jun 2024 14:18:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B4E253896C0B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B4E253896C0B Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718979515; cv=none; b=dqJHemKbLUnzbBVWD4JGvkUPpx7MArE5cENiFjS9yZ5yLk5UldhCU535Aiff3ir0viwTUcYQYexdOORYhD2zA6ij2eAoW7wJF2ULMNKVqXmzpcpAAEnjupaEQQjxSHUp8nfizdAfWozWfUcl3CwwaSkoXVKRw2Nqi1kvlDr+yOQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718979515; c=relaxed/simple; bh=vZhPlgxy2sQJrr+87llJudYHiZxruTWnbaKhZ/a6Yp8=; h=Message-ID:Date:MIME-Version:Subject:To:From; b=Soa18n/WvnCHpmM5PHHNEl+LxOieo1Big7w+/1wzZr1pHXeTAw//5l5DKFNvYnOQUtEa1neHx9ZmHVpaX7E5nqPtAW8aiZ22gc1rF8uQmbzfeHKLh//NfI5MFRtFI+c8o8HGRISYQ96UPtGn9RhxRsAto6o5Y73+XD5qDcLOe9c= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 24761DA7; Fri, 21 Jun 2024 07:18:58 -0700 (PDT) Received: from [10.2.78.57] (e120077-lin.cambridge.arm.com [10.2.78.57]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CFF1B3F6A8; Fri, 21 Jun 2024 07:18:32 -0700 (PDT) Message-ID: <27008804-e350-4cb8-89e3-5b3ef037f7da@arm.com> Date: Fri, 21 Jun 2024 15:18:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/2] gas, aarch64: Add SME2 lutv2 extension To: saurabh.jha@arm.com, binutils@sourceware.org Cc: nickc@redhat.com References: <20240614141353.1287038-1-saurabh.jha@arm.com> Content-Language: en-GB From: "Richard Earnshaw (lists)" In-Reply-To: <20240614141353.1287038-1-saurabh.jha@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3491.1 required=5.0 tests=BAYES_00,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 14/06/2024 15:13, saurabh.jha@arm.com wrote: > > Introduces instructions for the SME2 lutv2 extension for AArch64. They > are documented in the following links: > > * https://developer.arm.com/documentation/ddi0602/2024-03/SME-Instructions/LUTI4--four-registers--8-bit---Lookup-table-read-with-4-bit-indexes-and-8-bit-elements-?lang=en > * https://developer.arm.com/documentation/ddi0602/2024-03/SME-Instructions/MOVT--vector-to-table---Move-vector-register-to-ZT0-?lang=en > > For both luti4 instructions, we introduced an operand called > SME_Znx2_BIT_INDEX. We use the existing function parse_vector_reg_list > for parsing but modified that function so that it can accept operands > without qualifiers and rejects instructions that have operands with > qualifiers but are not supposed to have operands with qualifiers. > For disassembly, we modified print_register_list so that it could > accept register lists without qualifiers. > > For one luti4 instruction, we introduced a SME_Zdnx4_STRIDED. It is > similar to SME_Ztx4_STRIDED and we could use existing code for parsing, > encoding, and disassembly. > > For movt instruction, we introduced an operand called SME_ZT0_INDEX2_12. > This is a ZT0 register with a bit index encoded in [13:12]. It is > similar to SME_ZT0_INDEX. > > We also introduced an iclass named sme_size_12_b so that we can encode > size bits [13:12] correctly when only 'b' is allowed as qualifier. > --- > Hi, > > Regression tested for aarch64-none-elf and found no regressions. > > Ok for binutils-master? I don't have commit access so can someone please > commit on my behalf? > > Regards, > Saurabh > --- > gas/NEWS | 2 + > gas/config/tc-aarch64.c | 91 +++++++++++++++++- > gas/doc/c-aarch64.texi | 2 + > gas/testsuite/gas/aarch64/sme2-8-invalid.l | 14 +-- > gas/testsuite/gas/aarch64/sme2-lutv2-bad.d | 3 + > gas/testsuite/gas/aarch64/sme2-lutv2-bad.l | 15 +++ > .../gas/aarch64/sme2-lutv2-illegal.d | 3 + > .../gas/aarch64/sme2-lutv2-illegal.l | 70 ++++++++++++++ > .../gas/aarch64/sme2-lutv2-illegal.s | 95 +++++++++++++++++++ > gas/testsuite/gas/aarch64/sme2-lutv2.d | 24 +++++ > gas/testsuite/gas/aarch64/sme2-lutv2.s | 22 +++++ > include/opcode/aarch64.h | 6 ++ > opcodes/aarch64-asm.c | 1 + > opcodes/aarch64-dis.c | 6 ++ > opcodes/aarch64-opc.c | 30 +++++- > opcodes/aarch64-opc.h | 2 + > opcodes/aarch64-tbl.h | 33 +++++++ > 17 files changed, 405 insertions(+), 14 deletions(-) > create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-bad.d > create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-bad.l > create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-illegal.d > create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l > create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2-illegal.s > create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2.d > create mode 100644 gas/testsuite/gas/aarch64/sme2-lutv2.s > --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c + if (!skip_past_comma(str)) + return true; + + if (!parse_shift(str, operand, mode)) + return false; + case AARCH64_OPND_SME_ZT0_INDEX2_12: + po_misc_or_fail(parse_shifter_zt0_with_bit_index Space after function name before open parenthesis. There may be other instances of this that I haven't recorded here, please can you double check? Apart from that, this looks OK. R.