From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 0E5E73858C83 for ; Tue, 29 Nov 2022 01:18:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0E5E73858C83 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 6DEBE300089; Tue, 29 Nov 2022 01:18:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1669684726; bh=bWZ/qAhCSY7N3F6ECbzERNmr0M4StBLHohP+IvKyi8Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=TTG61c6eWaLb3REIyOHeJq1PtXWBwDvQmEkatwXonQYitBprZMPG482hw8TFzwt6q S6OWai0qwlzBIZDrbVzndgyJ9Myy4as2QV1j5YTVwMs0HjTuDroMpFdBbRLgnoLnzN 2JNtX2x8BUInD52a5vC59YcS577zLQPT0PrLc25s= From: Tsukasa OI To: Tsukasa OI Cc: binutils@sourceware.org Subject: [REVIEW ONLY 1/1] UNRATIFIED RISC-V: Add 'Svadu' extension Date: Tue, 29 Nov 2022 01:18:15 +0000 Message-Id: <29f89ef04335561879d14d9cdb8e1e9a550bc811.1669684692.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Tsukasa OI [DO NOT MERGE] Until 'Svadu' extension is frozen/ratified and final version number is determined, this patch should not be merged upstream. This commit uses unratified version 0.1 as in the documentation (instead of possible 1.0 after ratification). This commit implements support for 'Svadu' extension. Because it does not add any instructions or CSRs (but adds bits to existing CSRs), this commit adds extension name support and implication to the 'Zicsr' extension. This is based on "Hardware Updating of PTE A/D Bits (Svadu)" version 0.1, stable . bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets): Add implication from 'Svadu' to 'Zicsr'. (riscv_supported_std_s_ext) Add 'Svadu'. --- bfd/elfxx-riscv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 0bcf2fdcfa34..826f248f88c4 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1108,6 +1108,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] = {"sscofpmf", "zicsr", check_implicit_always}, {"ssstateen", "zicsr", check_implicit_always}, {"sstc", "zicsr", check_implicit_always}, + {"svadu", "zicsr", check_implicit_always}, {NULL, NULL, NULL} }; @@ -1230,6 +1231,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] = {"sscofpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"ssstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"sstc", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"svadu", ISA_SPEC_CLASS_DRAFT, 0, 1, 0 }, {"svinval", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"svnapot", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"svpbmt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, -- 2.38.1