From: Lulu Cai <cailulu@loongson.cn>
To: Fangrui Song <i@maskray.me>
Cc: binutils@sourceware.org, xuchenghua@loongson.cn,
chenglulu@loongson.cn, liuzhensong@loongson.cn,
mengqinggang@loongson.cn, xry111@xry111.site,
i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn,
wanglei@loongson.cn, hejinyang@loongson.cn
Subject: Re: [PATCH v5 0/5] Add support for TLS Descriptors (TLSDESC)
Date: Sat, 27 Jan 2024 15:26:39 +0800 [thread overview]
Message-ID: <2f3cc40c-b7fb-c432-677d-d9719d8fe827@loongson.cn> (raw)
In-Reply-To: <DS7PR12MB5765A6FBD6297BAEDB57FF6CCB782@DS7PR12MB5765.namprd12.prod.outlook.com>
On 1/27/24 10:54 AM, Fangrui Song wrote:
> On Fri, Dec 22, 2023 at 3:42 AM Lulu Cai <cailulu@loongson.cn> wrote:
>> v5 mainly changes the relocation name and adds relocation
>> for immediate value field of ld.w/d.
>>
>> 1. R_LARCH_TLS_DESC_ADD_PC_LO12 -> R_LARCH_TLS_DESC_PC_LO12.
>> R_LARCH_TLS_DESC_LD(113) -> R_LARCH_TLS_DESC_LD(119)
>>
>> 2. Added 32 abs test case.
>>
>> 3. Added R_LARCH_TLS_DESC_LD relocation to the immediate field of
>> the ld.w/d instruction.
>>
>> Such as:
>> pcalau12i $r4,%desc_pc_hi20(var)
>> addi.d $r4,$r4,%desc_pc_lo12(var)
>> ld.d $r1,$r4,0 -> ld.d $r1,$r4,%desc_ld(var)
>> jirl $r1,$r1,%desc_call(var)
>> addi.d $a0,$a0,$tp
>>
>> Lulu Cai (4):
>> LoongArch: Add new relocs and macro for TLSDESC.
>> LoongArch: Add support for TLSDESC in ld.
>> LoongArch: Add tls transition support.
>> LoongArch: Add testsuit for DESC and tls transition and tls
>> relaxation.
>>
>> mengqinggang (1):
>> LoongArch: Add support for TLS LD/GD/DESC relaxation
>>
>> bfd/bfd-in2.h | 15 +
>> bfd/elfnn-loongarch.c | 552 +++++++++++++++++-
>> bfd/elfxx-loongarch.c | 270 ++++++++-
>> bfd/libbfd.h | 15 +
>> bfd/reloc.c | 36 ++
>> gas/config/tc-loongarch.c | 20 +-
>> gas/testsuite/gas/loongarch/macro_op.d | 128 ++--
>> gas/testsuite/gas/loongarch/macro_op_32.d | 120 ++--
>> .../gas/loongarch/macro_op_large_abs.d | 160 ++---
>> .../gas/loongarch/macro_op_large_pc.d | 160 ++---
>> gas/testsuite/gas/loongarch/tlsdesc_32.d | 28 +
>> gas/testsuite/gas/loongarch/tlsdesc_32.s | 12 +
>> gas/testsuite/gas/loongarch/tlsdesc_32_abs.d | 26 +
>> gas/testsuite/gas/loongarch/tlsdesc_32_abs.s | 8 +
>> gas/testsuite/gas/loongarch/tlsdesc_64.d | 28 +
>> gas/testsuite/gas/loongarch/tlsdesc_64.s | 12 +
>> .../gas/loongarch/tlsdesc_large_abs.d | 34 ++
>> .../gas/loongarch/tlsdesc_large_abs.s | 12 +
>> .../gas/loongarch/tlsdesc_large_pc.d | 38 ++
>> .../gas/loongarch/tlsdesc_large_pc.s | 17 +
>> include/elf/loongarch.h | 26 +-
>> include/opcode/loongarch.h | 6 +
>> ld/testsuite/ld-loongarch-elf/desc-ie.d | 16 +
>> ld/testsuite/ld-loongarch-elf/desc-ie.s | 18 +
>> ld/testsuite/ld-loongarch-elf/desc-le.d | 15 +
>> ld/testsuite/ld-loongarch-elf/desc-le.s | 14 +
>> ld/testsuite/ld-loongarch-elf/desc-norelax.d | 16 +
>> ld/testsuite/ld-loongarch-elf/desc-norelax.s | 5 +
>> ld/testsuite/ld-loongarch-elf/desc-relax.d | 15 +
>> ld/testsuite/ld-loongarch-elf/desc-relax.s | 5 +
>> ld/testsuite/ld-loongarch-elf/ie-le.d | 13 +
>> ld/testsuite/ld-loongarch-elf/ie-le.s | 11 +
>> .../ld-loongarch-elf/ld-loongarch-elf.exp | 9 +
>> ld/testsuite/ld-loongarch-elf/macro_op.d | 391 +++++++------
>> ld/testsuite/ld-loongarch-elf/macro_op_32.d | 120 ++--
>> ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d | 56 ++
>> ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s | 65 +++
>> opcodes/loongarch-opc.c | 54 ++
>> 38 files changed, 1980 insertions(+), 566 deletions(-)
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.d
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.s
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.d
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.s
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.d
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.s
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.d
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.s
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.d
>> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.s
>> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.d
>> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.s
>> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.d
>> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.s
>> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.d
>> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.s
>> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.d
>> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.s
>> create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.d
>> create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.s
>> create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d
>> create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s
>>
>> --
>> 2.43.0
>>
> Technically you could define R_LARCH_TLS_DESC to be shared by 32-bit
> and 64-bit arches, like RELATIVE/IRELATIVE/JUMP_SLOT.
> That said, I see that the change has been made.
Yes that's totally fine. The main reason here is because other TLS types of
dynamic relocation have 32-bit and 64-bit, so DESC is distinguished.
> It seems that la.tls.desc expands to 4 instructions with 2
> R_LARCH_RELAX relocations?
> I think one R_LARCH_RELAX is sufficient to implement relaxation.
>
> RISC-V has a similar problem and I have suggested
> https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/421
This is done because the current psABI stipulates that the instruction
to be deleted must be followed by an R_LARCH_RELAX relocation.
In the future, we will try to implement la.tls.desc with four instructions
using only one R_LARCH_RELAX implementation.
next prev parent reply other threads:[~2024-01-27 7:26 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-22 11:42 Lulu Cai
2023-12-22 11:42 ` [PATCH v5 1/5] LoongArch: Add new relocs and macro for TLSDESC Lulu Cai
2023-12-22 11:42 ` [PATCH v5 2/5] LoongArch: Add support for TLSDESC in ld Lulu Cai
2023-12-28 14:54 ` Tatsuyuki Ishi
2023-12-29 10:24 ` Lulu Cai
2023-12-22 11:42 ` [PATCH v5 3/5] LoongArch: Add tls transition support Lulu Cai
2023-12-28 14:42 ` Tatsuyuki Ishi
2023-12-29 10:31 ` Lulu Cai
2023-12-22 11:42 ` [PATCH v5 4/5] LoongArch: Add support for TLS LD/GD/DESC relaxation Lulu Cai
2023-12-28 14:38 ` Tatsuyuki Ishi
2023-12-29 10:36 ` Lulu Cai
2023-12-29 10:45 ` Lulu Cai
2024-01-07 23:00 ` Tatsuyuki Ishi
2024-01-08 0:22 ` Fangrui Song
[not found] ` <DS7PR12MB5765D250CD96B4F6EF6674BACB6B2@DS7PR12MB5765.namprd12.prod.outlook.com>
2024-01-08 6:00 ` Lulu Cai
2024-01-08 7:59 ` Tatsuyuki Ishi
2024-01-27 2:54 ` [PATCH v5 0/5] Add support for TLS Descriptors (TLSDESC) Fangrui Song
[not found] ` <DS7PR12MB5765A6FBD6297BAEDB57FF6CCB782@DS7PR12MB5765.namprd12.prod.outlook.com>
2024-01-27 7:26 ` Lulu Cai [this message]
2024-01-27 19:18 ` Fangrui Song
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