* [committed] RISC-V: Make g imply zmmul extension.
@ 2022-09-16 1:39 Nelson Chu
2022-09-16 2:33 ` Jeff Law
0 siblings, 1 reply; 6+ messages in thread
From: Nelson Chu @ 2022-09-16 1:39 UTC (permalink / raw)
To: binutils; +Cc: nelson
bfd/
* elfxx-riscv.c (riscv_implicit_subset): Moved entry of m after g,
so that g can imply zmmul.
gas/
* testsuite/gas/riscv/attribute-01.d: Updated.
* testsuite/gas/riscv/attribute-02.d: Likewise.
* testsuite/gas/riscv/attribute-03.d: Likewise.
* testsuite/gas/riscv/attribute-04.d: Likewise.
* testsuite/gas/riscv/attribute-05.d: Likewise.
* testsuite/gas/riscv/attribute-10.d: Likewise.
* testsuite/gas/riscv/march-imply-g.d: Likewise.
* testsuite/gas/riscv/march-imply-unsupported.d: Likewise.
---
bfd/elfxx-riscv.c | 2 +-
gas/testsuite/gas/riscv/attribute-01.d | 2 +-
gas/testsuite/gas/riscv/attribute-02.d | 2 +-
gas/testsuite/gas/riscv/attribute-03.d | 2 +-
gas/testsuite/gas/riscv/attribute-04.d | 2 +-
gas/testsuite/gas/riscv/attribute-05.d | 2 +-
gas/testsuite/gas/riscv/attribute-10.d | 2 +-
gas/testsuite/gas/riscv/march-imply-g.d | 2 +-
gas/testsuite/gas/riscv/march-imply-unsupported.d | 2 +-
9 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 8cb3c8d4930..e03b312a381 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1039,7 +1039,6 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"e", "i", check_implicit_always},
{"i", "zicsr", check_implicit_for_i},
{"i", "zifencei", check_implicit_for_i},
- {"m", "zmmul", check_implicit_always},
{"g", "i", check_implicit_always},
{"g", "m", check_implicit_always},
{"g", "a", check_implicit_always},
@@ -1047,6 +1046,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"g", "d", check_implicit_always},
{"g", "zicsr", check_implicit_always},
{"g", "zifencei", check_implicit_always},
+ {"m", "zmmul", check_implicit_always},
{"q", "d", check_implicit_always},
{"v", "d", check_implicit_always},
{"v", "zve64d", check_implicit_always},
diff --git a/gas/testsuite/gas/riscv/attribute-01.d b/gas/testsuite/gas/riscv/attribute-01.d
index 2e19e09abf2..612305765ab 100644
--- a/gas/testsuite/gas/riscv/attribute-01.d
+++ b/gas/testsuite/gas/riscv/attribute-01.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"
diff --git a/gas/testsuite/gas/riscv/attribute-02.d b/gas/testsuite/gas/riscv/attribute-02.d
index 45b89f2d62d..324fd9f2171 100644
--- a/gas/testsuite/gas/riscv/attribute-02.d
+++ b/gas/testsuite/gas/riscv/attribute-02.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0_xargle2p0"
diff --git a/gas/testsuite/gas/riscv/attribute-03.d b/gas/testsuite/gas/riscv/attribute-03.d
index 11416d63d25..6e1c2fbc592 100644
--- a/gas/testsuite/gas/riscv/attribute-03.d
+++ b/gas/testsuite/gas/riscv/attribute-03.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0_xfoo3p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0_xargle2p0_xfoo3p0"
diff --git a/gas/testsuite/gas/riscv/attribute-04.d b/gas/testsuite/gas/riscv/attribute-04.d
index 408464d01ce..f64494a798d 100644
--- a/gas/testsuite/gas/riscv/attribute-04.d
+++ b/gas/testsuite/gas/riscv/attribute-04.d
@@ -3,4 +3,4 @@
#source: attribute-04.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"
diff --git a/gas/testsuite/gas/riscv/attribute-05.d b/gas/testsuite/gas/riscv/attribute-05.d
index 247f52e0ed8..9507b43976d 100644
--- a/gas/testsuite/gas/riscv/attribute-05.d
+++ b/gas/testsuite/gas/riscv/attribute-05.d
@@ -4,7 +4,7 @@
Attribute Section: riscv
File Attributes
Tag_RISCV_stack_align: 16-bytes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"
Tag_RISCV_unaligned_access: Unaligned access
Tag_RISCV_priv_spec: 1
Tag_RISCV_priv_spec_minor: 9
diff --git a/gas/testsuite/gas/riscv/attribute-10.d b/gas/testsuite/gas/riscv/attribute-10.d
index 30b82d72073..f46692275f1 100644
--- a/gas/testsuite/gas/riscv/attribute-10.d
+++ b/gas/testsuite/gas/riscv/attribute-10.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0"
+ Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zmmul1p0"
diff --git a/gas/testsuite/gas/riscv/march-imply-g.d b/gas/testsuite/gas/riscv/march-imply-g.d
index 33a243d78d7..239b717fd7f 100644
--- a/gas/testsuite/gas/riscv/march-imply-g.d
+++ b/gas/testsuite/gas/riscv/march-imply-g.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0"
+ Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0_zmmul1p0"
diff --git a/gas/testsuite/gas/riscv/march-imply-unsupported.d b/gas/testsuite/gas/riscv/march-imply-unsupported.d
index 2e19e09abf2..612305765ab 100644
--- a/gas/testsuite/gas/riscv/march-imply-unsupported.d
+++ b/gas/testsuite/gas/riscv/march-imply-unsupported.d
@@ -3,4 +3,4 @@
#source: empty.s
Attribute Section: riscv
File Attributes
- Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+ Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"
--
2.37.0 (Apple Git-136)
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [committed] RISC-V: Make g imply zmmul extension.
2022-09-16 1:39 [committed] RISC-V: Make g imply zmmul extension Nelson Chu
@ 2022-09-16 2:33 ` Jeff Law
2022-09-16 3:26 ` Nelson Chu
2022-09-16 18:28 ` Tsukasa OI
0 siblings, 2 replies; 6+ messages in thread
From: Jeff Law @ 2022-09-16 2:33 UTC (permalink / raw)
To: binutils
On 9/15/22 19:39, Nelson Chu wrote:
> bfd/
> * elfxx-riscv.c (riscv_implicit_subset): Moved entry of m after g,
> so that g can imply zmmul.
> gas/
> * testsuite/gas/riscv/attribute-01.d: Updated.
> * testsuite/gas/riscv/attribute-02.d: Likewise.
> * testsuite/gas/riscv/attribute-03.d: Likewise.
> * testsuite/gas/riscv/attribute-04.d: Likewise.
> * testsuite/gas/riscv/attribute-05.d: Likewise.
> * testsuite/gas/riscv/attribute-10.d: Likewise.
> * testsuite/gas/riscv/march-imply-g.d: Likewise.
> * testsuite/gas/riscv/march-imply-unsupported.d: Likewise.
Does this happen to fix this kind of failure that started showing up a
week or two ago?
/tmp/ccdAErP7.s:6522: Error: unrecognized opcode `mul a5,a4,a5',
extension `m' or `zmmul' required
I started chasing it down and concluded it likely wasn't the compiler,
but couldn't take it further before covid knocked me out. I'm just
starting to try and catch up on things today...
jeff
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [committed] RISC-V: Make g imply zmmul extension.
2022-09-16 2:33 ` Jeff Law
@ 2022-09-16 3:26 ` Nelson Chu
2022-09-16 3:30 ` Jeff Law
2022-09-16 4:17 ` Jeff Law
2022-09-16 18:28 ` Tsukasa OI
1 sibling, 2 replies; 6+ messages in thread
From: Nelson Chu @ 2022-09-16 3:26 UTC (permalink / raw)
To: Jeff Law; +Cc: binutils
On Fri, Sep 16, 2022 at 10:34 AM Jeff Law via Binutils
<binutils@sourceware.org> wrote:
>
>
> On 9/15/22 19:39, Nelson Chu wrote:
> > bfd/
> > * elfxx-riscv.c (riscv_implicit_subset): Moved entry of m after g,
> > so that g can imply zmmul.
> > gas/
> > * testsuite/gas/riscv/attribute-01.d: Updated.
> > * testsuite/gas/riscv/attribute-02.d: Likewise.
> > * testsuite/gas/riscv/attribute-03.d: Likewise.
> > * testsuite/gas/riscv/attribute-04.d: Likewise.
> > * testsuite/gas/riscv/attribute-05.d: Likewise.
> > * testsuite/gas/riscv/attribute-10.d: Likewise.
> > * testsuite/gas/riscv/march-imply-g.d: Likewise.
> > * testsuite/gas/riscv/march-imply-unsupported.d: Likewise.
>
> Does this happen to fix this kind of failure that started showing up a
> week or two ago?
>
> /tmp/ccdAErP7.s:6522: Error: unrecognized opcode `mul a5,a4,a5',
> extension `m' or `zmmul' required
I get the same error message if I just assemble files with
-march=rv32/64g, or just use the default rv64g arch setting. I
remember gcc should always pass the expanded imafd for g to assembler,
so the errors won't happen. This error should only happen when we set
g for architecture string. Hope the patch can fix the problem you
mentioned, it seems like the same as what I meet.
> I started chasing it down and concluded it likely wasn't the compiler,
> but couldn't take it further before covid knocked me out. I'm just
> starting to try and catch up on things today...
>
Glad to hear you recovered :)
Nelson
>
> jeff
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [committed] RISC-V: Make g imply zmmul extension.
2022-09-16 3:26 ` Nelson Chu
@ 2022-09-16 3:30 ` Jeff Law
2022-09-16 4:17 ` Jeff Law
1 sibling, 0 replies; 6+ messages in thread
From: Jeff Law @ 2022-09-16 3:30 UTC (permalink / raw)
To: Nelson Chu; +Cc: binutils
On 9/15/22 21:26, Nelson Chu wrote:
> On Fri, Sep 16, 2022 at 10:34 AM Jeff Law via Binutils
> <binutils@sourceware.org> wrote:
>>
>> On 9/15/22 19:39, Nelson Chu wrote:
>>> bfd/
>>> * elfxx-riscv.c (riscv_implicit_subset): Moved entry of m after g,
>>> so that g can imply zmmul.
>>> gas/
>>> * testsuite/gas/riscv/attribute-01.d: Updated.
>>> * testsuite/gas/riscv/attribute-02.d: Likewise.
>>> * testsuite/gas/riscv/attribute-03.d: Likewise.
>>> * testsuite/gas/riscv/attribute-04.d: Likewise.
>>> * testsuite/gas/riscv/attribute-05.d: Likewise.
>>> * testsuite/gas/riscv/attribute-10.d: Likewise.
>>> * testsuite/gas/riscv/march-imply-g.d: Likewise.
>>> * testsuite/gas/riscv/march-imply-unsupported.d: Likewise.
>> Does this happen to fix this kind of failure that started showing up a
>> week or two ago?
>>
>> /tmp/ccdAErP7.s:6522: Error: unrecognized opcode `mul a5,a4,a5',
>> extension `m' or `zmmul' required
> I get the same error message if I just assemble files with
> -march=rv32/64g, or just use the default rv64g arch setting. I
> remember gcc should always pass the expanded imafd for g to assembler,
> so the errors won't happen. This error should only happen when we set
> g for architecture string. Hope the patch can fix the problem you
> mentioned, it seems like the same as what I meet.
In that case I'll just fire up the riscv64 bootstrap-in-chroot job and
check on it in the morning. If it's still failing, then I'll start
debugging again now that I'm out of the covid brain-fog.
>
>> I started chasing it down and concluded it likely wasn't the compiler,
>> but couldn't take it further before covid knocked me out. I'm just
>> starting to try and catch up on things today...
>>
> Glad to hear you recovered :)
Not fully, but I feel a hell of a lot better today than I did yesterday!
jeff
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [committed] RISC-V: Make g imply zmmul extension.
2022-09-16 3:26 ` Nelson Chu
2022-09-16 3:30 ` Jeff Law
@ 2022-09-16 4:17 ` Jeff Law
1 sibling, 0 replies; 6+ messages in thread
From: Jeff Law @ 2022-09-16 4:17 UTC (permalink / raw)
To: Nelson Chu; +Cc: binutils
On 9/15/22 21:26, Nelson Chu wrote:
> On Fri, Sep 16, 2022 at 10:34 AM Jeff Law via Binutils
> <binutils@sourceware.org> wrote:
>>
>> On 9/15/22 19:39, Nelson Chu wrote:
>>> bfd/
>>> * elfxx-riscv.c (riscv_implicit_subset): Moved entry of m after g,
>>> so that g can imply zmmul.
>>> gas/
>>> * testsuite/gas/riscv/attribute-01.d: Updated.
>>> * testsuite/gas/riscv/attribute-02.d: Likewise.
>>> * testsuite/gas/riscv/attribute-03.d: Likewise.
>>> * testsuite/gas/riscv/attribute-04.d: Likewise.
>>> * testsuite/gas/riscv/attribute-05.d: Likewise.
>>> * testsuite/gas/riscv/attribute-10.d: Likewise.
>>> * testsuite/gas/riscv/march-imply-g.d: Likewise.
>>> * testsuite/gas/riscv/march-imply-unsupported.d: Likewise.
>> Does this happen to fix this kind of failure that started showing up a
>> week or two ago?
>>
>> /tmp/ccdAErP7.s:6522: Error: unrecognized opcode `mul a5,a4,a5',
>> extension `m' or `zmmul' required
> I get the same error message if I just assemble files with
> -march=rv32/64g, or just use the default rv64g arch setting. I
> remember gcc should always pass the expanded imafd for g to assembler,
> so the errors won't happen. This error should only happen when we set
> g for architecture string. Hope the patch can fix the problem you
> mentioned, it seems like the same as what I meet.
Just to follow-up. That seemed to fix the problem. The build is
already well past where it was failing before.
Thanks!
jeff
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [committed] RISC-V: Make g imply zmmul extension.
2022-09-16 2:33 ` Jeff Law
2022-09-16 3:26 ` Nelson Chu
@ 2022-09-16 18:28 ` Tsukasa OI
1 sibling, 0 replies; 6+ messages in thread
From: Tsukasa OI @ 2022-09-16 18:28 UTC (permalink / raw)
To: Jeff Law, binutils; +Cc: Nelson Chu
On 2022/09/16 11:33, Jeff Law via Binutils wrote:
>
> On 9/15/22 19:39, Nelson Chu wrote:
>> bfd/
>> * elfxx-riscv.c (riscv_implicit_subset): Moved entry of m after g,
>> so that g can imply zmmul.
>> gas/
>> * testsuite/gas/riscv/attribute-01.d: Updated.
>> * testsuite/gas/riscv/attribute-02.d: Likewise.
>> * testsuite/gas/riscv/attribute-03.d: Likewise.
>> * testsuite/gas/riscv/attribute-04.d: Likewise.
>> * testsuite/gas/riscv/attribute-05.d: Likewise.
>> * testsuite/gas/riscv/attribute-10.d: Likewise.
>> * testsuite/gas/riscv/march-imply-g.d: Likewise.
>> * testsuite/gas/riscv/march-imply-unsupported.d: Likewise.
>
> Does this happen to fix this kind of failure that started showing up a
> week or two ago?
>
> /tmp/ccdAErP7.s:6522: Error: unrecognized opcode `mul a5,a4,a5',
> extension `m' or `zmmul' required
>
> I started chasing it down and concluded it likely wasn't the compiler,
> but couldn't take it further before covid knocked me out. I'm just
> starting to try and catch up on things today...
Oh no. I apologize for a severe regression caused by my patchset
implementing 'Zmmul'.
I inspected the riscv_implicit_subsets array (that Nelson fixed "m")
myself and found that only anomaly is "g" (there is a good reason for
this and is harmless). So I believe that his patch fixed all extension
dependency issues so far.
Tsukasa
>
>
> jeff
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-09-16 18:29 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2022-09-16 1:39 [committed] RISC-V: Make g imply zmmul extension Nelson Chu
2022-09-16 2:33 ` Jeff Law
2022-09-16 3:26 ` Nelson Chu
2022-09-16 3:30 ` Jeff Law
2022-09-16 4:17 ` Jeff Law
2022-09-16 18:28 ` Tsukasa OI
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