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From: Jan Beulich <jbeulich@suse.com>
To: Branislav Brzak <Branislav.Brzak@Syrmia.com>
Cc: Dragoslav Sicarov <Dragoslav.Sicarov@Syrmia.com>,
	Djordje Todorovic <Djordje.Todorovic@syrmia.com>,
	"binutils@sourceware.org" <binutils@sourceware.org>
Subject: Re: [PATCH 0/1] riscv: Ensure LE instruction fetching
Date: Tue, 20 Jun 2023 13:44:46 +0200	[thread overview]
Message-ID: <32850550-cb52-039e-73ef-77227f425f3a@suse.com> (raw)
In-Reply-To: <AM6PR03MB49848E63E54AAB7B7C0D80E4985CA@AM6PR03MB4984.eurprd03.prod.outlook.com>

On 20.06.2023 13:43, Branislav Brzak wrote:
> Currently riscv gdb code looks at arch byte order
> when fetching instructions. This works when the
> target is LE, but on BE arch it will byte swap the
> instruction, while the riscv spec defines all
> instructions are LE encoded regardless of
> system memory endianess.
> 
> Branislav Brzak (1):
> gdb/riscv: Ensure LE instruction fetching
> 
> gdb/riscv-tdep.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)

Looks like you meant to send this to gdb-patches@sourceware.org?

Jan

  reply	other threads:[~2023-06-20 11:44 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-20 11:43 Branislav Brzak
2023-06-20 11:44 ` Jan Beulich [this message]
2023-06-20 11:46   ` Branislav Brzak

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