From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2068.outbound.protection.outlook.com [40.107.22.68]) by sourceware.org (Postfix) with ESMTPS id 136ED3858C60 for ; Mon, 24 Jul 2023 08:44:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 136ED3858C60 Authentication-Results: sourceware.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=suse.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=jqgLV/UvGGJdOLJIXjYbdfyW7RcKRWDJj2IkBMEpKvYoGP/2E4SLTPGtwC03RcOkm2dmJZ8pU40n+PgQ8IKmechbgbTYcdscy4MyR3IVCsMTkZeqAnqD4SjQoPNOCORd0xCxUkcYSYm+3D3EQWbN9VKuE+hQkmKs4sz4BfKMudV44wq1VHx5qdmbyM2nlzZtmRYT7ZvDFdPsk9qe6FkhsiPX4uEBVRrqjdIjudwaXZxeMprAuEkg+1lp86RF4QSSXm+bifGXy3HW2q6o9Uzz4qvcGtBdRI+WsoYIg1smXvwc6i0OpYe974FScFhdk1IDvQezE3cmmWj3cHxSK92PAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=DJ8wP8ze0s3bWmIuvBXJRFtmNudIB+F/DGzec0hRzDo=; b=QFrqs2z3yEnBrUxj791VPl7KgUip1Myk1SUaGSg6HqGB4HJzDe2Z/1a/FlNdNE1xs7boCasnvcqRyw8Epw5/JUTIW9gwj4bREa+D5Fc0XGhIRNjOSifWjABjAZXvha3tT5yU99LS2CizBcOFfcfI7iMRNVyprSP21zb0LKaZasyHuCGmz6ziSGiMYHjw8iG2sz62knVx6+yPQnQfhINuXG4xo/mCIqFB66KCLCgNeo/t2iTnNYFdJDKUHVzVizpBbqsv+qL3HjuB7XHxra5DaG9bbr0H8RWGEbtpXUzF/6cVXzLKW1JaFhzs91txMoMzUqmUUeueY6P4VTELFtgKWw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=DJ8wP8ze0s3bWmIuvBXJRFtmNudIB+F/DGzec0hRzDo=; b=fcVdwEQOGm9Hq24UqSlh+dQpSEO+BPMcZM2dWswaU+RAGq3Pd9CKBGprHNpi4ymB4tR5fl5x73Q55jpBRq7uuSBciSt3u21i1fc0bQQmVv2UYzE8gl9S3Sn+UByPK1pB6CIIFrTWQWregUsgctIjwLqYMbO3X2X2iIGZ/Ss80vD+ZGC/Gb0TJ8tOaZLKbQxhNBePioqGXoXAIpSAUxqM88rp95QwASri6/7xzuj7n1GCYOMSDrcdgH/KlbE2H4M1/s6MsCWcWjkFZxzB5S3J/VqELxUsDWG74qphyBQuZsx0ArSKuQAKGMcoWGg2tZ3JnNMAw4OB+rfCCYxCgOlxtg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com; Received: from DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) by AM0PR04MB6770.eurprd04.prod.outlook.com (2603:10a6:208:187::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6609.32; Mon, 24 Jul 2023 08:44:03 +0000 Received: from DU2PR04MB8790.eurprd04.prod.outlook.com ([fe80::e5cf:5743:ab60:b14e]) by DU2PR04MB8790.eurprd04.prod.outlook.com ([fe80::e5cf:5743:ab60:b14e%5]) with mapi id 15.20.6609.031; Mon, 24 Jul 2023 08:44:03 +0000 Message-ID: <33134021-c20c-bec7-6f89-5297f0fede7a@suse.com> Date: Mon, 24 Jul 2023 10:44:03 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH] RISC-V: Add 'Zacas' extension instructions Content-Language: en-US To: Jiawei Cc: nelson@rivosinc.com, kito.cheng@sifive.com, palmer@dabbelt.com, christoph.muellner@vrull.eu, wuwei2016@iscas.ac.cn, shihua@iscas.ac.cn, shiyulong@iscas.ac.cn, chenyixuan@iscas.ac.cn, binutils@sourceware.org References: <20230724074904.637833-1-jiawei@iscas.ac.cn> From: Jan Beulich In-Reply-To: <20230724074904.637833-1-jiawei@iscas.ac.cn> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-ClientProxiedBy: FR3P281CA0162.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:a2::14) To DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8790:EE_|AM0PR04MB6770:EE_ X-MS-Office365-Filtering-Correlation-Id: c33076bd-5105-4b95-b78b-08db8c22223c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: QfIwTYXhxmS1RpnmtJtG8B4xAPPtPHpxn+8QVVVT3woImsugQK0MI8KRneLGJWlA4DX/ITw4C4fKh0AcnOkFvGDbx+HqGgSL87CVMNTIvHWtjT+cBjvLMS/LNYtzdO/B5soqDB6S/f/rDyIK0ZWS/V8yPjoG48G/8iu67cfeyvbeRgGslkQk27yMATREL6o1HiCDyB3S/gSnbxBOtzacb27bOhO3mJuPBxurn4qEQ2p9cdiQdA71xFVnazTXGa5AkF42ICDZMb3Qh599BXQ93VbXU3SwgyMFwZcu0dA5FegMFNzOYhmJi6KAi26a7YkMP5jhpRDGXF12Vu9w5ZUQAZaANPuTZoMW3jVY63DW35UFGlMTUZKjgi1uKtZiULpi9kYQUIsrSR7P+hCnLE9W3gCAGzTskmDLNQXqxStXXRl6ZhiKxXeXWBIlgw8RDIwsfvsNianCNrhZbHgpjZYvA0yEjuCfRkcWE4jCKOAvhdPHjzaemsB1fTVwC1QGyW7+Y9MYsKuSJGyDhmgTbJYpoxkCfA4yBn1eN4G+Xm46DdtA/PtO/WfghXQEYlek7Cqi388kYJfnd7x0dC7JKz8N/FmwJaVnuN+w4t0hwwxwPaljYc3RuWOJOKM7kGqZiPfF X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DU2PR04MB8790.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230028)(136003)(396003)(376002)(346002)(39860400002)(366004)(451199021)(5660300002)(7416002)(316002)(8936002)(8676002)(41300700001)(31686004)(2906002)(66556008)(66476007)(66946007)(26005)(53546011)(6506007)(38100700002)(86362001)(6512007)(966005)(31696002)(6486002)(4326008)(6916009)(478600001)(2616005)(186003)(36756003)(43740500002)(45980500001);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?c1I3VVhNbmRUeTY2RVlET1YvRmdJV3ZNRmtBZmV2eDNnc3pJeitWOTlhcVZy?= =?utf-8?B?L0RYZFZ5cjJ5Mk9mWUswL083YTVGOHlWSnhVaTdWTUEraW1VdEJlMnhOU1FT?= =?utf-8?B?RHNyMlowcGRTTG0rVWFaeVpIa1prdWZzajRicGFjWUc1SHNBWHdOTDN2c3ZQ?= =?utf-8?B?V29yVzI3dmlDSzQ4a1A1cktvaHZEa1JmaXQyRG9JUTJyV0tLdEpTbGFGVVQ2?= =?utf-8?B?V0Q3SFlsbmJFa0hwdGlMNVdpRGd6TWJ5RW5KY09HOGNtWU5kUDRkc004YjAw?= =?utf-8?B?bXdnV1V2L2tEMmZHYmlSaWdySExZbENFUGoyb2FEdnpxeWw1RUY2Mk5jcktr?= =?utf-8?B?YUo5Vkd4eGtvQ0FKeDYxT1VmUVJ2b1hSVFJvbysvYmJVL3g2N28vMmorZ1Nm?= =?utf-8?B?OEc5L2NZNWFqRDFHeWpRYS9VOHZQWURVbndUR2k4VnZ3Y2tuNlFvcGppNlR3?= =?utf-8?B?OHFULzJ2ZUovSEY1bzBpeXo3Uml2N1NwaXpLQnZCSzZQRldLTDFLYmlZbGlO?= =?utf-8?B?d21vUlJWTTJyQkFkUFJ4RnJMbDU3WVNIaFpqNkxyWHVPL2NlQ2lnT2NjRzBq?= =?utf-8?B?d0pwTUYxUGFMcWVLVXVFVlg4UUpsVm9FL2JyTDRQakpIbStRbzZqV3hKODJm?= =?utf-8?B?SFVkSFB5QWtYRldmWXJYVDRvQlFrM2UxSk11RU5vQ3ZqMDRFblEzL3VJVUJI?= =?utf-8?B?ZTd0cnc4QVZKNmhLS1U1Wjg5Z0VEa0l1UlR1UDJZSUgxOFFHcThJeWxCVWNJ?= =?utf-8?B?MGU2Y2dwQnVqdVVYWHFaaEppQzJWVEdWcy9pZkxKUnl0V2c3OXREelVzVWFa?= =?utf-8?B?a040UHBaQnpvYm5FNlBsWEtaN3pPb0hZNHYzc2VKRlMwTWpNSEN2Y2tuWlZ6?= =?utf-8?B?S2cxUzRBUWVyVG1URk9kUG9lRFpURHpEU2VJSWtpYzBkQWNadDNwMUR6SDZL?= =?utf-8?B?N2pHeUVZRWQvWGR0VjRmTmp6bmJvVnp2UUUzUVI5MzhxUXBMajJUeXRpYmhs?= =?utf-8?B?Q0F5ZXl2bUlQMmh4bElnRmtPd1E4MG5yTXE1UHFWOVNWRzBwYURESllYeTdS?= =?utf-8?B?YWdyY3RTMmhnS0pSamV6TCtja3llQndnWVc3ZDRNOUt6S3BNOUxWV29oZVlk?= =?utf-8?B?cXkxOFlrWkNsRTdmVURRMGJ3U3lzOWU0a3FlKzZtZmpVd0t5S3oxcXNnaTlG?= =?utf-8?B?REhvbXFldnNRTkdoemEvdFM1SU11Q0tmZlJMQnJiWHIrN1cyV3B1SWRWcTdT?= =?utf-8?B?a25EWFdHQnVqNEdCakI0QloyZ1QvNnAwc2o1UHRYOGFMVkpWcXN2NlpVQnpj?= =?utf-8?B?aW9QZFRUUXpsWXg2RGVTTTU5WlZzZVJIWVRwTmgyNUpDeXlvRWFURFV1Skdw?= =?utf-8?B?eXF4ekpKSzdzM0xxQjlyVno3WTZ2cTJuMEp5S1REcjVXTVIvOWk1OXNBbzBQ?= =?utf-8?B?UWFvZ1I0TlpFekNCOWNzakxkbW5XZG5FU3dSRXZzY0NtWnBhWkIzblB1R1Fp?= =?utf-8?B?enlCNHVoOWdqTU1QYWNrMFBOOTE3cHJOa2Y5bmlBSjFPdndjd0FVek5tZ1JU?= =?utf-8?B?bHQrcE5YK0FmYnlhWXFmRGY0ay9hQjZCb28zbTdVWGVHdnIvcnUrbUZ4cFh0?= =?utf-8?B?d0Y2cjJveWdSdlFOeVVaU09Sd1ZEdmJwZXVEN2VGRk9BYk1UZG5kUDg2VnAx?= =?utf-8?B?bEN2Q243Um1LNkNTYi9VdDUydXZXQ2NOenpOOHZKR2IxNTQzVmp2T0crUDBS?= =?utf-8?B?L21rZFRrcGgvMnJ4ZSt2YjljUTlXaldzTGFKbnlNVVlaNDI5KytIZUxZaE1F?= =?utf-8?B?Y0YyanEvdGg2bjNNZDFJQlQ2THBNbHgxQ3AzTDNteTQ2ZldIUWxmbVU3UWtX?= =?utf-8?B?M2w4QWhGYjNPR3BNTFlYTmVBVG1NZVZvckVBYnlmMkpzT29HZldPT2FJM25w?= =?utf-8?B?MkpxUDkrTXIvMjNocWh2UVdFSklEUFZEeXV3NXJEd3hzZDdSeVNGTXBjeUFy?= =?utf-8?B?N29od1BQSE9KSHUwTU94L3Q3WFBOYWZ1ek01YnNXdWVaZC9aSVRaWFlScmpR?= =?utf-8?B?czhjd3lLSEtxNmlJNUcyWlJmNGNOcWlHTmEreHNEUEo5RU15ZlI3ZUNkZmIx?= =?utf-8?Q?DRY/2d8/Xy2HUH48j4/vt2FF2?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: c33076bd-5105-4b95-b78b-08db8c22223c X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8790.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jul 2023 08:44:03.5635 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: gZOj2nNpngvdBHe+hx/+37iGtiVBjGWUAH//xsGi06PIrxbNA/RzAYHGq8bXEBGIBU3wQt3ucCDOtsmAFhLG/A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6770 X-Spam-Status: No, score=-3033.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 24.07.2023 09:49, Jiawei wrote: > This patch supports RISC-V Atomic compare-and-swap(CAS) extension > instructions(Zacas)[1]. It contains word/doubleword/quadword CAS > instructions amocas.w/d/q.And optionally provides release consistency > semantics, using the 'aq' and 'rl' bits, to help implement > multiprocessor synchronization. > > > [1] https://github.com/riscv/riscv-zacas There was an earlier RFC submission (v1 and v2) by Gianluca Guida [2], [3]. In how far is this (a) based on his work and (b) taking into consideration previously given review comments? Jan [2] https://sourceware.org/pipermail/binutils/2023-May/127404.html [3] https://sourceware.org/pipermail/binutils/2023-May/127700.html > bfd/ChangeLog: > > * elfxx-riscv.c (riscv_multi_subset_supports): New depends. > (riscv_multi_subset_supports_ext): New extension. > > gas/ChangeLog: > > * testsuite/gas/riscv/zacas.d: New test. > * testsuite/gas/riscv/zacas.s: New test. > > include/ChangeLog: > > * opcode/riscv-opc.h (MATCH_AMOCAS_W): New match opcode. > (MASK_AMOCAS_W): New mask opcode. > (MATCH_AMOCAS_D): New match opcode. > (MASK_AMOCAS_D): New mask opcode. > (MATCH_AMOCAS_Q): New match opcode. > (MASK_AMOCAS_Q): New mask opcode. > * opcode/riscv.h (enum riscv_insn_class): New extension class. > > opcodes/ChangeLog: > > * riscv-opc.c: New instructions. > > --- > bfd/elfxx-riscv.c | 6 ++++++ > gas/testsuite/gas/riscv/zacas.d | 20 ++++++++++++++++++++ > gas/testsuite/gas/riscv/zacas.s | 13 +++++++++++++ > include/opcode/riscv-opc.h | 7 +++++++ > include/opcode/riscv.h | 1 + > opcodes/riscv-opc.c | 14 ++++++++++++++ > 6 files changed, 61 insertions(+) > create mode 100644 gas/testsuite/gas/riscv/zacas.d > create mode 100644 gas/testsuite/gas/riscv/zacas.s > > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c > index ee96608358e..46b91087fc6 100644 > --- a/bfd/elfxx-riscv.c > +++ b/bfd/elfxx-riscv.c > @@ -1171,6 +1171,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] = > {"zvksg", "zvkg", check_implicit_always}, > {"zvksc", "zvks", check_implicit_always}, > {"zvksc", "zvbc", check_implicit_always}, > + {"zacas", "a", check_implicit_always}, > {"zcf", "zca", check_implicit_always}, > {"zcd", "zca", check_implicit_always}, > {"zcb", "zca", check_implicit_always}, > @@ -1248,6 +1249,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = > {"zifencei", ISA_SPEC_CLASS_20190608, 2, 0, 0 }, > {"zihintpause", ISA_SPEC_CLASS_DRAFT, 2, 0, 0 }, > {"zmmul", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, > + {"zacas", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, > {"zawrs", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, > {"zfa", ISA_SPEC_CLASS_DRAFT, 0, 1, 0 }, > {"zfh", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, > @@ -2382,6 +2384,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps, > return riscv_subset_supports (rps, "zmmul"); > case INSN_CLASS_A: > return riscv_subset_supports (rps, "a"); > + case INSN_CLASS_ZACAS: > + return riscv_subset_supports (rps, "zacas"); > case INSN_CLASS_ZAWRS: > return riscv_subset_supports (rps, "zawrs"); > case INSN_CLASS_F: > @@ -2575,6 +2579,8 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps, > return _ ("m' or `zmmul"); > case INSN_CLASS_A: > return "a"; > + case INSN_CLASS_ZACAS: > + return "zacas"; > case INSN_CLASS_ZAWRS: > return "zawrs"; > case INSN_CLASS_F: > diff --git a/gas/testsuite/gas/riscv/zacas.d b/gas/testsuite/gas/riscv/zacas.d > new file mode 100644 > index 00000000000..2f65a9bcbe4 > --- /dev/null > +++ b/gas/testsuite/gas/riscv/zacas.d > @@ -0,0 +1,20 @@ > +#as: -march=rv64i_zacas > +#objdump: -d > + > +.*:[ ]+file format .* > + > +Disassembly of section .text: > + > +0+000 : > +[ ]+[0-9a-f]+:[ ]+28e5262f[ ]+amocas.w[ ]+a2,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+2ce5262f[ ]+amocas.w.aq[ ]+a2,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+2ae5262f[ ]+amocas.w.rl[ ]+a2,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+2ee5262f[ ]+amocas.w.aqrl[ ]+a2,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+28e5372f[ ]+amocas.d[ ]+a4,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+2ce5372f[ ]+amocas.d.aq[ ]+a4,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+2ae5372f[ ]+amocas.d.rl[ ]+a4,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+2ee5372f[ ]+amocas.d.aqrl[ ]+a4,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+28e5482f[ ]+amocas.q[ ]+a6,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+2ce5482f[ ]+amocas.q.aq[ ]+a6,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+2ae5482f[ ]+amocas.q.rl[ ]+a6,a4,\(a0\) > +[ ]+[0-9a-f]+:[ ]+2ee5482f[ ]+amocas.q.aqrl[ ]+a6,a4,\(a0\) > diff --git a/gas/testsuite/gas/riscv/zacas.s b/gas/testsuite/gas/riscv/zacas.s > new file mode 100644 > index 00000000000..441284455a2 > --- /dev/null > +++ b/gas/testsuite/gas/riscv/zacas.s > @@ -0,0 +1,13 @@ > +target: > + amocas.w a2, a4, (a0) > + amocas.w.aq a2, a4, (a0) > + amocas.w.rl a2, a4, (a0) > + amocas.w.aqrl a2, a4, (a0) > + amocas.d a4, a4, (a0) > + amocas.d.aq a4, a4, (a0) > + amocas.d.rl a4, a4, (a0) > + amocas.d.aqrl a4, a4, (a0) > + amocas.q a6, a4, (a0) > + amocas.q.aq a6, a4, (a0) > + amocas.q.rl a6, a4, (a0) > + amocas.q.aqrl a6, a4, (a0) > diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h > index 53f5f200508..750e31a337d 100644 > --- a/include/opcode/riscv-opc.h > +++ b/include/opcode/riscv-opc.h > @@ -2298,6 +2298,13 @@ > #define MASK_CZERO_EQZ 0xfe00707f > #define MATCH_CZERO_NEZ 0xe007033 > #define MASK_CZERO_NEZ 0xfe00707f > +/* Zacas intructions. */ > +#define MATCH_AMOCAS_W 0x2800202f > +#define MASK_AMOCAS_W 0xf800707f > +#define MATCH_AMOCAS_D 0x2800302f > +#define MASK_AMOCAS_D 0xf800707f > +#define MATCH_AMOCAS_Q 0x2800402f > +#define MASK_AMOCAS_Q 0xf800707f > /* Zawrs intructions. */ > #define MATCH_WRS_NTO 0x00d00073 > #define MASK_WRS_NTO 0xffffffff > diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h > index 808f3657303..e06f9819d6e 100644 > --- a/include/opcode/riscv.h > +++ b/include/opcode/riscv.h > @@ -394,6 +394,7 @@ enum riscv_insn_class > INSN_CLASS_ZIFENCEI, > INSN_CLASS_ZIHINTPAUSE, > INSN_CLASS_ZMMUL, > + INSN_CLASS_ZACAS, > INSN_CLASS_ZAWRS, > INSN_CLASS_F_INX, > INSN_CLASS_D_INX, > diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c > index 6a854736fec..ef57850d4e6 100644 > --- a/opcodes/riscv-opc.c > +++ b/opcodes/riscv-opc.c > @@ -633,6 +633,20 @@ const struct riscv_opcode riscv_opcodes[] = > {"amomin.d.aqrl", 64, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOMIN_D|MASK_AQRL, MASK_AMOMIN_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE }, > {"amominu.d.aqrl", 64, INSN_CLASS_A, "d,t,0(s)", MATCH_AMOMINU_D|MASK_AQRL, MASK_AMOMINU_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE }, > > +/* Atomic compare-and-swap instruction subset. */ > +{"amocas.w", 0, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_W, MASK_AMOCAS_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE }, > +{"amocas.w.aq", 0, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_W|MASK_AQ, MASK_AMOCAS_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE }, > +{"amocas.w.rl", 0, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_W|MASK_RL, MASK_AMOCAS_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE }, > +{"amocas.w.aqrl", 0, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_W|MASK_AQRL, MASK_AMOCAS_W|MASK_AQRL, match_opcode, INSN_DREF|INSN_4_BYTE }, > +{"amocas.d", 0, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_D, MASK_AMOCAS_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE }, > +{"amocas.d.aq", 0, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_D|MASK_AQ, MASK_AMOCAS_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE }, > +{"amocas.d.rl", 0, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_D|MASK_RL, MASK_AMOCAS_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE }, > +{"amocas.d.aqrl", 0, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_D|MASK_AQRL, MASK_AMOCAS_D|MASK_AQRL, match_opcode, INSN_DREF|INSN_8_BYTE }, > +{"amocas.q", 64, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_Q, MASK_AMOCAS_Q|MASK_AQRL, match_opcode, INSN_DREF|INSN_16_BYTE }, > +{"amocas.q.aq", 64, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_Q|MASK_AQ, MASK_AMOCAS_Q|MASK_AQRL, match_opcode, INSN_DREF|INSN_16_BYTE }, > +{"amocas.q.rl", 64, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_Q|MASK_RL, MASK_AMOCAS_Q|MASK_AQRL, match_opcode, INSN_DREF|INSN_16_BYTE }, > +{"amocas.q.aqrl", 64, INSN_CLASS_ZACAS, "d,t,0(s)", MATCH_AMOCAS_Q|MASK_AQRL, MASK_AMOCAS_Q|MASK_AQRL, match_opcode, INSN_DREF|INSN_16_BYTE }, > + > /* Multiply/Divide instruction subset. */ > {"mul", 0, INSN_CLASS_ZCB_AND_ZMMUL, "Cs,Cw,Ct", MATCH_C_MUL, MASK_C_MUL, match_opcode, INSN_ALIAS }, > {"mul", 0, INSN_CLASS_ZMMUL, "d,s,t", MATCH_MUL, MASK_MUL, match_opcode, 0 },