From mboxrd@z Thu Jan  1 00:00:00 1970
From: John Vickers <jvickers@dial.pipex.com>
To: Nick Clifton <nickc@cygnus.com>
Cc: gavin@cygnus.com, ulfc@calypso.engr.sgi.com, gcc-patches@gcc.gnu.org, binutils@sourceware.cygnus.com
Subject: Re: RFA: command line switches for QED series of MIPS processors.
Date: Sat, 17 Jun 2000 14:02:00 -0000
Message-id: <394BE917.D4AD78A3@dial.pipex.com>
References: <200006151912.MAA12471@elmo.cygnus.com>
X-SW-Source: 2000-06/msg00342.html

Hi.

Can you expand on the motivation for these patches ?

In itself, it doesn't seem to offer offers any new functionality.
Identical results would be obtained by describing the QED CPUs
as R5000 (from which they are derived).

Since you only add QED CPUs, and not e.g. (NEC) VR5432, VR5264
or (IDT) RC64574, RC64575, it looks - in itself - like a marketing
exercise commisioned by QED, which needlessly complicates the
cpu options.

If you were planning further patches to support QED-specific
instructions or scheduling, you would only need two options,
since RM7000[A-Z] have one CPU core, and RM5[27][367][01][A-Z]
have another (modulo process shrinks and bug fixes).

By the logic of this patch, the 68k ports should
recognise at least
6833[01234], 6834[019], 68360 as cpu32 (not to mention all
the 68360 variants), and recognise
6800[08], 68[EHS]C000 as 68000.

What is the policy here ?   IMNSHO, we should choose a canonical name
for the implementations of a given core, maybe the manufacturer's
name for it (cpu32, arm6), or the name of the most well known
implementation.

Regards,

John.

Nick Clifton wrote:
> 
> Hi Gavin, Hi Ulf,
> 
>   I would like to get approval to check in the patch below.  It adds
>   command line switches for the QED series of MIPS processors to both
>   GCC and GAS.  (These processors are r5000 variants).
> 
> Cheers
>         Nick
> 
> 2000-06-15  Nick Clifton  <nickc@cygnus.com>
> 
>         * config/mips/mips.c (override_options): Accept RM5200,
>         RM5230, RM5231, RM5261, RM5721 and RM7000 as r5000 cpu
>         variants.
> 
>         * invoke.texi: Document newly accepted cpu variants.
[...]
> +           {
> +           case 5200:
> +           case 5230:
> +           case 5231:
> +           case 5261:
> +           case 5721:
> +           case 7000:
> +             target_flags |= MASK_MAD;
> +             mips_cpu = PROCESSOR_R5000;
> +             break;