From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 22FE73858407 for ; Sat, 5 Nov 2022 11:50:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 22FE73858407 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id EBA68300089; Sat, 5 Nov 2022 11:49:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1667648998; bh=vsglRZtsiUaJBAyh/TJRFlYygx+RqfBq5T6jQWxfobE=; h=Message-ID:Date:Mime-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type:Content-Transfer-Encoding; b=ToSfkQaOce/b52k8nYbQNc8nqwt5E3UFXIiGQ8OcYGm6Jn12g0MtKEl+QrqD7IF7I gGs5fmENNgYfwLXSikmroh7uProbdDhqF+0yZ2XQDVh9vypE3AU6VVUIG9V/NcmNv6 WfmauhpjzDLgBy10GTYeQhxeEqByZywdZzl1qFv4= Message-ID: <39cd67c0-ec74-42f3-9805-519b9b43eaca@irq.a4lg.com> Date: Sat, 5 Nov 2022 20:49:55 +0900 Mime-Version: 1.0 Subject: [PING^1]Re: [PATCH] RISC-V: Remove RV32EF conflict Content-Language: en-US To: Nelson Chu Cc: binutils@sourceware.org References: <345c5c3b3a53eab04a1e6e91197de2642095c94f.1666185237.git.research_trasio@irq.a4lg.com> From: Tsukasa OI In-Reply-To: <345c5c3b3a53eab04a1e6e91197de2642095c94f.1666185237.git.research_trasio@irq.a4lg.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Ping. c.f.: Original c.f.: LGTM by Kito Regards, Tsukasa On 2022/10/19 22:14, Tsukasa OI wrote: > Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later > versions beginning with the version 20190608-Base-Ratified removed this > restriction. Because the 'E' extension is still a draft, the author chose > to *just* remove the conflict (not checking the ISA version). > > Note that, because RV32E is only used with a soft-float calling convention, > there's no valid official ABI for RV32EF. It means, even if we can assemble > a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept > in an unmanaged state (outside ABI management). > > The purpose of this commit is to suppress unnecessary errors while parsing > an ISA string and/or disassembling, not to allow hard-float with RVE. > > bfd/ChangeLog: > > * elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF > because only older specifications disallowed it. > > gas/ChangeLog: > > * testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly > prohibited. > * testsuite/gas/riscv/march-fail-rv32ef.l: Likewise. > --- > bfd/elfxx-riscv.c | 7 ------- > gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 --- > gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 -- > 3 files changed, 12 deletions(-) > delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.d > delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.l > > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c > index c89b1e53e92..334a63f0873 100644 > --- a/bfd/elfxx-riscv.c > +++ b/bfd/elfxx-riscv.c > @@ -1870,13 +1870,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps) > rps->error_handler (_("rv%d does not support the `q' extension"), xlen); > no_conflict = false; > } > - if (riscv_lookup_subset (rps->subset_list, "e", &subset) > - && riscv_lookup_subset (rps->subset_list, "f", &subset)) > - { > - rps->error_handler > - (_("rv32e does not support the `f' extension")); > - no_conflict = false; > - } > if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset) > && riscv_lookup_subset (rps->subset_list, "f", &subset)) > { > diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d b/gas/testsuite/gas/riscv/march-fail-rv32ef.d > deleted file mode 100644 > index d7b51c3c17d..00000000000 > --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d > +++ /dev/null > @@ -1,3 +0,0 @@ > -#as: -march=rv32ef > -#source: empty.s > -#error_output: march-fail-rv32ef.l > diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l b/gas/testsuite/gas/riscv/march-fail-rv32ef.l > deleted file mode 100644 > index e6d93f28fa5..00000000000 > --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l > +++ /dev/null > @@ -1,2 +0,0 @@ > -.*Assembler messages: > -.*Error: .*rv32e does not support the `f' extension > > base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15