Hi! I committed this patch to fix problems in HC11 linker relaxations. The first 3 points are HC11 specific but the last point is present in other relaxing targets (I think): - we must use a PCREL reloc when long branch is converted to a short branch and we must not compute the branch offset now (the reloc will ensure correct offset) - a jsr can be changed to bsr if the address is in page0 (0..0x0ff) - a far symbol must not be relaxed because we will need to use its trampoline address (and we don't know where it is at this stage). - when we adjust the symbols after removing bytes, we must take into account the symbol that marks the end of the section. The test that exists in the bfd relax targets (and that I copied!) is: if (isym->st_shndx == sec_shndx && isym->st_value > addr && isym->st_value < toaddr) and it is not correct if there is a section that defines a label at its very end. It will not be adjusted. In general such symbol is defined to compute the size of some code and it will thus report the size before relax instead of the final size. Stephane 2003-04-04 Stephane Carrez * elf32-m68hc11.c (m68hc11_elf_relax_delete_bytes): Also adjust symbols that mark the end of the section. (m68hc11_elf_relax_section): Use R_M68HC11_PCREL_8 relocs when converting to a relative branch so that the offset is computed after the relaxation; also relocate a jsr into a bsr if possible but don't relax them if they are to a far symbol as we need to call the trampoline code. (elf_m68hc11_howto_table): Set pcrel_offset to true. 2003-04-04 Stephane Carrez * ld-m68hc11/bug-1417.d: Update to take into account jsr->bsr relax.