From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25809 invoked by alias); 15 Dec 2004 17:11:39 -0000 Mailing-List: contact binutils-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sources.redhat.com Received: (qmail 11850 invoked from network); 15 Dec 2004 16:55:35 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sourceware.org with SMTP; 15 Dec 2004 16:55:35 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.12.11/8.12.11) with ESMTP id iBFGtJxh009286 for ; Wed, 15 Dec 2004 11:55:34 -0500 Received: from pobox.surrey.redhat.com (pobox.surrey.redhat.com [172.16.10.17]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id iBFGtDr22656; Wed, 15 Dec 2004 11:55:16 -0500 Received: from [172.31.0.98] (vpnuser3.surrey.redhat.com [172.16.9.3]) by pobox.surrey.redhat.com (8.12.8/8.12.8) with ESMTP id iBFGt79A015271; Wed, 15 Dec 2004 16:55:08 GMT Message-ID: <41C06DE2.1070806@redhat.com> Date: Wed, 15 Dec 2004 17:11:00 -0000 From: Nick Clifton User-Agent: Mozilla Thunderbird 1.0RC1 (X11/20041201) MIME-Version: 1.0 To: Andrew STUBBS CC: "'Alexandre Oliva'" , binutils@sources.redhat.com, Joern RENNECKE Subject: Re: Broken SH2a patches References: <008401c4c5a5$8db854c0$180f81a4@uk.w2k.superh.com> In-Reply-To: <008401c4c5a5$8db854c0$180f81a4@uk.w2k.superh.com> Content-Type: multipart/mixed; boundary="------------090008050409050900020602" X-SW-Source: 2004-12/txt/msg00171.txt.bz2 This is a multi-part message in MIME format. --------------090008050409050900020602 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-length: 2408 Hi Andrew, Sorry it is so late, but here is another attempt at resolving this problem. Features of this patch include: * I did not try to update the ASCII art in sh-opc.h with the new relationships. In my opinion it just makes the diagram too cluttered to be useful anymore. * I have tried to use more meaningful names for the new machine values. * I have added tests for the new machine values to the SH specific parts of the GAS and LD testsuites. What do you think ? Cheers Nick bfd/ChangeLog 2004-12-15 Nick Clifton * archures.c: Rename fake SH2A machine numbers to more helpful versions: bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, bfd_mach_sh2a_nofpu_or_sh3_nommu, bfd_mach_sh2a_or_sh4, bfd_mach_sh2a_or_sh3e. * bfd-in2.h: Regenerate. * cpu-sh.c (arch_info_struct): Add entries for the fake SH2A machine values. (bfd_to_arch_table): Likewise. opcodes/ChangeLog 2004-12-15 Nick Clifton * sh-opc.h (arch_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh3_nommu, arch_sh2a_or_sh4, arch_sh2a_or_sh3e, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up, arch_sh2a_nofpu_or_sh3_nommu_up, arch_sh2a_or_sh4_up, arch_sh2a_or_sh3e_up): New defines. (sh_table): Use the new arch defines to replace entries which previously combined two different arches. include/elf/ChangeLog 2004-12-15 Nick Clifton * sh.h (EF_SH2A_SH4_NOFPU, EF_SH2A_SH3_NOFPU, EF_SH2A_SH4, EF_SH2A_SH3E): New flags for fake SH2A machine values. (EF_SH_BFD_TABLE): Add the flags to the table. gas/testsuite/ChangeLog 2004-12-15 Nick Clifton * gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: New test file. * gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: New test file. * gas/sh/arch/sh2a-or-sh4.s: New test file. * gas/sh/arch/sh2a-or-sh3e.s: New test file. * gas/sh/arch/sh4.s: Fix to use an SH4 only instruction. * gas/sh/arch/arch_expected.txt: Update with new expected test results. ld/testsuite/ChangeLog 2004-12-15 Nick Clifton * ld/ld-sh/sh/arch/sh2a-nofpu-or-sh3-nommu.s: New test file. * ld/ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: New test file. * ld/ld-sh/arch/sh2a-or-sh4.s: New test file. * ld/ld-sh/arch/sh2a-or-sh3e.s: New test file. * ld/ld-sh/arch/sh4.s: Fix to use an SH4 only instruction. * ld/ld-sh/arch/arch_expected.txt: Update with new expected test results. --------------090008050409050900020602 Content-Type: text/x-troff-man; name="sh.patch.2" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="sh.patch.2" Content-length: 105279 Index: bfd/archures.c =================================================================== RCS file: /cvs/src/src/bfd/archures.c,v retrieving revision 1.100 diff -c -3 -p -r1.100 archures.c *** bfd/archures.c 9 Dec 2004 06:08:45 -0000 1.100 --- bfd/archures.c 15 Dec 2004 16:36:28 -0000 *************** DESCRIPTION *** 235,244 **** .#define bfd_mach_sh_dsp 0x2d .#define bfd_mach_sh2a 0x2a .#define bfd_mach_sh2a_nofpu 0x2b ! .#define bfd_mach_sh2a_fake1 0x2a1 ! .#define bfd_mach_sh2a_fake2 0x2a2 ! .#define bfd_mach_sh2a_fake3 0x2a3 ! .#define bfd_mach_sh2a_fake4 0x2a4 .#define bfd_mach_sh2e 0x2e .#define bfd_mach_sh3 0x30 .#define bfd_mach_sh3_nommu 0x31 --- 235,244 ---- .#define bfd_mach_sh_dsp 0x2d .#define bfd_mach_sh2a 0x2a .#define bfd_mach_sh2a_nofpu 0x2b ! .#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 ! .#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 ! .#define bfd_mach_sh2a_or_sh4 0x2a3 ! .#define bfd_mach_sh2a_or_sh3e 0x2a4 .#define bfd_mach_sh2e 0x2e .#define bfd_mach_sh3 0x30 .#define bfd_mach_sh3_nommu 0x31 Index: bfd/bfd-in2.h =================================================================== RCS file: /cvs/src/src/bfd/bfd-in2.h,v retrieving revision 1.309 diff -c -3 -p -r1.309 bfd-in2.h *** bfd/bfd-in2.h 9 Dec 2004 06:08:45 -0000 1.309 --- bfd/bfd-in2.h 15 Dec 2004 16:36:29 -0000 *************** enum bfd_architecture *** 1686,1695 **** #define bfd_mach_sh_dsp 0x2d #define bfd_mach_sh2a 0x2a #define bfd_mach_sh2a_nofpu 0x2b ! #define bfd_mach_sh2a_fake1 0x2a1 ! #define bfd_mach_sh2a_fake2 0x2a2 ! #define bfd_mach_sh2a_fake3 0x2a3 ! #define bfd_mach_sh2a_fake4 0x2a4 #define bfd_mach_sh2e 0x2e #define bfd_mach_sh3 0x30 #define bfd_mach_sh3_nommu 0x31 --- 1686,1695 ---- #define bfd_mach_sh_dsp 0x2d #define bfd_mach_sh2a 0x2a #define bfd_mach_sh2a_nofpu 0x2b ! #define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 ! #define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 ! #define bfd_mach_sh2a_or_sh4 0x2a3 ! #define bfd_mach_sh2a_or_sh3e 0x2a4 #define bfd_mach_sh2e 0x2e #define bfd_mach_sh3 0x30 #define bfd_mach_sh3_nommu 0x31 Index: bfd/cpu-sh.c =================================================================== RCS file: /cvs/src/src/bfd/cpu-sh.c,v retrieving revision 1.17 diff -c -3 -p -r1.17 cpu-sh.c *** bfd/cpu-sh.c 13 Aug 2004 03:15:56 -0000 1.17 --- bfd/cpu-sh.c 15 Dec 2004 16:36:29 -0000 *************** *** 24,46 **** #include "libbfd.h" #include "../opcodes/sh-opc.h" ! #define SH_NEXT &arch_info_struct[0] ! #define SH2_NEXT &arch_info_struct[1] ! #define SH2E_NEXT &arch_info_struct[2] ! #define SH_DSP_NEXT &arch_info_struct[3] ! #define SH3_NEXT &arch_info_struct[4] ! #define SH3_NOMMU_NEXT &arch_info_struct[5] ! #define SH3_DSP_NEXT &arch_info_struct[6] ! #define SH3E_NEXT &arch_info_struct[7] ! #define SH4_NEXT &arch_info_struct[8] ! #define SH4A_NEXT &arch_info_struct[9] ! #define SH4AL_DSP_NEXT &arch_info_struct[10] ! #define SH4_NOFPU_NEXT &arch_info_struct[11] ! #define SH4_NOMMU_NOFPU_NEXT &arch_info_struct[12] ! #define SH4A_NOFPU_NEXT &arch_info_struct[13] ! #define SH2A_NEXT &arch_info_struct[14] ! #define SH2A_NOFPU_NEXT &arch_info_struct[15] ! #define SH64_NEXT NULL static const bfd_arch_info_type arch_info_struct[] = { --- 24,50 ---- #include "libbfd.h" #include "../opcodes/sh-opc.h" ! #define SH_NEXT arch_info_struct + 0 ! #define SH2_NEXT arch_info_struct + 1 ! #define SH2E_NEXT arch_info_struct + 2 ! #define SH_DSP_NEXT arch_info_struct + 3 ! #define SH3_NEXT arch_info_struct + 4 ! #define SH3_NOMMU_NEXT arch_info_struct + 5 ! #define SH3_DSP_NEXT arch_info_struct + 6 ! #define SH3E_NEXT arch_info_struct + 7 ! #define SH4_NEXT arch_info_struct + 8 ! #define SH4A_NEXT arch_info_struct + 9 ! #define SH4AL_DSP_NEXT arch_info_struct + 10 ! #define SH4_NOFPU_NEXT arch_info_struct + 11 ! #define SH4_NOMMU_NOFPU_NEXT arch_info_struct + 12 ! #define SH4A_NOFPU_NEXT arch_info_struct + 13 ! #define SH2A_NEXT arch_info_struct + 14 ! #define SH2A_NOFPU_NEXT arch_info_struct + 15 ! #define SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT arch_info_struct + 16 ! #define SH2A_NOFPU_OR_SH3_NOMMU_NEXT arch_info_struct + 17 ! #define SH2A_OR_SH4_NEXT arch_info_struct + 18 ! #define SH2A_OR_SH3E_NEXT arch_info_struct + 19 ! #define SH64_NEXT NULL static const bfd_arch_info_type arch_info_struct[] = { *************** static const bfd_arch_info_type arch_inf *** 255,260 **** --- 259,320 ---- SH2A_NOFPU_NEXT }, { + 32, /* 32 bits in a word. */ + 32, /* 32 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_sh, + bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, + "sh", /* Arch_name. */ + "sh2a-nofpu-or-sh4-nommu-nofpu", /* Printable name. */ + 1, + FALSE, /* Not the default. */ + bfd_default_compatible, + bfd_default_scan, + SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT + }, + { + 32, /* 32 bits in a word. */ + 32, /* 32 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_sh, + bfd_mach_sh2a_nofpu_or_sh3_nommu, + "sh", /* Arch_name. */ + "sh2a-nofpu-or-sh3-nommu", /* Printable name. */ + 1, + FALSE, /* Not the default. */ + bfd_default_compatible, + bfd_default_scan, + SH2A_NOFPU_OR_SH3_NOMMU_NEXT + }, + { + 32, /* 32 bits in a word. */ + 32, /* 32 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_sh, + bfd_mach_sh2a_or_sh4, + "sh", /* Arch_name. */ + "sh2a-or-sh4", /* Printable name. */ + 1, + FALSE, /* Not the default. */ + bfd_default_compatible, + bfd_default_scan, + SH2A_OR_SH4_NEXT + }, + { + 32, /* 32 bits in a word. */ + 32, /* 32 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_sh, + bfd_mach_sh2a_or_sh3e, + "sh", /* Arch_name. */ + "sh2a-or-sh3e", /* Printable name. */ + 1, + FALSE, /* Not the default. */ + bfd_default_compatible, + bfd_default_scan, + SH2A_OR_SH3E_NEXT + }, + { 64, /* 64 bits in a word */ 64, /* 64 bits in an address */ 8, /* 8 bits in a byte */ *************** static struct { unsigned long bfd_mach, *** 301,306 **** --- 361,372 ---- { bfd_mach_sh_dsp, arch_sh_dsp, arch_sh_dsp_up }, { bfd_mach_sh2a, arch_sh2a, arch_sh2a_up }, { bfd_mach_sh2a_nofpu, arch_sh2a_nofpu, arch_sh2a_nofpu_up }, + + { bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up }, + { bfd_mach_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu_up }, + { bfd_mach_sh2a_or_sh4, arch_sh2a_or_sh4, arch_sh2a_or_sh4_up }, + { bfd_mach_sh2a_or_sh3e, arch_sh2a_or_sh3e, arch_sh2a_or_sh3e_up }, + { bfd_mach_sh3, arch_sh3, arch_sh3_up }, { bfd_mach_sh3_nommu, arch_sh3_nommu, arch_sh3_nommu_up }, { bfd_mach_sh3_dsp, arch_sh3_dsp, arch_sh3_dsp_up }, Index: opcodes/sh-opc.h =================================================================== RCS file: /cvs/src/src/opcodes/sh-opc.h,v retrieving revision 1.22 diff -c -3 -p -r1.22 sh-opc.h *** opcodes/sh-opc.h 29 Jul 2004 05:19:27 -0000 1.22 --- opcodes/sh-opc.h 15 Dec 2004 16:36:31 -0000 *************** sh_dsp_reg_nums; *** 223,244 **** #define arch_sh_co_mask 0xf0000000 ! #define arch_sh1 (arch_sh1_base|arch_sh_no_mmu|arch_sh_no_co) ! #define arch_sh2 (arch_sh2_base|arch_sh_no_mmu|arch_sh_no_co) ! #define arch_sh2a (arch_sh2a_base|arch_sh_no_mmu|arch_sh_dp_fpu) ! #define arch_sh2a_nofpu (arch_sh2a_base|arch_sh_no_mmu|arch_sh_no_co) ! #define arch_sh2e (arch_sh2_base|arch_sh2a_base|arch_sh_no_mmu|arch_sh_sp_fpu) ! #define arch_sh_dsp (arch_sh2_base|arch_sh_no_mmu|arch_sh_has_dsp) ! #define arch_sh3_nommu (arch_sh3_base|arch_sh_no_mmu|arch_sh_no_co) ! #define arch_sh3 (arch_sh3_base|arch_sh_has_mmu|arch_sh_no_co) ! #define arch_sh3e (arch_sh3_base|arch_sh_has_mmu|arch_sh_sp_fpu) ! #define arch_sh3_dsp (arch_sh3_base|arch_sh_has_mmu|arch_sh_has_dsp) ! #define arch_sh4 (arch_sh4_base|arch_sh_has_mmu|arch_sh_dp_fpu) ! #define arch_sh4a (arch_sh4a_base|arch_sh_has_mmu|arch_sh_dp_fpu) ! #define arch_sh4al_dsp (arch_sh4a_base|arch_sh_has_mmu|arch_sh_has_dsp) ! #define arch_sh4_nofpu (arch_sh4_base|arch_sh_has_mmu|arch_sh_no_co) ! #define arch_sh4a_nofpu (arch_sh4a_base|arch_sh_has_mmu|arch_sh_no_co) ! #define arch_sh4_nommu_nofpu (arch_sh4_base|arch_sh_no_mmu|arch_sh_no_co) #define SH_MERGE_ARCH_SET(SET1, SET2) ((SET1) & (SET2)) #define SH_VALID_BASE_ARCH_SET(SET) (((SET) & arch_sh_base_mask) != 0) --- 223,248 ---- #define arch_sh_co_mask 0xf0000000 ! #define arch_sh1 (arch_sh1_base | arch_sh_no_mmu |arch_sh_no_co) ! #define arch_sh2 (arch_sh2_base | arch_sh_no_mmu |arch_sh_no_co) ! #define arch_sh2a (arch_sh2a_base| arch_sh_no_mmu |arch_sh_dp_fpu) ! #define arch_sh2a_nofpu (arch_sh2a_base| arch_sh_no_mmu |arch_sh_no_co) ! #define arch_sh2e (arch_sh2_base |arch_sh2a_base|arch_sh_no_mmu |arch_sh_sp_fpu) ! #define arch_sh_dsp (arch_sh2_base | arch_sh_no_mmu |arch_sh_has_dsp) ! #define arch_sh3_nommu (arch_sh3_base | arch_sh_no_mmu |arch_sh_no_co) ! #define arch_sh3 (arch_sh3_base | arch_sh_has_mmu|arch_sh_no_co) ! #define arch_sh3e (arch_sh3_base | arch_sh_has_mmu|arch_sh_sp_fpu) ! #define arch_sh3_dsp (arch_sh3_base | arch_sh_has_mmu|arch_sh_has_dsp) ! #define arch_sh4 (arch_sh4_base | arch_sh_has_mmu|arch_sh_dp_fpu) ! #define arch_sh4a (arch_sh4a_base| arch_sh_has_mmu|arch_sh_dp_fpu) ! #define arch_sh4al_dsp (arch_sh4a_base| arch_sh_has_mmu|arch_sh_has_dsp) ! #define arch_sh4_nofpu (arch_sh4_base | arch_sh_has_mmu|arch_sh_no_co) ! #define arch_sh4a_nofpu (arch_sh4a_base| arch_sh_has_mmu|arch_sh_no_co) ! #define arch_sh4_nommu_nofpu (arch_sh4_base | arch_sh_no_mmu |arch_sh_no_co) ! #define arch_sh2a_nofpu_or_sh4_nommu_nofpu (arch_sh2a_base|arch_sh4_base |arch_sh_no_mmu |arch_sh_no_co) ! #define arch_sh2a_nofpu_or_sh3_nommu (arch_sh2a_base|arch_sh3_base |arch_sh_no_mmu |arch_sh_no_co) ! #define arch_sh2a_or_sh4 (arch_sh4_base |arch_sh4_base | arch_sh_dp_fpu) ! #define arch_sh2a_or_sh3e (arch_sh2a_base|arch_sh3_base) #define SH_MERGE_ARCH_SET(SET1, SET2) ((SET1) & (SET2)) #define SH_VALID_BASE_ARCH_SET(SET) (((SET) & arch_sh_base_mask) != 0) *************** SH3-dsp SH4-nofpu *** 293,323 **** |/ \| SH4AL-dsp SH4A */ ! /* Central branches */ ! #define arch_sh1_up (arch_sh1 | arch_sh2_up) ! #define arch_sh2_up (arch_sh2 | arch_sh2e_up | arch_sh2a_nofpu_up | arch_sh3_nommu_up | arch_sh_dsp_up) ! #define arch_sh3_nommu_up (arch_sh3_nommu | arch_sh3_up | arch_sh4_nommu_nofpu_up) ! #define arch_sh3_up (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up | arch_sh4_nofp_up) ! #define arch_sh4_nommu_nofpu_up (arch_sh4_nommu_nofpu | arch_sh4_nofp_up) ! #define arch_sh4_nofp_up (arch_sh4_nofpu | arch_sh4_up | arch_sh4a_nofp_up) ! #define arch_sh4a_nofp_up (arch_sh4a_nofpu | arch_sh4a_up | arch_sh4al_dsp_up) ! ! /* Right branch */ ! #define arch_sh2e_up (arch_sh2e | arch_sh2a_up | arch_sh3e_up) ! #define arch_sh3e_up (arch_sh3e | arch_sh4_up) ! #define arch_sh4_up (arch_sh4 | arch_sh4a_up) ! #define arch_sh4a_up (arch_sh4a) ! ! /* Left branch */ ! #define arch_sh_dsp_up (arch_sh_dsp | arch_sh3_dsp_up) ! #define arch_sh3_dsp_up (arch_sh3_dsp | arch_sh4al_dsp_up) ! #define arch_sh4al_dsp_up (arch_sh4al_dsp) ! /* SH 2a branched off SH2e, adding a lot but not all of SH4 and SH4a. */ ! #define arch_sh2a_up (arch_sh2a) ! #define arch_sh2a_nofpu_up (arch_sh2a_nofpu | arch_sh2a_up) typedef struct --- 297,330 ---- |/ \| SH4AL-dsp SH4A + Note: The branches for the SH2A are not shown on this + diagram as they would needlessly complicate it. */ ! /* Central branches. */ ! #define arch_sh1_up (arch_sh1 | arch_sh2_up) ! #define arch_sh2_up (arch_sh2 | arch_sh2e_up | arch_sh2a_nofpu_or_sh3_nommu_up | arch_sh_dsp_up) ! #define arch_sh3_nommu_up (arch_sh3_nommu | arch_sh3_up | arch_sh2a_nofpu_or_sh4_nommu_nofpu_up) ! #define arch_sh3_up (arch_sh3 | arch_sh2a_or_sh3e_up | arch_sh3_dsp_up | arch_sh4_nofp_up) ! #define arch_sh4_nommu_nofpu_up (arch_sh4_nommu_nofpu | arch_sh4_nofp_up) ! #define arch_sh4_nofp_up (arch_sh4_nofpu | arch_sh4_up | arch_sh4a_nofp_up) ! #define arch_sh4a_nofp_up (arch_sh4a_nofpu | arch_sh4a_up | arch_sh4al_dsp_up) ! /* Right branch. */ ! #define arch_sh2e_up (arch_sh2e | arch_sh2a_or_sh3e_up) ! #define arch_sh3e_up (arch_sh3e | arch_sh2a_or_sh4_up) ! #define arch_sh4_up (arch_sh4 | arch_sh4a_up) ! #define arch_sh4a_up (arch_sh4a) ! /* Left branch. */ ! #define arch_sh_dsp_up (arch_sh_dsp | arch_sh3_dsp_up) ! #define arch_sh3_dsp_up (arch_sh3_dsp | arch_sh4al_dsp_up) ! #define arch_sh4al_dsp_up (arch_sh4al_dsp) /* SH 2a branched off SH2e, adding a lot but not all of SH4 and SH4a. */ ! #define arch_sh2a_up (arch_sh2a) ! #define arch_sh2a_nofpu_up (arch_sh2a_nofpu | arch_sh2a_up) ! #define arch_sh2a_nofpu_or_sh4_nommu_nofpu_up (arch_sh2a_nofpu_or_sh4_nommu_nofpu | arch_sh2a_nofpu_up | arch_sh4_nommu_nofpu_up) ! #define arch_sh2a_nofpu_or_sh3_nommu_up (arch_sh2a_nofpu_or_sh3_nommu | arch_sh2a_nofpu_up | arch_sh3_nommu_up) ! #define arch_sh2a_or_sh4_up (arch_sh2a_or_sh4 | arch_sh2a_up | arch_sh4_up) ! #define arch_sh2a_or_sh3e_up (arch_sh2a_or_sh3e | arch_sh2a_up | arch_sh3e_up) typedef struct *************** const sh_opcode_info sh_table[] = *** 634,640 **** /* 11001111i8*1.... or.b #,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh1_up}, ! /* 0000nnnn10000011 pref @ */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh4_nommu_nofpu_up | arch_sh2a_nofpu_up}, /* 0000nnnn11010011 prefi @ */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofp_up}, --- 641,647 ---- /* 11001111i8*1.... or.b #,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh1_up}, ! /* 0000nnnn10000011 pref @ */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up}, /* 0000nnnn11010011 prefi @ */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofp_up}, *************** const sh_opcode_info sh_table[] = *** 664,672 **** /* repeat start end # */{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up}, ! /* 0100nnnnmmmm1100 shad ,*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh3_nommu_up | arch_sh2a_nofpu_up}, ! /* 0100nnnnmmmm1101 shld ,*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh3_nommu_up | arch_sh2a_nofpu_up}, /* 0100nnnn00100000 shal */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh1_up}, --- 671,679 ---- /* repeat start end # */{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up}, ! /* 0100nnnnmmmm1100 shad ,*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}, ! /* 0100nnnnmmmm1101 shld ,*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}, /* 0100nnnn00100000 shal */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh1_up}, *************** const sh_opcode_info sh_table[] = *** 985,1007 **** {"pswap", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_B,HEX_D,HEX_4}, arch_sh4al_dsp_up}, /* 1111nnnn01011101 fabs */{"fabs",{F_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh2e_up}, ! /* 1111nnn001011101 fabs */{"fabs",{D_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm0000 fadd ,*/{"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}, arch_sh2e_up}, ! /* 1111nnn0mmm00000 fadd ,*/{"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm0100 fcmp/eq ,*/{"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh2e_up}, ! /* 1111nnn0mmm00100 fcmp/eq ,*/{"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm0101 fcmp/gt ,*/{"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh2e_up}, ! /* 1111nnn0mmm00101 fcmp/gt ,*/{"fcmp/gt",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh4_up | arch_sh2a_up}, ! /* 1111nnn010111101 fcnvds ,FPUL*/{"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N_D,HEX_B,HEX_D}, arch_sh4_up | arch_sh2a_up}, ! /* 1111nnn010101101 fcnvsd FPUL,*/{"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N_D,HEX_A,HEX_D}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm0011 fdiv ,*/{"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}, arch_sh2e_up}, ! /* 1111nnn0mmm00011 fdiv ,*/{"fdiv",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_3}, arch_sh4_up | arch_sh2a_up}, /* 1111nnmm11101101 fipr ,*/{"fipr",{V_REG_M,V_REG_N},{HEX_F,REG_NM,HEX_E,HEX_D}, arch_sh4_up}, --- 992,1014 ---- {"pswap", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_B,HEX_D,HEX_4}, arch_sh4al_dsp_up}, /* 1111nnnn01011101 fabs */{"fabs",{F_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh2e_up}, ! /* 1111nnn001011101 fabs */{"fabs",{D_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm0000 fadd ,*/{"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}, arch_sh2e_up}, ! /* 1111nnn0mmm00000 fadd ,*/{"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm0100 fcmp/eq ,*/{"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh2e_up}, ! /* 1111nnn0mmm00100 fcmp/eq ,*/{"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm0101 fcmp/gt ,*/{"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh2e_up}, ! /* 1111nnn0mmm00101 fcmp/gt ,*/{"fcmp/gt",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh2a_or_sh4_up}, ! /* 1111nnn010111101 fcnvds ,FPUL*/{"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N_D,HEX_B,HEX_D}, arch_sh2a_or_sh4_up}, ! /* 1111nnn010101101 fcnvsd FPUL,*/{"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N_D,HEX_A,HEX_D}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm0011 fdiv ,*/{"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}, arch_sh2e_up}, ! /* 1111nnn0mmm00011 fdiv ,*/{"fdiv",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_3}, arch_sh2a_or_sh4_up}, /* 1111nnmm11101101 fipr ,*/{"fipr",{V_REG_M,V_REG_N},{HEX_F,REG_NM,HEX_E,HEX_D}, arch_sh4_up}, *************** const sh_opcode_info sh_table[] = *** 1012,1053 **** /* 1111nnnn00011101 flds ,FPUL*/{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}, arch_sh2e_up}, /* 1111nnnn00101101 float FPUL,*/{"float",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh2e_up}, ! /* 1111nnn000101101 float FPUL,*/{"float",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm1110 fmac FR0,,*/{"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}, arch_sh2e_up}, /* 1111nnnnmmmm1100 fmov ,*/{"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh2e_up}, ! /* 1111nnn1mmmm1100 fmov ,*/{"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm1000 fmov @,*/{"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh2e_up}, ! /* 1111nnn1mmmm1000 fmov @,*/{"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm1010 fmov ,@*/{"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2e_up}, ! /* 1111nnnnmmm11010 fmov ,@*/{"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm1001 fmov @+,*/{"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh2e_up}, ! /* 1111nnn1mmmm1001 fmov @+,*/{"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm1011 fmov ,@-*/{"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2e_up}, ! /* 1111nnnnmmm11011 fmov ,@-*/{"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm0110 fmov @(R0,),*/{"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh2e_up}, ! /* 1111nnn1mmmm0110 fmov @(R0,),*/{"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnnmmmm0111 fmov ,@(R0,)*/{"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2e_up}, ! /* 1111nnnnmmm10111 fmov ,@(R0,)*/{"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh4_up | arch_sh2a_up}, ! ! /* 1111nnn1mmmm1000 fmov.d @,*/{"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh4_up | arch_sh2a_up}, ! ! /* 1111nnnnmmm11010 fmov.d ,@*/{"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh4_up | arch_sh2a_up}, ! ! /* 1111nnn1mmmm1001 fmov.d @+,*/{"fmov.d",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh4_up | arch_sh2a_up}, ! ! /* 1111nnnnmmm11011 fmov.d ,@-*/{"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh4_up | arch_sh2a_up}, ! ! /* 1111nnn1mmmm0110 fmov.d @(R0,),*/{"fmov.d",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh4_up | arch_sh2a_up}, ! /* 1111nnnnmmm10111 fmov.d ,@(R0,)*/{"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh4_up | arch_sh2a_up}, /* 0011nnnnmmmm0001 0011dddddddddddd fmov.d ,@(,) */ {"fmov.d",{DX_REG_M,A_DISP_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_3,DISP1_12BY8}, arch_sh2a_up | arch_op32}, /* 0011nnnnmmmm0001 0111dddddddddddd fmov.d @(,),F_REG_N */ --- 1019,1055 ---- /* 1111nnnn00011101 flds ,FPUL*/{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}, arch_sh2e_up}, /* 1111nnnn00101101 float FPUL,*/{"float",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh2e_up}, ! /* 1111nnn000101101 float FPUL,*/{"float",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm1110 fmac FR0,,*/{"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}, arch_sh2e_up}, /* 1111nnnnmmmm1100 fmov ,*/{"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh2e_up}, ! /* 1111nnn1mmmm1100 fmov ,*/{"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm1000 fmov @,*/{"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh2e_up}, ! /* 1111nnn1mmmm1000 fmov @,*/{"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm1010 fmov ,@*/{"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2e_up}, ! /* 1111nnnnmmm11010 fmov ,@*/{"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm1001 fmov @+,*/{"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh2e_up}, ! /* 1111nnn1mmmm1001 fmov @+,*/{"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm1011 fmov ,@-*/{"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2e_up}, ! /* 1111nnnnmmm11011 fmov ,@-*/{"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm0110 fmov @(R0,),*/{"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh2e_up}, ! /* 1111nnn1mmmm0110 fmov @(R0,),*/{"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh2a_or_sh4_up}, /* 1111nnnnmmmm0111 fmov ,@(R0,)*/{"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2e_up}, ! /* 1111nnnnmmm10111 fmov ,@(R0,)*/{"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2a_or_sh4_up}, ! /* 1111nnn1mmmm1000 fmov.d @,*/{"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh2a_or_sh4_up}, ! /* 1111nnnnmmm11010 fmov.d ,@*/{"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2a_or_sh4_up}, ! /* 1111nnn1mmmm1001 fmov.d @+,*/{"fmov.d",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh2a_or_sh4_up}, ! /* 1111nnnnmmm11011 fmov.d ,@-*/{"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2a_or_sh4_up}, ! /* 1111nnn1mmmm0110 fmov.d @(R0,),*/{"fmov.d",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh2a_or_sh4_up}, ! /* 1111nnnnmmm10111 fmov.d ,@(R0,)*/{"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2a_or_sh4_up}, /* 0011nnnnmmmm0001 0011dddddddddddd fmov.d ,@(,) */ {"fmov.d",{DX_REG_M,A_DISP_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_3,DISP1_12BY8}, arch_sh2a_up | arch_op32}, /* 0011nnnnmmmm0001 0111dddddddddddd fmov.d @(,),F_REG_N */ *************** const sh_opcode_info sh_table[] = *** 1070,1079 **** {"fmov.s",{A_DISP_REG_M,F_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_7,DISP0_12BY4}, arch_sh2a_up | arch_op32}, /* 1111nnnnmmmm0010 fmul ,*/{"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}, arch_sh2e_up}, ! /* 1111nnn0mmm00010 fmul ,*/{"fmul",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_2}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnn01001101 fneg */{"fneg",{F_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh2e_up}, ! /* 1111nnn001001101 fneg */{"fneg",{D_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh4_up | arch_sh2a_up}, /* 1111011111111101 fpchg */{"fpchg",{0},{HEX_F,HEX_7,HEX_F,HEX_D}, arch_sh4a_up}, --- 1072,1081 ---- {"fmov.s",{A_DISP_REG_M,F_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_7,DISP0_12BY4}, arch_sh2a_up | arch_op32}, /* 1111nnnnmmmm0010 fmul ,*/{"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}, arch_sh2e_up}, ! /* 1111nnn0mmm00010 fmul ,*/{"fmul",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_2}, arch_sh2a_or_sh4_up}, /* 1111nnnn01001101 fneg */{"fneg",{F_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh2e_up}, ! /* 1111nnn001001101 fneg */{"fneg",{D_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh2a_or_sh4_up}, /* 1111011111111101 fpchg */{"fpchg",{0},{HEX_F,HEX_7,HEX_F,HEX_D}, arch_sh4a_up}, *************** const sh_opcode_info sh_table[] = *** 1081,1100 **** /* 1111nnn011111101 fsca FPUL, */{"fsca",{FPUL_M,D_REG_N},{HEX_F,REG_N_D,HEX_F,HEX_D}, arch_sh4_up}, ! /* 1111001111111101 fschg */{"fschg",{0},{HEX_F,HEX_3,HEX_F,HEX_D}, arch_sh4_up | arch_sh2a_up}, ! /* 1111nnnn01101101 fsqrt */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh3e_up | arch_sh2a_up}, ! /* 1111nnn001101101 fsqrt */{"fsqrt",{D_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnn01111101 fsrra */{"fsrra",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}, arch_sh4_up}, /* 1111nnnn00001101 fsts FPUL,*/{"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}, arch_sh2e_up}, /* 1111nnnnmmmm0001 fsub ,*/{"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh2e_up}, ! /* 1111nnn0mmm00001 fsub ,*/{"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh4_up | arch_sh2a_up}, /* 1111nnnn00111101 ftrc ,FPUL*/{"ftrc",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh2e_up}, ! /* 1111nnnn00111101 ftrc ,FPUL*/{"ftrc",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh4_up | arch_sh2a_up}, /* 1111nn0111111101 ftrv XMTRX_M4,*/{"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_N_B01,HEX_F,HEX_D}, arch_sh4_up}, --- 1083,1102 ---- /* 1111nnn011111101 fsca FPUL, */{"fsca",{FPUL_M,D_REG_N},{HEX_F,REG_N_D,HEX_F,HEX_D}, arch_sh4_up}, ! /* 1111001111111101 fschg */{"fschg",{0},{HEX_F,HEX_3,HEX_F,HEX_D}, arch_sh2a_or_sh4_up}, ! /* 1111nnnn01101101 fsqrt */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh2a_or_sh3e_up}, ! /* 1111nnn001101101 fsqrt */{"fsqrt",{D_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh2a_or_sh4_up}, /* 1111nnnn01111101 fsrra */{"fsrra",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}, arch_sh4_up}, /* 1111nnnn00001101 fsts FPUL,*/{"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}, arch_sh2e_up}, /* 1111nnnnmmmm0001 fsub ,*/{"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh2e_up}, ! /* 1111nnn0mmm00001 fsub ,*/{"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh2a_or_sh4_up}, /* 1111nnnn00111101 ftrc ,FPUL*/{"ftrc",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh2e_up}, ! /* 1111nnnn00111101 ftrc ,FPUL*/{"ftrc",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh2a_or_sh4_up}, /* 1111nn0111111101 ftrv XMTRX_M4,*/{"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_N_B01,HEX_F,HEX_D}, arch_sh4_up}, Index: include/elf/sh.h =================================================================== RCS file: /cvs/src/src/include/elf/sh.h,v retrieving revision 1.19 diff -c -3 -p -r1.19 sh.h *** include/elf/sh.h 29 Jul 2004 05:17:37 -0000 1.19 --- include/elf/sh.h 15 Dec 2004 16:36:31 -0000 *************** *** 42,47 **** --- 42,52 ---- #define EF_SH2A_NOFPU 19 #define EF_SH3_NOMMU 20 + #define EF_SH2A_SH4_NOFPU 21 + #define EF_SH2A_SH3_NOFPU 22 + #define EF_SH2A_SH4 23 + #define EF_SH2A_SH3E 24 + /* This one can only mix in objects from other EF_SH5 objects. */ #define EF_SH5 10 *************** *** 68,74 **** /* EF_SH4A_NOFPU */ bfd_mach_sh4a_nofpu , \ /* EF_SH4_NOMMU_NOFPU */ bfd_mach_sh4_nommu_nofpu, \ /* EF_SH2A_NOFPU */ bfd_mach_sh2a_nofpu , \ ! /* EF_SH3_NOMMU */ bfd_mach_sh3_nommu /* Convert arch_sh* into EF_SH*. */ int sh_find_elf_flags (unsigned int arch_set); --- 73,83 ---- /* EF_SH4A_NOFPU */ bfd_mach_sh4a_nofpu , \ /* EF_SH4_NOMMU_NOFPU */ bfd_mach_sh4_nommu_nofpu, \ /* EF_SH2A_NOFPU */ bfd_mach_sh2a_nofpu , \ ! /* EF_SH3_NOMMU */ bfd_mach_sh3_nommu , \ ! /* EF_SH2A_SH4_NOFPU */ bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, \ ! /* EF_SH2A_SH3_NOFPU */ bfd_mach_sh2a_nofpu_or_sh3_nommu, \ ! /* EF_SH2A_SH4 */ bfd_mach_sh2a_or_sh4 , \ ! /* EF_SH2A_SH3E */ bfd_mach_sh2a_or_sh3e /* Convert arch_sh* into EF_SH*. */ int sh_find_elf_flags (unsigned int arch_set); *** /dev/null 2004-06-24 19:04:38.000000000 +0100 --- gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s 2004-12-15 15:43:37.000000000 +0000 *************** *** 0 **** --- 1,3 ---- + .section .text + sh2a_nofpu_or_sh3_nommu: + shad r3, r4 *** /dev/null 2004-06-24 19:04:38.000000000 +0100 --- gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s 2004-12-15 15:45:26.000000000 +0000 *************** *** 0 **** --- 1,3 ---- + .section .text + sh2a_nofpu_or_sh4_nommu_nofpu: + pref @r3 *** /dev/null 2004-06-24 19:04:38.000000000 +0100 --- gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s 2004-12-15 15:46:02.000000000 +0000 *************** *** 0 **** --- 1,3 ---- + .section .text + sh2a_or_sh3e: + fsqrt fr3 *** /dev/null 2004-06-24 19:04:38.000000000 +0100 --- gas/testsuite/gas/sh/arch/sh2a-or-sh4.s 2004-12-15 15:46:26.000000000 +0000 *************** *** 0 **** --- 1,3 ---- + .section .text + sh2a_or_sh4: + fcnvsd fpul, dr4 *** /dev/null 2004-06-24 19:04:38.000000000 +0100 --- ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s 2004-12-15 15:49:55.000000000 +0000 *************** *** 0 **** --- 1,3 ---- + .section .text + sh2a_nofpu_or_sh3_nommu: + shad r3, r4 *** /dev/null 2004-06-24 19:04:38.000000000 +0100 --- ld/testsuite/ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s 2004-12-15 15:49:55.000000000 +0000 *************** *** 0 **** --- 1,3 ---- + .section .text + sh2a_nofpu_or_sh4_nommu_nofpu: + pref @r3 *** /dev/null 2004-06-24 19:04:38.000000000 +0100 --- ld/testsuite/ld-sh/arch/sh2a-or-sh3e.s 2004-12-15 15:49:55.000000000 +0000 *************** *** 0 **** --- 1,3 ---- + .section .text + sh2a_or_sh3e: + fsqrt fr3 *** /dev/null 2004-06-24 19:04:38.000000000 +0100 --- ld/testsuite/ld-sh/arch/sh2a-or-sh4.s 2004-12-15 15:49:55.000000000 +0000 *************** *** 0 **** --- 1,3 ---- + .section .text + sh2a_or_sh4: + fcnvsd fpul, dr4 Index: gas/testsuite/gas/sh/arch/arch_expected.txt =================================================================== RCS file: /cvs/src/src/gas/testsuite/gas/sh/arch/arch_expected.txt,v retrieving revision 1.1 diff -c -3 -p -r1.1 arch_expected.txt *** gas/testsuite/gas/sh/arch/arch_expected.txt 29 Jun 2004 16:35:05 -0000 1.1 --- gas/testsuite/gas/sh/arch/arch_expected.txt 15 Dec 2004 16:36:27 -0000 *************** sh-dsp.s -isa=sh *** 21,26 **** --- 21,34 ---- sh-dsp.s -isa=sh-up sh-dsp sh-dsp.s -isa=sh2 ERROR sh-dsp.s -isa=sh2-up sh-dsp + sh-dsp.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh-dsp.s -isa=sh2a-nofpu-or-sh3-nommu-up sh3-dsp + sh-dsp.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR + sh-dsp.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh4al-dsp + sh-dsp.s -isa=sh2a-or-sh3e ERROR + sh-dsp.s -isa=sh2a-or-sh3e-up ERROR + sh-dsp.s -isa=sh2a-or-sh4 ERROR + sh-dsp.s -isa=sh2a-or-sh4-up ERROR sh-dsp.s -isa=sh2e ERROR sh-dsp.s -isa=sh2e-up ERROR sh-dsp.s -isa=sh3-dsp sh3-dsp *************** sh.s -isa=sh *** 54,69 **** sh.s -isa=sh-up sh sh.s -isa=sh2 sh2 sh.s -isa=sh2-up sh2 sh.s -isa=sh2e sh2e sh.s -isa=sh2e-up sh2e sh.s -isa=sh3-dsp sh3-dsp sh.s -isa=sh3-dsp-up sh3-dsp ! sh.s -isa=sh3-nommu sh3-nommu ! sh.s -isa=sh3-nommu-up sh3-nommu ! sh.s -isa=sh3 sh3 ! sh.s -isa=sh3-up sh3 ! sh.s -isa=sh3e sh3e ! sh.s -isa=sh3e-up sh3e sh.s -isa=sh4-nofpu sh4-nofpu sh.s -isa=sh4-nofpu-up sh4-nofpu sh.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu --- 62,85 ---- sh.s -isa=sh-up sh sh.s -isa=sh2 sh2 sh.s -isa=sh2-up sh2 + sh.s -isa=sh2a-nofpu-or-sh3-nommu sh2a-nofpu + sh.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-nofpu-or-sh3-nommu + sh.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu sh2a-nofpu + sh.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-nofpu-or-sh4-nommu-nofpu + sh.s -isa=sh2a-or-sh3e ERROR + sh.s -isa=sh2a-or-sh3e-up sh2a-or-sh3e + sh.s -isa=sh2a-or-sh4 ERROR + sh.s -isa=sh2a-or-sh4-up sh2a-or-sh4 sh.s -isa=sh2e sh2e sh.s -isa=sh2e-up sh2e sh.s -isa=sh3-dsp sh3-dsp sh.s -isa=sh3-dsp-up sh3-dsp ! sh.s -isa=sh3-nommu sh2a-nofpu-or-sh3-nommu ! sh.s -isa=sh3-nommu-up sh2a-nofpu-or-sh3-nommu ! sh.s -isa=sh3 sh2a-nofpu-or-sh3-nommu ! sh.s -isa=sh3-up sh2a-nofpu-or-sh3-nommu ! sh.s -isa=sh3e sh2a-or-sh3e ! sh.s -isa=sh3e-up sh2a-or-sh3e sh.s -isa=sh4-nofpu sh4-nofpu sh.s -isa=sh4-nofpu-up sh4-nofpu sh.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu *************** sh2.s -isa=sh *** 87,102 **** sh2.s -isa=sh-up sh2 sh2.s -isa=sh2 sh2 sh2.s -isa=sh2-up sh2 sh2.s -isa=sh2e sh2e sh2.s -isa=sh2e-up sh2e sh2.s -isa=sh3-dsp sh3-dsp sh2.s -isa=sh3-dsp-up sh3-dsp ! sh2.s -isa=sh3-nommu sh3-nommu ! sh2.s -isa=sh3-nommu-up sh3-nommu ! sh2.s -isa=sh3 sh3 ! sh2.s -isa=sh3-up sh3 ! sh2.s -isa=sh3e sh3e ! sh2.s -isa=sh3e-up sh3e sh2.s -isa=sh4-nofpu sh4-nofpu sh2.s -isa=sh4-nofpu-up sh4-nofpu sh2.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu --- 103,126 ---- sh2.s -isa=sh-up sh2 sh2.s -isa=sh2 sh2 sh2.s -isa=sh2-up sh2 + sh2.s -isa=sh2a-nofpu-or-sh3-nommu sh2a-nofpu + sh2.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-nofpu-or-sh3-nommu + sh2.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu sh2a-nofpu + sh2.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-nofpu-or-sh4-nommu-nofpu + sh2.s -isa=sh2a-or-sh3e ERROR + sh2.s -isa=sh2a-or-sh3e-up sh2a-or-sh3e + sh2.s -isa=sh2a-or-sh4 ERROR + sh2.s -isa=sh2a-or-sh4-up sh2a-or-sh4 sh2.s -isa=sh2e sh2e sh2.s -isa=sh2e-up sh2e sh2.s -isa=sh3-dsp sh3-dsp sh2.s -isa=sh3-dsp-up sh3-dsp ! sh2.s -isa=sh3-nommu sh2a-nofpu-or-sh3-nommu ! sh2.s -isa=sh3-nommu-up sh2a-nofpu-or-sh3-nommu ! sh2.s -isa=sh3 sh2a-nofpu-or-sh3-nommu ! sh2.s -isa=sh3-up sh2a-nofpu-or-sh3-nommu ! sh2.s -isa=sh3e sh2a-or-sh3e ! sh2.s -isa=sh3e-up sh2a-or-sh3e sh2.s -isa=sh4-nofpu sh4-nofpu sh2.s -isa=sh4-nofpu-up sh4-nofpu sh2.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu *************** sh2.s -isa=sh4a *** 109,114 **** --- 133,302 ---- sh2.s -isa=sh4a-up sh4a sh2.s -isa=sh4al-dsp sh4al-dsp sh2.s -isa=sh4al-dsp-up sh4al-dsp + sh2a-nofpu-or-sh3-nommu.s default-options sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -dsp sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=any sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=dsp sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=fp sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=sh-dsp ERROR + sh2a-nofpu-or-sh3-nommu.s -isa=sh-dsp-up sh3-dsp + sh2a-nofpu-or-sh3-nommu.s -isa=sh ERROR + sh2a-nofpu-or-sh3-nommu.s -isa=sh-up sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=sh2 ERROR + sh2a-nofpu-or-sh3-nommu.s -isa=sh2-up sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=sh2a-nofpu-or-sh3-nommu sh2a-nofpu + sh2a-nofpu-or-sh3-nommu.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu sh2a-nofpu + sh2a-nofpu-or-sh3-nommu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh3-nommu.s -isa=sh2a-or-sh3e ERROR + sh2a-nofpu-or-sh3-nommu.s -isa=sh2a-or-sh3e-up sh2a-or-sh3e + sh2a-nofpu-or-sh3-nommu.s -isa=sh2a-or-sh4 ERROR + sh2a-nofpu-or-sh3-nommu.s -isa=sh2a-or-sh4-up sh2a-or-sh4 + sh2a-nofpu-or-sh3-nommu.s -isa=sh2e sh2a-or-sh3e + sh2a-nofpu-or-sh3-nommu.s -isa=sh2e-up sh2a-or-sh3e + sh2a-nofpu-or-sh3-nommu.s -isa=sh3-dsp sh3-dsp + sh2a-nofpu-or-sh3-nommu.s -isa=sh3-dsp-up sh3-dsp + sh2a-nofpu-or-sh3-nommu.s -isa=sh3-nommu sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=sh3-nommu-up sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=sh3 sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=sh3-up sh2a-nofpu-or-sh3-nommu + sh2a-nofpu-or-sh3-nommu.s -isa=sh3e sh2a-or-sh3e + sh2a-nofpu-or-sh3-nommu.s -isa=sh3e-up sh2a-or-sh3e + sh2a-nofpu-or-sh3-nommu.s -isa=sh4-nofpu sh4-nofpu + sh2a-nofpu-or-sh3-nommu.s -isa=sh4-nofpu-up sh4-nofpu + sh2a-nofpu-or-sh3-nommu.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu + sh2a-nofpu-or-sh3-nommu.s -isa=sh4-nommu-nofpu-up sh4-nommu-nofpu + sh2a-nofpu-or-sh3-nommu.s -isa=sh4 sh4 + sh2a-nofpu-or-sh3-nommu.s -isa=sh4-up sh4 + sh2a-nofpu-or-sh3-nommu.s -isa=sh4a-nofpu sh4a-nofpu + sh2a-nofpu-or-sh3-nommu.s -isa=sh4a-nofpu-up sh4a-nofpu + sh2a-nofpu-or-sh3-nommu.s -isa=sh4a sh4a + sh2a-nofpu-or-sh3-nommu.s -isa=sh4a-up sh4a + sh2a-nofpu-or-sh3-nommu.s -isa=sh4al-dsp sh4al-dsp + sh2a-nofpu-or-sh3-nommu.s -isa=sh4al-dsp-up sh4al-dsp + sh2a-nofpu-or-sh4-nommu-nofpu.s default-options sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -dsp sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=any sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=dsp sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=fp sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh-dsp ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh-dsp-up sh4al-dsp + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh-up sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2 ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2-up sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu sh2a-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu sh2a-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh3e ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh3e-up sh2a-or-sh4 + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh4 ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2a-or-sh4-up sh2a-or-sh4 + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2e ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh2e-up sh2a-or-sh4 + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-dsp ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-dsp-up sh4al-dsp + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-nommu ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-nommu-up sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3 ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3-up sh2a-nofpu-or-sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3e ERROR + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh3e-up sh2a-or-sh4 + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4-nofpu sh4-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4-nofpu-up sh4-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4-nommu-nofpu-up sh4-nommu-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4 sh4 + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4-up sh4 + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4a-nofpu sh4a-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4a-nofpu-up sh4a-nofpu + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4a sh4a + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4a-up sh4a + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4al-dsp sh4al-dsp + sh2a-nofpu-or-sh4-nommu-nofpu.s -isa=sh4al-dsp-up sh4al-dsp + sh2a-or-sh3e.s default-options sh2a-or-sh3e + sh2a-or-sh3e.s -dsp ERROR + sh2a-or-sh3e.s -isa=any sh2a-or-sh3e + sh2a-or-sh3e.s -isa=dsp ERROR + sh2a-or-sh3e.s -isa=fp sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh-dsp ERROR + sh2a-or-sh3e.s -isa=sh-dsp-up ERROR + sh2a-or-sh3e.s -isa=sh ERROR + sh2a-or-sh3e.s -isa=sh-up sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh2 ERROR + sh2a-or-sh3e.s -isa=sh2-up sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh2a-or-sh3e.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR + sh2a-or-sh3e.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-or-sh4 + sh2a-or-sh3e.s -isa=sh2a-or-sh3e ERROR + sh2a-or-sh3e.s -isa=sh2a-or-sh3e-up sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh2a-or-sh4 ERROR + sh2a-or-sh3e.s -isa=sh2a-or-sh4-up sh2a-or-sh4 + sh2a-or-sh3e.s -isa=sh2e sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh2e-up sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh3-dsp ERROR + sh2a-or-sh3e.s -isa=sh3-dsp-up ERROR + sh2a-or-sh3e.s -isa=sh3-nommu ERROR + sh2a-or-sh3e.s -isa=sh3-nommu-up sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh3 ERROR + sh2a-or-sh3e.s -isa=sh3-up sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh3e sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh3e-up sh2a-or-sh3e + sh2a-or-sh3e.s -isa=sh4-nofpu ERROR + sh2a-or-sh3e.s -isa=sh4-nofpu-up sh4 + sh2a-or-sh3e.s -isa=sh4-nommu-nofpu ERROR + sh2a-or-sh3e.s -isa=sh4-nommu-nofpu-up sh4 + sh2a-or-sh3e.s -isa=sh4 sh4 + sh2a-or-sh3e.s -isa=sh4-up sh4 + sh2a-or-sh3e.s -isa=sh4a-nofpu ERROR + sh2a-or-sh3e.s -isa=sh4a-nofpu-up sh4a + sh2a-or-sh3e.s -isa=sh4a sh4a + sh2a-or-sh3e.s -isa=sh4a-up sh4a + sh2a-or-sh3e.s -isa=sh4al-dsp ERROR + sh2a-or-sh3e.s -isa=sh4al-dsp-up ERROR + sh2a-or-sh4.s default-options sh2a-or-sh4 + sh2a-or-sh4.s -dsp ERROR + sh2a-or-sh4.s -isa=any sh2a-or-sh4 + sh2a-or-sh4.s -isa=dsp ERROR + sh2a-or-sh4.s -isa=fp sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh-dsp ERROR + sh2a-or-sh4.s -isa=sh-dsp-up ERROR + sh2a-or-sh4.s -isa=sh ERROR + sh2a-or-sh4.s -isa=sh-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh2 ERROR + sh2a-or-sh4.s -isa=sh2-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh2a-or-sh4.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR + sh2a-or-sh4.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh2a-or-sh3e ERROR + sh2a-or-sh4.s -isa=sh2a-or-sh3e-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh2a-or-sh4 ERROR + sh2a-or-sh4.s -isa=sh2a-or-sh4-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh2e ERROR + sh2a-or-sh4.s -isa=sh2e-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh3-dsp ERROR + sh2a-or-sh4.s -isa=sh3-dsp-up ERROR + sh2a-or-sh4.s -isa=sh3-nommu ERROR + sh2a-or-sh4.s -isa=sh3-nommu-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh3 ERROR + sh2a-or-sh4.s -isa=sh3-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh3e ERROR + sh2a-or-sh4.s -isa=sh3e-up sh2a-or-sh4 + sh2a-or-sh4.s -isa=sh4-nofpu ERROR + sh2a-or-sh4.s -isa=sh4-nofpu-up sh4 + sh2a-or-sh4.s -isa=sh4-nommu-nofpu ERROR + sh2a-or-sh4.s -isa=sh4-nommu-nofpu-up sh4 + sh2a-or-sh4.s -isa=sh4 sh4 + sh2a-or-sh4.s -isa=sh4-up sh4 + sh2a-or-sh4.s -isa=sh4a-nofpu ERROR + sh2a-or-sh4.s -isa=sh4a-nofpu-up sh4a + sh2a-or-sh4.s -isa=sh4a sh4a + sh2a-or-sh4.s -isa=sh4a-up sh4a + sh2a-or-sh4.s -isa=sh4al-dsp ERROR + sh2a-or-sh4.s -isa=sh4al-dsp-up ERROR sh2e.s default-options sh2e sh2e.s -dsp ERROR sh2e.s -isa=any sh2e *************** sh2e.s -isa=sh *** 120,135 **** sh2e.s -isa=sh-up sh2e sh2e.s -isa=sh2 ERROR sh2e.s -isa=sh2-up sh2e sh2e.s -isa=sh2e sh2e sh2e.s -isa=sh2e-up sh2e sh2e.s -isa=sh3-dsp ERROR sh2e.s -isa=sh3-dsp-up ERROR sh2e.s -isa=sh3-nommu ERROR ! sh2e.s -isa=sh3-nommu-up sh3e sh2e.s -isa=sh3 ERROR ! sh2e.s -isa=sh3-up sh3e ! sh2e.s -isa=sh3e sh3e ! sh2e.s -isa=sh3e-up sh3e sh2e.s -isa=sh4-nofpu ERROR sh2e.s -isa=sh4-nofpu-up sh4 sh2e.s -isa=sh4-nommu-nofpu ERROR --- 308,331 ---- sh2e.s -isa=sh-up sh2e sh2e.s -isa=sh2 ERROR sh2e.s -isa=sh2-up sh2e + sh2e.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh2e.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-or-sh3e + sh2e.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR + sh2e.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-or-sh4 + sh2e.s -isa=sh2a-or-sh3e ERROR + sh2e.s -isa=sh2a-or-sh3e-up sh2a-or-sh3e + sh2e.s -isa=sh2a-or-sh4 ERROR + sh2e.s -isa=sh2a-or-sh4-up sh2a-or-sh4 sh2e.s -isa=sh2e sh2e sh2e.s -isa=sh2e-up sh2e sh2e.s -isa=sh3-dsp ERROR sh2e.s -isa=sh3-dsp-up ERROR sh2e.s -isa=sh3-nommu ERROR ! sh2e.s -isa=sh3-nommu-up sh2a-or-sh3e sh2e.s -isa=sh3 ERROR ! sh2e.s -isa=sh3-up sh2a-or-sh3e ! sh2e.s -isa=sh3e sh2a-or-sh3e ! sh2e.s -isa=sh3e-up sh2a-or-sh3e sh2e.s -isa=sh4-nofpu ERROR sh2e.s -isa=sh4-nofpu-up sh4 sh2e.s -isa=sh4-nommu-nofpu ERROR *************** sh3-dsp.s -isa=sh *** 153,158 **** --- 349,362 ---- sh3-dsp.s -isa=sh-up sh3-dsp sh3-dsp.s -isa=sh2 ERROR sh3-dsp.s -isa=sh2-up sh3-dsp + sh3-dsp.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh3-dsp.s -isa=sh2a-nofpu-or-sh3-nommu-up sh3-dsp + sh3-dsp.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR + sh3-dsp.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh4al-dsp + sh3-dsp.s -isa=sh2a-or-sh3e ERROR + sh3-dsp.s -isa=sh2a-or-sh3e-up ERROR + sh3-dsp.s -isa=sh2a-or-sh4 ERROR + sh3-dsp.s -isa=sh2a-or-sh4-up ERROR sh3-dsp.s -isa=sh2e ERROR sh3-dsp.s -isa=sh2e-up ERROR sh3-dsp.s -isa=sh3-dsp sh3-dsp *************** sh3-dsp.s -isa=sh4a *** 175,201 **** sh3-dsp.s -isa=sh4a-up ERROR sh3-dsp.s -isa=sh4al-dsp sh4al-dsp sh3-dsp.s -isa=sh4al-dsp-up sh4al-dsp ! sh3-nommu.s default-options sh3-nommu ! sh3-nommu.s -dsp sh3-nommu ! sh3-nommu.s -isa=any sh3-nommu ! sh3-nommu.s -isa=dsp sh3-nommu ! sh3-nommu.s -isa=fp sh3-nommu sh3-nommu.s -isa=sh-dsp ERROR sh3-nommu.s -isa=sh-dsp-up sh3-dsp sh3-nommu.s -isa=sh ERROR ! sh3-nommu.s -isa=sh-up sh3-nommu sh3-nommu.s -isa=sh2 ERROR ! sh3-nommu.s -isa=sh2-up sh3-nommu ! sh3-nommu.s -isa=sh2e ERROR ! sh3-nommu.s -isa=sh2e-up sh3e sh3-nommu.s -isa=sh3-dsp sh3-dsp sh3-nommu.s -isa=sh3-dsp-up sh3-dsp ! sh3-nommu.s -isa=sh3-nommu sh3-nommu ! sh3-nommu.s -isa=sh3-nommu-up sh3-nommu ! sh3-nommu.s -isa=sh3 sh3 ! sh3-nommu.s -isa=sh3-up sh3 ! sh3-nommu.s -isa=sh3e sh3e ! sh3-nommu.s -isa=sh3e-up sh3e sh3-nommu.s -isa=sh4-nofpu sh4-nofpu sh3-nommu.s -isa=sh4-nofpu-up sh4-nofpu sh3-nommu.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu --- 379,413 ---- sh3-dsp.s -isa=sh4a-up ERROR sh3-dsp.s -isa=sh4al-dsp sh4al-dsp sh3-dsp.s -isa=sh4al-dsp-up sh4al-dsp ! sh3-nommu.s default-options sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -dsp sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -isa=any sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -isa=dsp sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -isa=fp sh2a-nofpu-or-sh3-nommu sh3-nommu.s -isa=sh-dsp ERROR sh3-nommu.s -isa=sh-dsp-up sh3-dsp sh3-nommu.s -isa=sh ERROR ! sh3-nommu.s -isa=sh-up sh2a-nofpu-or-sh3-nommu sh3-nommu.s -isa=sh2 ERROR ! sh3-nommu.s -isa=sh2-up sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -isa=sh2a-nofpu-or-sh3-nommu sh2a-nofpu ! sh3-nommu.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu sh2a-nofpu ! sh3-nommu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-nofpu-or-sh4-nommu-nofpu ! sh3-nommu.s -isa=sh2a-or-sh3e ERROR ! sh3-nommu.s -isa=sh2a-or-sh3e-up sh2a-or-sh3e ! sh3-nommu.s -isa=sh2a-or-sh4 ERROR ! sh3-nommu.s -isa=sh2a-or-sh4-up sh2a-or-sh4 ! sh3-nommu.s -isa=sh2e sh2a-or-sh3e ! sh3-nommu.s -isa=sh2e-up sh2a-or-sh3e sh3-nommu.s -isa=sh3-dsp sh3-dsp sh3-nommu.s -isa=sh3-dsp-up sh3-dsp ! sh3-nommu.s -isa=sh3-nommu sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -isa=sh3-nommu-up sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -isa=sh3 sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -isa=sh3-up sh2a-nofpu-or-sh3-nommu ! sh3-nommu.s -isa=sh3e sh2a-or-sh3e ! sh3-nommu.s -isa=sh3e-up sh2a-or-sh3e sh3-nommu.s -isa=sh4-nofpu sh4-nofpu sh3-nommu.s -isa=sh4-nofpu-up sh4-nofpu sh3-nommu.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu *************** sh3-nommu.s -isa=sh4a *** 208,238 **** sh3-nommu.s -isa=sh4a-up sh4a sh3-nommu.s -isa=sh4al-dsp sh4al-dsp sh3-nommu.s -isa=sh4al-dsp-up sh4al-dsp ! sh3.s default-options sh3 ! sh3.s -dsp sh3 ! sh3.s -isa=any sh3 ! sh3.s -isa=dsp sh3 ! sh3.s -isa=fp sh3 sh3.s -isa=sh-dsp ERROR sh3.s -isa=sh-dsp-up sh3-dsp sh3.s -isa=sh ERROR ! sh3.s -isa=sh-up sh3 sh3.s -isa=sh2 ERROR ! sh3.s -isa=sh2-up sh3 ! sh3.s -isa=sh2e ERROR ! sh3.s -isa=sh2e-up sh3e sh3.s -isa=sh3-dsp sh3-dsp sh3.s -isa=sh3-dsp-up sh3-dsp ! sh3.s -isa=sh3-nommu ERROR ! sh3.s -isa=sh3-nommu-up sh3 ! sh3.s -isa=sh3 sh3 ! sh3.s -isa=sh3-up sh3 ! sh3.s -isa=sh3e sh3e ! sh3.s -isa=sh3e-up sh3e sh3.s -isa=sh4-nofpu sh4-nofpu sh3.s -isa=sh4-nofpu-up sh4-nofpu ! sh3.s -isa=sh4-nommu-nofpu ERROR ! sh3.s -isa=sh4-nommu-nofpu-up sh4-nofpu sh3.s -isa=sh4 sh4 sh3.s -isa=sh4-up sh4 sh3.s -isa=sh4a-nofpu sh4a-nofpu --- 420,458 ---- sh3-nommu.s -isa=sh4a-up sh4a sh3-nommu.s -isa=sh4al-dsp sh4al-dsp sh3-nommu.s -isa=sh4al-dsp-up sh4al-dsp ! sh3.s default-options sh2a-nofpu-or-sh3-nommu ! sh3.s -dsp sh2a-nofpu-or-sh3-nommu ! sh3.s -isa=any sh2a-nofpu-or-sh3-nommu ! sh3.s -isa=dsp sh2a-nofpu-or-sh3-nommu ! sh3.s -isa=fp sh2a-nofpu-or-sh3-nommu sh3.s -isa=sh-dsp ERROR sh3.s -isa=sh-dsp-up sh3-dsp sh3.s -isa=sh ERROR ! sh3.s -isa=sh-up sh2a-nofpu-or-sh3-nommu sh3.s -isa=sh2 ERROR ! sh3.s -isa=sh2-up sh2a-nofpu-or-sh3-nommu ! sh3.s -isa=sh2a-nofpu-or-sh3-nommu sh2a-nofpu ! sh3.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-nofpu-or-sh3-nommu ! sh3.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu sh2a-nofpu ! sh3.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-nofpu-or-sh4-nommu-nofpu ! sh3.s -isa=sh2a-or-sh3e ERROR ! sh3.s -isa=sh2a-or-sh3e-up sh2a-or-sh3e ! sh3.s -isa=sh2a-or-sh4 ERROR ! sh3.s -isa=sh2a-or-sh4-up sh2a-or-sh4 ! sh3.s -isa=sh2e sh2a-or-sh3e ! sh3.s -isa=sh2e-up sh2a-or-sh3e sh3.s -isa=sh3-dsp sh3-dsp sh3.s -isa=sh3-dsp-up sh3-dsp ! sh3.s -isa=sh3-nommu sh2a-nofpu-or-sh3-nommu ! sh3.s -isa=sh3-nommu-up sh2a-nofpu-or-sh3-nommu ! sh3.s -isa=sh3 sh2a-nofpu-or-sh3-nommu ! sh3.s -isa=sh3-up sh2a-nofpu-or-sh3-nommu ! sh3.s -isa=sh3e sh2a-or-sh3e ! sh3.s -isa=sh3e-up sh2a-or-sh3e sh3.s -isa=sh4-nofpu sh4-nofpu sh3.s -isa=sh4-nofpu-up sh4-nofpu ! sh3.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu ! sh3.s -isa=sh4-nommu-nofpu-up sh4-nommu-nofpu sh3.s -isa=sh4 sh4 sh3.s -isa=sh4-up sh4 sh3.s -isa=sh4a-nofpu sh4a-nofpu *************** sh3.s -isa=sh4a *** 241,267 **** sh3.s -isa=sh4a-up sh4a sh3.s -isa=sh4al-dsp sh4al-dsp sh3.s -isa=sh4al-dsp-up sh4al-dsp ! sh3e.s default-options sh3e sh3e.s -dsp ERROR ! sh3e.s -isa=any sh3e sh3e.s -isa=dsp ERROR ! sh3e.s -isa=fp sh3e sh3e.s -isa=sh-dsp ERROR sh3e.s -isa=sh-dsp-up ERROR sh3e.s -isa=sh ERROR ! sh3e.s -isa=sh-up sh3e sh3e.s -isa=sh2 ERROR ! sh3e.s -isa=sh2-up sh3e ! sh3e.s -isa=sh2e ERROR ! sh3e.s -isa=sh2e-up sh3e sh3e.s -isa=sh3-dsp ERROR sh3e.s -isa=sh3-dsp-up ERROR sh3e.s -isa=sh3-nommu ERROR ! sh3e.s -isa=sh3-nommu-up sh3e sh3e.s -isa=sh3 ERROR ! sh3e.s -isa=sh3-up sh3e ! sh3e.s -isa=sh3e sh3e ! sh3e.s -isa=sh3e-up sh3e sh3e.s -isa=sh4-nofpu ERROR sh3e.s -isa=sh4-nofpu-up sh4 sh3e.s -isa=sh4-nommu-nofpu ERROR --- 461,495 ---- sh3.s -isa=sh4a-up sh4a sh3.s -isa=sh4al-dsp sh4al-dsp sh3.s -isa=sh4al-dsp-up sh4al-dsp ! sh3e.s default-options sh2a-or-sh3e sh3e.s -dsp ERROR ! sh3e.s -isa=any sh2a-or-sh3e sh3e.s -isa=dsp ERROR ! sh3e.s -isa=fp sh2a-or-sh3e sh3e.s -isa=sh-dsp ERROR sh3e.s -isa=sh-dsp-up ERROR sh3e.s -isa=sh ERROR ! sh3e.s -isa=sh-up sh2a-or-sh3e sh3e.s -isa=sh2 ERROR ! sh3e.s -isa=sh2-up sh2a-or-sh3e ! sh3e.s -isa=sh2a-nofpu-or-sh3-nommu ERROR ! sh3e.s -isa=sh2a-nofpu-or-sh3-nommu-up sh2a-or-sh3e ! sh3e.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR ! sh3e.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh2a-or-sh4 ! sh3e.s -isa=sh2a-or-sh3e ERROR ! sh3e.s -isa=sh2a-or-sh3e-up sh2a-or-sh3e ! sh3e.s -isa=sh2a-or-sh4 ERROR ! sh3e.s -isa=sh2a-or-sh4-up sh2a-or-sh4 ! sh3e.s -isa=sh2e sh2a-or-sh3e ! sh3e.s -isa=sh2e-up sh2a-or-sh3e sh3e.s -isa=sh3-dsp ERROR sh3e.s -isa=sh3-dsp-up ERROR sh3e.s -isa=sh3-nommu ERROR ! sh3e.s -isa=sh3-nommu-up sh2a-or-sh3e sh3e.s -isa=sh3 ERROR ! sh3e.s -isa=sh3-up sh2a-or-sh3e ! sh3e.s -isa=sh3e sh2a-or-sh3e ! sh3e.s -isa=sh3e-up sh2a-or-sh3e sh3e.s -isa=sh4-nofpu ERROR sh3e.s -isa=sh4-nofpu-up sh4 sh3e.s -isa=sh4-nommu-nofpu ERROR *************** sh3e.s -isa=sh4a *** 274,304 **** sh3e.s -isa=sh4a-up sh4a sh3e.s -isa=sh4al-dsp ERROR sh3e.s -isa=sh4al-dsp-up ERROR ! sh4-nofpu.s default-options sh4-nofpu ! sh4-nofpu.s -dsp sh4-nofpu ! sh4-nofpu.s -isa=any sh4-nofpu ! sh4-nofpu.s -isa=dsp sh4-nofpu ! sh4-nofpu.s -isa=fp sh4-nofpu sh4-nofpu.s -isa=sh-dsp ERROR sh4-nofpu.s -isa=sh-dsp-up sh4al-dsp sh4-nofpu.s -isa=sh ERROR ! sh4-nofpu.s -isa=sh-up sh4-nofpu sh4-nofpu.s -isa=sh2 ERROR ! sh4-nofpu.s -isa=sh2-up sh4-nofpu sh4-nofpu.s -isa=sh2e ERROR sh4-nofpu.s -isa=sh2e-up sh4 sh4-nofpu.s -isa=sh3-dsp ERROR sh4-nofpu.s -isa=sh3-dsp-up sh4al-dsp sh4-nofpu.s -isa=sh3-nommu ERROR ! sh4-nofpu.s -isa=sh3-nommu-up sh4-nofpu sh4-nofpu.s -isa=sh3 ERROR ! sh4-nofpu.s -isa=sh3-up sh4-nofpu sh4-nofpu.s -isa=sh3e ERROR sh4-nofpu.s -isa=sh3e-up sh4 sh4-nofpu.s -isa=sh4-nofpu sh4-nofpu sh4-nofpu.s -isa=sh4-nofpu-up sh4-nofpu ! sh4-nofpu.s -isa=sh4-nommu-nofpu ERROR ! sh4-nofpu.s -isa=sh4-nommu-nofpu-up sh4-nofpu sh4-nofpu.s -isa=sh4 sh4 sh4-nofpu.s -isa=sh4-up sh4 sh4-nofpu.s -isa=sh4a-nofpu sh4a-nofpu --- 502,540 ---- sh3e.s -isa=sh4a-up sh4a sh3e.s -isa=sh4al-dsp ERROR sh3e.s -isa=sh4al-dsp-up ERROR ! sh4-nofpu.s default-options sh4-nommu-nofpu ! sh4-nofpu.s -dsp sh4-nommu-nofpu ! sh4-nofpu.s -isa=any sh4-nommu-nofpu ! sh4-nofpu.s -isa=dsp sh4-nommu-nofpu ! sh4-nofpu.s -isa=fp sh4-nommu-nofpu sh4-nofpu.s -isa=sh-dsp ERROR sh4-nofpu.s -isa=sh-dsp-up sh4al-dsp sh4-nofpu.s -isa=sh ERROR ! sh4-nofpu.s -isa=sh-up sh4-nommu-nofpu sh4-nofpu.s -isa=sh2 ERROR ! sh4-nofpu.s -isa=sh2-up sh4-nommu-nofpu ! sh4-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu ERROR ! sh4-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu-up sh4-nommu-nofpu ! sh4-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu sh4-nommu-nofpu ! sh4-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh4-nommu-nofpu ! sh4-nofpu.s -isa=sh2a-or-sh3e ERROR ! sh4-nofpu.s -isa=sh2a-or-sh3e-up sh4 ! sh4-nofpu.s -isa=sh2a-or-sh4 ERROR ! sh4-nofpu.s -isa=sh2a-or-sh4-up sh4 sh4-nofpu.s -isa=sh2e ERROR sh4-nofpu.s -isa=sh2e-up sh4 sh4-nofpu.s -isa=sh3-dsp ERROR sh4-nofpu.s -isa=sh3-dsp-up sh4al-dsp sh4-nofpu.s -isa=sh3-nommu ERROR ! sh4-nofpu.s -isa=sh3-nommu-up sh4-nommu-nofpu sh4-nofpu.s -isa=sh3 ERROR ! sh4-nofpu.s -isa=sh3-up sh4-nommu-nofpu sh4-nofpu.s -isa=sh3e ERROR sh4-nofpu.s -isa=sh3e-up sh4 sh4-nofpu.s -isa=sh4-nofpu sh4-nofpu sh4-nofpu.s -isa=sh4-nofpu-up sh4-nofpu ! sh4-nofpu.s -isa=sh4-nommu-nofpu sh4-nommu-nofpu ! sh4-nofpu.s -isa=sh4-nommu-nofpu-up sh4-nommu-nofpu sh4-nofpu.s -isa=sh4 sh4 sh4-nofpu.s -isa=sh4-up sh4 sh4-nofpu.s -isa=sh4a-nofpu sh4a-nofpu *************** sh4-nommu-nofpu.s -isa=sh *** 318,323 **** --- 554,567 ---- sh4-nommu-nofpu.s -isa=sh-up sh4-nommu-nofpu sh4-nommu-nofpu.s -isa=sh2 ERROR sh4-nommu-nofpu.s -isa=sh2-up sh4-nommu-nofpu + sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu-up sh4-nommu-nofpu + sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu sh4-nommu-nofpu + sh4-nommu-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh4-nommu-nofpu + sh4-nommu-nofpu.s -isa=sh2a-or-sh3e ERROR + sh4-nommu-nofpu.s -isa=sh2a-or-sh3e-up sh4 + sh4-nommu-nofpu.s -isa=sh2a-or-sh4 ERROR + sh4-nommu-nofpu.s -isa=sh2a-or-sh4-up sh4 sh4-nommu-nofpu.s -isa=sh2e ERROR sh4-nommu-nofpu.s -isa=sh2e-up sh4 sh4-nommu-nofpu.s -isa=sh3-dsp ERROR *************** sh4-nommu-nofpu.s -isa=sh3-dsp-up *** 325,331 **** sh4-nommu-nofpu.s -isa=sh3-nommu ERROR sh4-nommu-nofpu.s -isa=sh3-nommu-up sh4-nommu-nofpu sh4-nommu-nofpu.s -isa=sh3 ERROR ! sh4-nommu-nofpu.s -isa=sh3-up sh4-nofpu sh4-nommu-nofpu.s -isa=sh3e ERROR sh4-nommu-nofpu.s -isa=sh3e-up sh4 sh4-nommu-nofpu.s -isa=sh4-nofpu sh4-nofpu --- 569,575 ---- sh4-nommu-nofpu.s -isa=sh3-nommu ERROR sh4-nommu-nofpu.s -isa=sh3-nommu-up sh4-nommu-nofpu sh4-nommu-nofpu.s -isa=sh3 ERROR ! sh4-nommu-nofpu.s -isa=sh3-up sh4-nommu-nofpu sh4-nommu-nofpu.s -isa=sh3e ERROR sh4-nommu-nofpu.s -isa=sh3e-up sh4 sh4-nommu-nofpu.s -isa=sh4-nofpu sh4-nofpu *************** sh4.s -isa=sh *** 351,356 **** --- 595,608 ---- sh4.s -isa=sh-up sh4 sh4.s -isa=sh2 ERROR sh4.s -isa=sh2-up sh4 + sh4.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh4.s -isa=sh2a-nofpu-or-sh3-nommu-up sh4 + sh4.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR + sh4.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh4 + sh4.s -isa=sh2a-or-sh3e ERROR + sh4.s -isa=sh2a-or-sh3e-up sh4 + sh4.s -isa=sh2a-or-sh4 ERROR + sh4.s -isa=sh2a-or-sh4-up sh4 sh4.s -isa=sh2e ERROR sh4.s -isa=sh2e-up sh4 sh4.s -isa=sh3-dsp ERROR *************** sh4a-nofpu.s -isa=sh *** 384,389 **** --- 636,649 ---- sh4a-nofpu.s -isa=sh-up sh4a-nofpu sh4a-nofpu.s -isa=sh2 ERROR sh4a-nofpu.s -isa=sh2-up sh4a-nofpu + sh4a-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh4a-nofpu.s -isa=sh2a-nofpu-or-sh3-nommu-up sh4a-nofpu + sh4a-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR + sh4a-nofpu.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh4a-nofpu + sh4a-nofpu.s -isa=sh2a-or-sh3e ERROR + sh4a-nofpu.s -isa=sh2a-or-sh3e-up sh4a + sh4a-nofpu.s -isa=sh2a-or-sh4 ERROR + sh4a-nofpu.s -isa=sh2a-or-sh4-up sh4a sh4a-nofpu.s -isa=sh2e ERROR sh4a-nofpu.s -isa=sh2e-up sh4a sh4a-nofpu.s -isa=sh3-dsp ERROR *************** sh4a.s -isa=sh *** 417,422 **** --- 677,690 ---- sh4a.s -isa=sh-up sh4a sh4a.s -isa=sh2 ERROR sh4a.s -isa=sh2-up sh4a + sh4a.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh4a.s -isa=sh2a-nofpu-or-sh3-nommu-up sh4a + sh4a.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR + sh4a.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh4a + sh4a.s -isa=sh2a-or-sh3e ERROR + sh4a.s -isa=sh2a-or-sh3e-up sh4a + sh4a.s -isa=sh2a-or-sh4 ERROR + sh4a.s -isa=sh2a-or-sh4-up sh4a sh4a.s -isa=sh2e ERROR sh4a.s -isa=sh2e-up sh4a sh4a.s -isa=sh3-dsp ERROR *************** sh4al-dsp.s -isa=sh *** 450,455 **** --- 718,731 ---- sh4al-dsp.s -isa=sh-up sh4al-dsp sh4al-dsp.s -isa=sh2 ERROR sh4al-dsp.s -isa=sh2-up sh4al-dsp + sh4al-dsp.s -isa=sh2a-nofpu-or-sh3-nommu ERROR + sh4al-dsp.s -isa=sh2a-nofpu-or-sh3-nommu-up sh4al-dsp + sh4al-dsp.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu ERROR + sh4al-dsp.s -isa=sh2a-nofpu-or-sh4-nommu-nofpu-up sh4al-dsp + sh4al-dsp.s -isa=sh2a-or-sh3e ERROR + sh4al-dsp.s -isa=sh2a-or-sh3e-up ERROR + sh4al-dsp.s -isa=sh2a-or-sh4 ERROR + sh4al-dsp.s -isa=sh2a-or-sh4-up ERROR sh4al-dsp.s -isa=sh2e ERROR sh4al-dsp.s -isa=sh2e-up ERROR sh4al-dsp.s -isa=sh3-dsp ERROR Index: gas/testsuite/gas/sh/arch/sh4.s =================================================================== RCS file: /cvs/src/src/gas/testsuite/gas/sh/arch/sh4.s,v retrieving revision 1.1 diff -c -3 -p -r1.1 sh4.s *** gas/testsuite/gas/sh/arch/sh4.s 29 Jun 2004 16:35:05 -0000 1.1 --- gas/testsuite/gas/sh/arch/sh4.s 15 Dec 2004 16:36:27 -0000 *************** *** 1,3 **** .section .text sh4: ! fabs dr0 --- 1,4 ---- .section .text sh4: ! frchg ! Index: ld/testsuite/ld-sh/arch/arch_expected.txt =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-sh/arch/arch_expected.txt,v retrieving revision 1.1 diff -c -3 -p -r1.1 arch_expected.txt *** ld/testsuite/ld-sh/arch/arch_expected.txt 29 Jun 2004 16:35:05 -0000 1.1 --- ld/testsuite/ld-sh/arch/arch_expected.txt 15 Dec 2004 16:36:28 -0000 *************** *** 4,10 **** # It contains the expected results of the tests. # If the tests are failing because the expected results # have changed then run 'make check' and copy the new file ! # from /ld/testsuite/arch_results.txt # to /ld/testsuite/ld-sh/arch/arch_expected.txt . # Make sure the new expected results are ALL correct. # --- 4,10 ---- # It contains the expected results of the tests. # If the tests are failing because the expected results # have changed then run 'make check' and copy the new file ! # from /ld/arch_results.txt # to /ld/testsuite/ld-sh/arch/arch_expected.txt . # Make sure the new expected results are ALL correct. # *************** *** 13,18 **** --- 13,22 ---- sh-dsp.o sh-dsp.o sh-dsp sh-dsp.o sh.o sh-dsp sh-dsp.o sh2.o sh-dsp + sh-dsp.o sh2a-nofpu-or-sh3-nommu.o sh3-dsp + sh-dsp.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4al-dsp + sh-dsp.o sh2a-or-sh3e.o ERROR + sh-dsp.o sh2a-or-sh4.o ERROR sh-dsp.o sh2e.o ERROR sh-dsp.o sh3-dsp.o sh3-dsp sh-dsp.o sh3-nommu.o sh3-dsp *************** sh-dsp.o sh-unknown.o *** 28,78 **** sh.o sh-dsp.o sh-dsp sh.o sh.o sh sh.o sh2.o sh2 sh.o sh2e.o sh2e sh.o sh3-dsp.o sh3-dsp ! sh.o sh3-nommu.o sh3-nommu ! sh.o sh3.o sh3 ! sh.o sh3e.o sh3e ! sh.o sh4-nofpu.o sh4-nofpu sh.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh.o sh4.o sh4 sh.o sh4a-nofpu.o sh4a-nofpu sh.o sh4a.o sh4a sh.o sh4al-dsp.o sh4al-dsp ! sh.o sh-unknown.o sh3 sh2.o sh-dsp.o sh-dsp sh2.o sh.o sh2 sh2.o sh2.o sh2 sh2.o sh2e.o sh2e sh2.o sh3-dsp.o sh3-dsp ! sh2.o sh3-nommu.o sh3-nommu ! sh2.o sh3.o sh3 ! sh2.o sh3e.o sh3e ! sh2.o sh4-nofpu.o sh4-nofpu sh2.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh2.o sh4.o sh4 sh2.o sh4a-nofpu.o sh4a-nofpu sh2.o sh4a.o sh4a sh2.o sh4al-dsp.o sh4al-dsp ! sh2.o sh-unknown.o sh3 sh2e.o sh-dsp.o ERROR sh2e.o sh.o sh2e sh2e.o sh2.o sh2e sh2e.o sh2e.o sh2e sh2e.o sh3-dsp.o ERROR ! sh2e.o sh3-nommu.o sh3e ! sh2e.o sh3.o sh3e ! sh2e.o sh3e.o sh3e sh2e.o sh4-nofpu.o sh4 sh2e.o sh4-nommu-nofpu.o sh4 sh2e.o sh4.o sh4 sh2e.o sh4a-nofpu.o sh4a sh2e.o sh4a.o sh4a sh2e.o sh4al-dsp.o ERROR ! sh2e.o sh-unknown.o sh3e sh3-dsp.o sh-dsp.o sh3-dsp sh3-dsp.o sh.o sh3-dsp sh3-dsp.o sh2.o sh3-dsp sh3-dsp.o sh2e.o ERROR sh3-dsp.o sh3-dsp.o sh3-dsp sh3-dsp.o sh3-nommu.o sh3-dsp --- 32,174 ---- sh.o sh-dsp.o sh-dsp sh.o sh.o sh sh.o sh2.o sh2 + sh.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu + sh.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu + sh.o sh2a-or-sh3e.o sh2a-or-sh3e + sh.o sh2a-or-sh4.o sh2a-or-sh4 sh.o sh2e.o sh2e sh.o sh3-dsp.o sh3-dsp ! sh.o sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh.o sh3.o sh2a-nofpu-or-sh3-nommu ! sh.o sh3e.o sh2a-or-sh3e ! sh.o sh4-nofpu.o sh4-nommu-nofpu sh.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh.o sh4.o sh4 sh.o sh4a-nofpu.o sh4a-nofpu sh.o sh4a.o sh4a sh.o sh4al-dsp.o sh4al-dsp ! sh.o sh-unknown.o sh2a-nofpu-or-sh3-nommu sh2.o sh-dsp.o sh-dsp sh2.o sh.o sh2 sh2.o sh2.o sh2 + sh2.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu + sh2.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu + sh2.o sh2a-or-sh3e.o sh2a-or-sh3e + sh2.o sh2a-or-sh4.o sh2a-or-sh4 sh2.o sh2e.o sh2e sh2.o sh3-dsp.o sh3-dsp ! sh2.o sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh2.o sh3.o sh2a-nofpu-or-sh3-nommu ! sh2.o sh3e.o sh2a-or-sh3e ! sh2.o sh4-nofpu.o sh4-nommu-nofpu sh2.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh2.o sh4.o sh4 sh2.o sh4a-nofpu.o sh4a-nofpu sh2.o sh4a.o sh4a sh2.o sh4al-dsp.o sh4al-dsp ! sh2.o sh-unknown.o sh2a-nofpu-or-sh3-nommu ! sh2a-nofpu-or-sh3-nommu.o sh-dsp.o sh3-dsp ! sh2a-nofpu-or-sh3-nommu.o sh.o sh2a-nofpu-or-sh3-nommu ! sh2a-nofpu-or-sh3-nommu.o sh2.o sh2a-nofpu-or-sh3-nommu ! sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh3e.o sh2a-or-sh3e ! sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh4.o sh2a-or-sh4 ! sh2a-nofpu-or-sh3-nommu.o sh2e.o sh2a-or-sh3e ! sh2a-nofpu-or-sh3-nommu.o sh3-dsp.o sh3-dsp ! sh2a-nofpu-or-sh3-nommu.o sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh2a-nofpu-or-sh3-nommu.o sh3.o sh2a-nofpu-or-sh3-nommu ! sh2a-nofpu-or-sh3-nommu.o sh3e.o sh2a-or-sh3e ! sh2a-nofpu-or-sh3-nommu.o sh4-nofpu.o sh4-nommu-nofpu ! sh2a-nofpu-or-sh3-nommu.o sh4-nommu-nofpu.o sh4-nommu-nofpu ! sh2a-nofpu-or-sh3-nommu.o sh4.o sh4 ! sh2a-nofpu-or-sh3-nommu.o sh4a-nofpu.o sh4a-nofpu ! sh2a-nofpu-or-sh3-nommu.o sh4a.o sh4a ! sh2a-nofpu-or-sh3-nommu.o sh4al-dsp.o sh4al-dsp ! sh2a-nofpu-or-sh3-nommu.o sh-unknown.o sh2a-nofpu-or-sh3-nommu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh-dsp.o sh4al-dsp ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh2.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh3e.o sh2a-or-sh4 ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh4.o sh2a-or-sh4 ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh2e.o sh2a-or-sh4 ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh3-dsp.o sh4al-dsp ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh3-nommu.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh3.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh3e.o sh2a-or-sh4 ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh4-nofpu.o sh4-nommu-nofpu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh4-nommu-nofpu.o sh4-nommu-nofpu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh4.o sh4 ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh4a-nofpu.o sh4a-nofpu ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh4a.o sh4a ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh4al-dsp.o sh4al-dsp ! sh2a-nofpu-or-sh4-nommu-nofpu.o sh-unknown.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh2a-or-sh3e.o sh-dsp.o ERROR ! sh2a-or-sh3e.o sh.o sh2a-or-sh3e ! sh2a-or-sh3e.o sh2.o sh2a-or-sh3e ! sh2a-or-sh3e.o sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh3e ! sh2a-or-sh3e.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh4 ! sh2a-or-sh3e.o sh2a-or-sh3e.o sh2a-or-sh3e ! sh2a-or-sh3e.o sh2a-or-sh4.o sh2a-or-sh4 ! sh2a-or-sh3e.o sh2e.o sh2a-or-sh3e ! sh2a-or-sh3e.o sh3-dsp.o ERROR ! sh2a-or-sh3e.o sh3-nommu.o sh2a-or-sh3e ! sh2a-or-sh3e.o sh3.o sh2a-or-sh3e ! sh2a-or-sh3e.o sh3e.o sh2a-or-sh3e ! sh2a-or-sh3e.o sh4-nofpu.o sh4 ! sh2a-or-sh3e.o sh4-nommu-nofpu.o sh4 ! sh2a-or-sh3e.o sh4.o sh4 ! sh2a-or-sh3e.o sh4a-nofpu.o sh4a ! sh2a-or-sh3e.o sh4a.o sh4a ! sh2a-or-sh3e.o sh4al-dsp.o ERROR ! sh2a-or-sh3e.o sh-unknown.o sh2a-or-sh3e ! sh2a-or-sh4.o sh-dsp.o ERROR ! sh2a-or-sh4.o sh.o sh2a-or-sh4 ! sh2a-or-sh4.o sh2.o sh2a-or-sh4 ! sh2a-or-sh4.o sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh4 ! sh2a-or-sh4.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh4 ! sh2a-or-sh4.o sh2a-or-sh3e.o sh2a-or-sh4 ! sh2a-or-sh4.o sh2a-or-sh4.o sh2a-or-sh4 ! sh2a-or-sh4.o sh2e.o sh2a-or-sh4 ! sh2a-or-sh4.o sh3-dsp.o ERROR ! sh2a-or-sh4.o sh3-nommu.o sh2a-or-sh4 ! sh2a-or-sh4.o sh3.o sh2a-or-sh4 ! sh2a-or-sh4.o sh3e.o sh2a-or-sh4 ! sh2a-or-sh4.o sh4-nofpu.o sh4 ! sh2a-or-sh4.o sh4-nommu-nofpu.o sh4 ! sh2a-or-sh4.o sh4.o sh4 ! sh2a-or-sh4.o sh4a-nofpu.o sh4a ! sh2a-or-sh4.o sh4a.o sh4a ! sh2a-or-sh4.o sh4al-dsp.o ERROR ! sh2a-or-sh4.o sh-unknown.o sh2a-or-sh4 sh2e.o sh-dsp.o ERROR sh2e.o sh.o sh2e sh2e.o sh2.o sh2e + sh2e.o sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh3e + sh2e.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh4 + sh2e.o sh2a-or-sh3e.o sh2a-or-sh3e + sh2e.o sh2a-or-sh4.o sh2a-or-sh4 sh2e.o sh2e.o sh2e sh2e.o sh3-dsp.o ERROR ! sh2e.o sh3-nommu.o sh2a-or-sh3e ! sh2e.o sh3.o sh2a-or-sh3e ! sh2e.o sh3e.o sh2a-or-sh3e sh2e.o sh4-nofpu.o sh4 sh2e.o sh4-nommu-nofpu.o sh4 sh2e.o sh4.o sh4 sh2e.o sh4a-nofpu.o sh4a sh2e.o sh4a.o sh4a sh2e.o sh4al-dsp.o ERROR ! sh2e.o sh-unknown.o sh2a-or-sh3e sh3-dsp.o sh-dsp.o sh3-dsp sh3-dsp.o sh.o sh3-dsp sh3-dsp.o sh2.o sh3-dsp + sh3-dsp.o sh2a-nofpu-or-sh3-nommu.o sh3-dsp + sh3-dsp.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4al-dsp + sh3-dsp.o sh2a-or-sh3e.o ERROR + sh3-dsp.o sh2a-or-sh4.o ERROR sh3-dsp.o sh2e.o ERROR sh3-dsp.o sh3-dsp.o sh3-dsp sh3-dsp.o sh3-nommu.o sh3-dsp *************** sh3-dsp.o sh4a.o *** 86,168 **** sh3-dsp.o sh4al-dsp.o sh4al-dsp sh3-dsp.o sh-unknown.o sh3-dsp sh3-nommu.o sh-dsp.o sh3-dsp ! sh3-nommu.o sh.o sh3-nommu ! sh3-nommu.o sh2.o sh3-nommu ! sh3-nommu.o sh2e.o sh3e sh3-nommu.o sh3-dsp.o sh3-dsp ! sh3-nommu.o sh3-nommu.o sh3-nommu ! sh3-nommu.o sh3.o sh3 ! sh3-nommu.o sh3e.o sh3e ! sh3-nommu.o sh4-nofpu.o sh4-nofpu sh3-nommu.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh3-nommu.o sh4.o sh4 sh3-nommu.o sh4a-nofpu.o sh4a-nofpu sh3-nommu.o sh4a.o sh4a sh3-nommu.o sh4al-dsp.o sh4al-dsp ! sh3-nommu.o sh-unknown.o sh3 sh3.o sh-dsp.o sh3-dsp ! sh3.o sh.o sh3 ! sh3.o sh2.o sh3 ! sh3.o sh2e.o sh3e sh3.o sh3-dsp.o sh3-dsp ! sh3.o sh3-nommu.o sh3 ! sh3.o sh3.o sh3 ! sh3.o sh3e.o sh3e ! sh3.o sh4-nofpu.o sh4-nofpu ! sh3.o sh4-nommu-nofpu.o sh4-nofpu sh3.o sh4.o sh4 sh3.o sh4a-nofpu.o sh4a-nofpu sh3.o sh4a.o sh4a sh3.o sh4al-dsp.o sh4al-dsp ! sh3.o sh-unknown.o sh3 sh3e.o sh-dsp.o ERROR ! sh3e.o sh.o sh3e ! sh3e.o sh2.o sh3e ! sh3e.o sh2e.o sh3e sh3e.o sh3-dsp.o ERROR ! sh3e.o sh3-nommu.o sh3e ! sh3e.o sh3.o sh3e ! sh3e.o sh3e.o sh3e sh3e.o sh4-nofpu.o sh4 sh3e.o sh4-nommu-nofpu.o sh4 sh3e.o sh4.o sh4 sh3e.o sh4a-nofpu.o sh4a sh3e.o sh4a.o sh4a sh3e.o sh4al-dsp.o ERROR ! sh3e.o sh-unknown.o sh3e sh4-nofpu.o sh-dsp.o sh4al-dsp ! sh4-nofpu.o sh.o sh4-nofpu ! sh4-nofpu.o sh2.o sh4-nofpu sh4-nofpu.o sh2e.o sh4 sh4-nofpu.o sh3-dsp.o sh4al-dsp ! sh4-nofpu.o sh3-nommu.o sh4-nofpu ! sh4-nofpu.o sh3.o sh4-nofpu sh4-nofpu.o sh3e.o sh4 ! sh4-nofpu.o sh4-nofpu.o sh4-nofpu ! sh4-nofpu.o sh4-nommu-nofpu.o sh4-nofpu sh4-nofpu.o sh4.o sh4 sh4-nofpu.o sh4a-nofpu.o sh4a-nofpu sh4-nofpu.o sh4a.o sh4a sh4-nofpu.o sh4al-dsp.o sh4al-dsp ! sh4-nofpu.o sh-unknown.o sh4-nofpu sh4-nommu-nofpu.o sh-dsp.o sh4al-dsp sh4-nommu-nofpu.o sh.o sh4-nommu-nofpu sh4-nommu-nofpu.o sh2.o sh4-nommu-nofpu sh4-nommu-nofpu.o sh2e.o sh4 sh4-nommu-nofpu.o sh3-dsp.o sh4al-dsp sh4-nommu-nofpu.o sh3-nommu.o sh4-nommu-nofpu ! sh4-nommu-nofpu.o sh3.o sh4-nofpu sh4-nommu-nofpu.o sh3e.o sh4 ! sh4-nommu-nofpu.o sh4-nofpu.o sh4-nofpu sh4-nommu-nofpu.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh4-nommu-nofpu.o sh4.o sh4 sh4-nommu-nofpu.o sh4a-nofpu.o sh4a-nofpu sh4-nommu-nofpu.o sh4a.o sh4a sh4-nommu-nofpu.o sh4al-dsp.o sh4al-dsp ! sh4-nommu-nofpu.o sh-unknown.o sh4-nofpu sh4.o sh-dsp.o ERROR sh4.o sh.o sh4 sh4.o sh2.o sh4 sh4.o sh2e.o sh4 sh4.o sh3-dsp.o ERROR sh4.o sh3-nommu.o sh4 --- 182,288 ---- sh3-dsp.o sh4al-dsp.o sh4al-dsp sh3-dsp.o sh-unknown.o sh3-dsp sh3-nommu.o sh-dsp.o sh3-dsp ! sh3-nommu.o sh.o sh2a-nofpu-or-sh3-nommu ! sh3-nommu.o sh2.o sh2a-nofpu-or-sh3-nommu ! sh3-nommu.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh3-nommu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh3-nommu.o sh2a-or-sh3e.o sh2a-or-sh3e ! sh3-nommu.o sh2a-or-sh4.o sh2a-or-sh4 ! sh3-nommu.o sh2e.o sh2a-or-sh3e sh3-nommu.o sh3-dsp.o sh3-dsp ! sh3-nommu.o sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh3-nommu.o sh3.o sh2a-nofpu-or-sh3-nommu ! sh3-nommu.o sh3e.o sh2a-or-sh3e ! sh3-nommu.o sh4-nofpu.o sh4-nommu-nofpu sh3-nommu.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh3-nommu.o sh4.o sh4 sh3-nommu.o sh4a-nofpu.o sh4a-nofpu sh3-nommu.o sh4a.o sh4a sh3-nommu.o sh4al-dsp.o sh4al-dsp ! sh3-nommu.o sh-unknown.o sh2a-nofpu-or-sh3-nommu sh3.o sh-dsp.o sh3-dsp ! sh3.o sh.o sh2a-nofpu-or-sh3-nommu ! sh3.o sh2.o sh2a-nofpu-or-sh3-nommu ! sh3.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh3.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh3.o sh2a-or-sh3e.o sh2a-or-sh3e ! sh3.o sh2a-or-sh4.o sh2a-or-sh4 ! sh3.o sh2e.o sh2a-or-sh3e sh3.o sh3-dsp.o sh3-dsp ! sh3.o sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh3.o sh3.o sh2a-nofpu-or-sh3-nommu ! sh3.o sh3e.o sh2a-or-sh3e ! sh3.o sh4-nofpu.o sh4-nommu-nofpu ! sh3.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh3.o sh4.o sh4 sh3.o sh4a-nofpu.o sh4a-nofpu sh3.o sh4a.o sh4a sh3.o sh4al-dsp.o sh4al-dsp ! sh3.o sh-unknown.o sh2a-nofpu-or-sh3-nommu sh3e.o sh-dsp.o ERROR ! sh3e.o sh.o sh2a-or-sh3e ! sh3e.o sh2.o sh2a-or-sh3e ! sh3e.o sh2a-nofpu-or-sh3-nommu.o sh2a-or-sh3e ! sh3e.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-or-sh4 ! sh3e.o sh2a-or-sh3e.o sh2a-or-sh3e ! sh3e.o sh2a-or-sh4.o sh2a-or-sh4 ! sh3e.o sh2e.o sh2a-or-sh3e sh3e.o sh3-dsp.o ERROR ! sh3e.o sh3-nommu.o sh2a-or-sh3e ! sh3e.o sh3.o sh2a-or-sh3e ! sh3e.o sh3e.o sh2a-or-sh3e sh3e.o sh4-nofpu.o sh4 sh3e.o sh4-nommu-nofpu.o sh4 sh3e.o sh4.o sh4 sh3e.o sh4a-nofpu.o sh4a sh3e.o sh4a.o sh4a sh3e.o sh4al-dsp.o ERROR ! sh3e.o sh-unknown.o sh2a-or-sh3e sh4-nofpu.o sh-dsp.o sh4al-dsp ! sh4-nofpu.o sh.o sh4-nommu-nofpu ! sh4-nofpu.o sh2.o sh4-nommu-nofpu ! sh4-nofpu.o sh2a-nofpu-or-sh3-nommu.o sh4-nommu-nofpu ! sh4-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4-nommu-nofpu ! sh4-nofpu.o sh2a-or-sh3e.o sh4 ! sh4-nofpu.o sh2a-or-sh4.o sh4 sh4-nofpu.o sh2e.o sh4 sh4-nofpu.o sh3-dsp.o sh4al-dsp ! sh4-nofpu.o sh3-nommu.o sh4-nommu-nofpu ! sh4-nofpu.o sh3.o sh4-nommu-nofpu sh4-nofpu.o sh3e.o sh4 ! sh4-nofpu.o sh4-nofpu.o sh4-nommu-nofpu ! sh4-nofpu.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh4-nofpu.o sh4.o sh4 sh4-nofpu.o sh4a-nofpu.o sh4a-nofpu sh4-nofpu.o sh4a.o sh4a sh4-nofpu.o sh4al-dsp.o sh4al-dsp ! sh4-nofpu.o sh-unknown.o sh4-nommu-nofpu sh4-nommu-nofpu.o sh-dsp.o sh4al-dsp sh4-nommu-nofpu.o sh.o sh4-nommu-nofpu sh4-nommu-nofpu.o sh2.o sh4-nommu-nofpu + sh4-nommu-nofpu.o sh2a-nofpu-or-sh3-nommu.o sh4-nommu-nofpu + sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4-nommu-nofpu + sh4-nommu-nofpu.o sh2a-or-sh3e.o sh4 + sh4-nommu-nofpu.o sh2a-or-sh4.o sh4 sh4-nommu-nofpu.o sh2e.o sh4 sh4-nommu-nofpu.o sh3-dsp.o sh4al-dsp sh4-nommu-nofpu.o sh3-nommu.o sh4-nommu-nofpu ! sh4-nommu-nofpu.o sh3.o sh4-nommu-nofpu sh4-nommu-nofpu.o sh3e.o sh4 ! sh4-nommu-nofpu.o sh4-nofpu.o sh4-nommu-nofpu sh4-nommu-nofpu.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh4-nommu-nofpu.o sh4.o sh4 sh4-nommu-nofpu.o sh4a-nofpu.o sh4a-nofpu sh4-nommu-nofpu.o sh4a.o sh4a sh4-nommu-nofpu.o sh4al-dsp.o sh4al-dsp ! sh4-nommu-nofpu.o sh-unknown.o sh4-nommu-nofpu sh4.o sh-dsp.o ERROR sh4.o sh.o sh4 sh4.o sh2.o sh4 + sh4.o sh2a-nofpu-or-sh3-nommu.o sh4 + sh4.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4 + sh4.o sh2a-or-sh3e.o sh4 + sh4.o sh2a-or-sh4.o sh4 sh4.o sh2e.o sh4 sh4.o sh3-dsp.o ERROR sh4.o sh3-nommu.o sh4 *************** sh4.o sh-unknown.o *** 178,183 **** --- 298,307 ---- sh4a-nofpu.o sh-dsp.o sh4al-dsp sh4a-nofpu.o sh.o sh4a-nofpu sh4a-nofpu.o sh2.o sh4a-nofpu + sh4a-nofpu.o sh2a-nofpu-or-sh3-nommu.o sh4a-nofpu + sh4a-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4a-nofpu + sh4a-nofpu.o sh2a-or-sh3e.o sh4a + sh4a-nofpu.o sh2a-or-sh4.o sh4a sh4a-nofpu.o sh2e.o sh4a sh4a-nofpu.o sh3-dsp.o sh4al-dsp sh4a-nofpu.o sh3-nommu.o sh4a-nofpu *************** sh4a-nofpu.o sh-unknown.o *** 193,198 **** --- 317,326 ---- sh4a.o sh-dsp.o ERROR sh4a.o sh.o sh4a sh4a.o sh2.o sh4a + sh4a.o sh2a-nofpu-or-sh3-nommu.o sh4a + sh4a.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4a + sh4a.o sh2a-or-sh3e.o sh4a + sh4a.o sh2a-or-sh4.o sh4a sh4a.o sh2e.o sh4a sh4a.o sh3-dsp.o ERROR sh4a.o sh3-nommu.o sh4a *************** sh4a.o sh-unknown.o *** 208,213 **** --- 336,345 ---- sh4al-dsp.o sh-dsp.o sh4al-dsp sh4al-dsp.o sh.o sh4al-dsp sh4al-dsp.o sh2.o sh4al-dsp + sh4al-dsp.o sh2a-nofpu-or-sh3-nommu.o sh4al-dsp + sh4al-dsp.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh4al-dsp + sh4al-dsp.o sh2a-or-sh3e.o ERROR + sh4al-dsp.o sh2a-or-sh4.o ERROR sh4al-dsp.o sh2e.o ERROR sh4al-dsp.o sh3-dsp.o sh4al-dsp sh4al-dsp.o sh3-nommu.o sh4al-dsp *************** sh4al-dsp.o sh4a.o *** 221,237 **** sh4al-dsp.o sh4al-dsp.o sh4al-dsp sh4al-dsp.o sh-unknown.o sh4al-dsp sh-unknown.o sh-dsp.o sh3-dsp ! sh-unknown.o sh.o sh3 ! sh-unknown.o sh2.o sh3 ! sh-unknown.o sh2e.o sh3e sh-unknown.o sh3-dsp.o sh3-dsp ! sh-unknown.o sh3-nommu.o sh3 ! sh-unknown.o sh3.o sh3 ! sh-unknown.o sh3e.o sh3e ! sh-unknown.o sh4-nofpu.o sh4-nofpu ! sh-unknown.o sh4-nommu-nofpu.o sh4-nofpu sh-unknown.o sh4.o sh4 sh-unknown.o sh4a-nofpu.o sh4a-nofpu sh-unknown.o sh4a.o sh4a sh-unknown.o sh4al-dsp.o sh4al-dsp ! sh-unknown.o sh-unknown.o sh3 --- 353,373 ---- sh4al-dsp.o sh4al-dsp.o sh4al-dsp sh4al-dsp.o sh-unknown.o sh4al-dsp sh-unknown.o sh-dsp.o sh3-dsp ! sh-unknown.o sh.o sh2a-nofpu-or-sh3-nommu ! sh-unknown.o sh2.o sh2a-nofpu-or-sh3-nommu ! sh-unknown.o sh2a-nofpu-or-sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh-unknown.o sh2a-nofpu-or-sh4-nommu-nofpu.o sh2a-nofpu-or-sh4-nommu-nofpu ! sh-unknown.o sh2a-or-sh3e.o sh2a-or-sh3e ! sh-unknown.o sh2a-or-sh4.o sh2a-or-sh4 ! sh-unknown.o sh2e.o sh2a-or-sh3e sh-unknown.o sh3-dsp.o sh3-dsp ! sh-unknown.o sh3-nommu.o sh2a-nofpu-or-sh3-nommu ! sh-unknown.o sh3.o sh2a-nofpu-or-sh3-nommu ! sh-unknown.o sh3e.o sh2a-or-sh3e ! sh-unknown.o sh4-nofpu.o sh4-nommu-nofpu ! sh-unknown.o sh4-nommu-nofpu.o sh4-nommu-nofpu sh-unknown.o sh4.o sh4 sh-unknown.o sh4a-nofpu.o sh4a-nofpu sh-unknown.o sh4a.o sh4a sh-unknown.o sh4al-dsp.o sh4al-dsp ! sh-unknown.o sh-unknown.o sh2a-nofpu-or-sh3-nommu Index: ld/testsuite/ld-sh/arch/sh4.s =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-sh/arch/sh4.s,v retrieving revision 1.1 diff -c -3 -p -r1.1 sh4.s *** ld/testsuite/ld-sh/arch/sh4.s 29 Jun 2004 16:35:05 -0000 1.1 --- ld/testsuite/ld-sh/arch/sh4.s 15 Dec 2004 16:36:28 -0000 *************** *** 1,3 **** .section .text sh4: ! fabs dr0 --- 1,4 ---- .section .text sh4: ! frchg ! --------------090008050409050900020602--